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Full text of "Transistor Circuit Analysis"

TRANSISTOR 
CIRCUIT ANALYSIS 



SIMON md SCHUSTER 

TECH OUTLINES 




ALFRED D. GRONNER 




theory and 

step-by-step 

solutions to 

235 problems 



TRANSISTOR 
CIRCUIT ANALYSIS 



ALFRED D. GRONNER 

Singer-General Precision, Inc. 



REVISED EDITION 




SIMON ad SCHUSTER 

TECH OUTLINES 



SIMON AND SCHUSTER, NEW YORK 



"X 



! HA r 35 COLLEGE J 
I PRESTON /I 



HjQoSS. 



y 



Copyright©1966, 1970 by 
Simon & Schuster, Inc. 

All rights reserved. No part of this material may be 
reproduced in any form without permission in 
writing from the publisher. 

Published by 

Simon and Schuster 

Technical and Reference Book Division 

1 West 39th Street 

New York, N.Y. 10018 

Published simultaneously in Canada 
Printed in the United States of America 



PREFACE 

This book combines the advantages of both the textbook and the so-called 
review book. As a textbook it can stand alone, because it contains enough descrip- 
tive material to make additional references unnecessary. And in the direct manner 
characteristic of the review book, it has hundreds of completely solved problems that 
amplify and distill basic theory and methods. It is my intention that this book serve 
equally well as a basic text for an introductory course, and as a collateral problem- 
solving manual for the electrical engineering student at the junior- or senior-level, 
who has had a course in circuit theory. It is also a useful supplement for the student 
taking advanced courses in related areas that require a knowledge of transistors. 
The analysis and design problems should benefit professional engineers encountering 
transistors for the first time. 

Although the principles of transistor circuit design and analysis are developed 
in an academic manner, a practical emphasis is maintained throughout; i.e., the stu- 
dent is shown how to "size up" a problem physically, and to estimate the approximate 
magnitudes of such parameters as quiescent operating point, impedances, gain, etc. 
Moreover, a scrupulous effort is made in the solved problems to keep sight of under- 
lying analytical and physical principles, thereby establishing a strong background 
for the practical problems that arise in the analysis and design of circuits. 

New concepts, definitions, and important results are tinted in grey throughout 
the text. The solved problems are generally comprehensive, and incorporate numerous 
applications. Supplementary problems are included not only for exercise but also to 
strengthen the skill and insight necessary for the analysis and design of circuits. 

After a preliminary discussion of semiconductor principles in Chap. 1, a com- 
plete chapter is devoted to graphical analysis of semiconductor circuits. Thus the 
foundation is laid for succeeding chapters on small- and large-signal parameters. 
Nonlinearities, in particular, are easily investigated by means of the graph- 
ical methods described. 

Chapter 3 provides a thorough coverage of the small-signal equivalent circuit, 
with emphasis on the tee-equivalent and hybrid configurations. The hybrid-* circuit 
is introduced in connection with the high-frequency limitations of transistor behavior. 

Chapter 4 presents a variety of bias circuit configurations, including leakage 
effects, stability factors, temperature errors, and methods of bias stabilization. 

Chapter 5 establishes the basic formulae for the small-signal amplifier. Multi- 
stage amplifiers, together with various feedback circuits, are considered in Chap. 6. 
Power amplifiers, both single-ended and push-pull, are covered in Chap. 7. 

Chapter 8 rounds out much of the material on feedback developed in earlier 
chapters, and investigates the operational amplifier and the stability of high-gain 
feedback amplifiers by Nyquist and Bode techniques. 

The appendices provide a convenient reference to transistor characteristics, 
important formulae, asymptotic plotting, and distortion calculations. 



I am deeply grateful to Mr. Sidney Davis, who made important contributions 
to both the first and second editions in organizing the problems, unifying the nota- 
tion, and commenting on the contents as a whole. I also wish to acknowledge the 
editorial efforts of Raj Mehra of Simon & Schuster, Inc., towards the revision of the 
first edition. 

Alfred D. Gronner 
White Plains, New York 



TABLE OF CONTENTS 



1 



Page 

SEMICONDUCTOR PHYSICS AND DEVICES 

1 .1 Basic Semiconductor Theory 1 

1 .2 Effects of Impurities 3 

1 .3 The p-n Junction 5 

1 .4 The Transistor 1 2 

1 .5 The Ebers-Moll Model of the Transistor 15 

1 .6 Basic Transistor Amplifier Circuits 17 

1 .7 Transistor Leakage Currents 18 

1 .8 Transistor Breakdown 19 

1.9 D-C Models 20 

1.10 The Hybrid-Jt Equivalent Circuit 21 

1.11 Supplementary Problems 22 



TRANSISTOR CIRCUIT ANALYSIS 

2.1 Characteristic Curves 24 

2.2 The Operating Point 26 

2.3 The Load Line 27 

2.4 Small- and Large-Signal A-C Circuits 30 

2.5 Supplementary Problems 37 



SMALL-SIGNAL EQUIVALENT CIRCUITS 

3.1 Introduction 38 

3.2 Hybrid Equivalent Circuit 38 

3.3 Tee-Equivalent Circuit 43 

3.4 Common-Base Parameters 47 

3.5 Derivation of Common-Base Parameters 48 

3.6 Calculation of Amplifier Performance 52 

3.7 Hybrid-jr Equivalent Circuit 62 

3.8 Supplementary Problems 66 



8 



BIAS CIRCUITS AND STABILITY 

4.1 Introduction e _ 

4.2 Leakage Current 67 

4.3 Tee-Equivalent Circuit Representation of Leakage 68 

4.4 Constant Base Voltage Biasing Techniques 71 

4.5 Stability Factors 73 

4.6 Emitter Bias Circuit 83 

4.7 Bias Compensation 8 c 

4.8 Self-Heating gg 

4.9 Thermal Runaway 8g 

4.10 Approximation Techniques 92 

4.1 1 Supplementary Problems 96 

SINGLE-STAGE AMPLIFIERS 

5.1 Introduction g 

5.2 Common-Emitter Circuit g7 

5.3 Common-Base Circuit 107 

5.4 Common-Collector Circuit (Emitter-Follower) 109 

5.5 High-Frequency Performance -, 1 o 

5.6 Hybrid-* Circuit 1 ^ 

5.7 Supplementary Problems 120 

MULTI-STAGE AMPLIFIERS 

6.1 Introduction 12 1 

6.2 Capacitor Coupling 1 24 

6.3 Transformer Coupling 1 38 

6.4 Direct Coupling 144 

6.5 Complementary Transistors 155 

6.6 Supplementary Problems 159 

POWER AMPLIFIERS 

7.1 Introduction 1 6 q 

7.2 Distortion 1 66 

7.3 Power Amplifier Design Equations '.'.'.'.'.'. 1 71 

7.4 Common-Base Connection j 1 73 

7.5 Common-Collector Power Amplifier Stage \ 1 76 

7.6 Push-Pull Amplifiers _" "i 78 

7.6a Class A Push-Pull Amplifier 178 

7.6b Class B Push-Pull Amplifier ................ ...^80 

7.7 Supplementary Problems 185 

FEEDBACK 

8.1 Basic Concepts of Feedback \ 1 86 

8.2 Types of Feedback ! 1Qn 

8.3 Stability. . . , ""'.'.}'.'.'.'.'.'.'.'.['.'.'. ]g 6 

8.4 The Bode Diagram 1Qg 

8.5 Operational Amplifiers .'.' I.' .'.'!.'.' .' 200 

8.6 Supplementary Problems '.'.'.'.['.'.'.'.'. 202 



f\ TRANSISTOR CHARACTERISTICS 

A.1 Types 2N929, 2N930 n-p-n Planar Silicon Transistors 203 

A.1a Typical Characteristics 205 

A.2 Types 2N1 162 thru 2N1 167 Transistors 209 

A.2a Peak Power Derating 211 

A.3 Types 2N1302, 2N1 304, 2Jsl 1306, and 2N1308 n-p-n Alloy-Junction 

Germanium Transistors .x. 21 2 

A.3a Typical Characteristics. . . .\ 213 

A.4 Types 2N1529A thru 2N1532A, 2N1534Athru 2N1537Aand 2N1529thru 

2N1 538 Transistors 216 

A.4a Collector Characteristics at 25°C: Types 2N1529A thru 2N1532A and 

2N1 529 thru 2N1 533 Transistors. . . \. 217 

A.4b Determination of Allowable Peak Power . 220 

ft SUMMARY CHARTS 221 

APPENDIX 

C FREQUENCY RESPONSE PLOTTING 

C.1 Introduction 227 

C.2 The Asymptotic Plot 227 

C.3 More Complex Frequency-Response Functions 233 

D DISTORTION CALCULATION 

D.1 Distortion 239 

E LIST OF SYMBOLS 241 

APPENDIX 

INDEX 243 



SEMICONDUCTOR 
PHYSICS AND DEVICES 



1 



CHAPTER 



1 .1 Basic Semiconductor Theory 

Solid-state devices such as the junction diode and 
transistor are fabricated from semiconductor materials. These materials have 
electrical resistivities which lie between conductors and insulators. The princi- 
pal semiconductors used are the elements germanium and silicon, which in a 
pure state occur in crystalline form; namely, where the atoms are arranged uni- 
formly in a periodic pattern. 

To fully appreciate the operation of solid-state devices, a familiarity with 
atomic physics is needed. Refer to Fig. 1.1, which shows the atomic models of 
germanium and silicon. The nuclei of the atoms have 32 and 14 units of positive 
charge or protons, respectively, while around the nuclei orbit an identical number 
of units of negative charge or electrons. This equalization of charges results in 
the atoms possessing a total effective charge which is neutral. 

The electron orbits are arranged in shells designated by the letters K, L, 
M, N, ... . According to quantum mechanics, the maximum allowable number of 
electrons in shell K is 2, in L, 8, in M, 18, and in N, 32. A filled shell has very 
little influence on chemical processes involving a particular atom. 

The electrons in their individual orbits around the nucleus exhibit specific 
energy values, called discrete energy levels. These are determined by the 
momentum of the electrons and their distance from the nucleus. The bond between 
the electron and the nucleus is inversely proportional to the distance between 
them. The closer they are, the greater the energy required to free the electron 
from the atom. Subsequently, electrons which are remote from the nucleus require 
less energy to free themselves from the atom. 





Valence 
band 




Valence 
band 



Va lence band 



Valence band 



(a) 



(b) 



Fig. 1.1 Models of (a) germanium and (b) silicon atoms, and their simplified 

representations. 



Transistor Circuit Analysis 



Conduction band 




Conduction band 




Valence band 
(b) 



Valence electrons are those in the outer orbit which can break away more 
freely from the atom. The inner orbit electrons can be combined with the nucleus; 
in effect, simplified to a central core or kernel (Fig. 1.1), which may then be 
considered a modified nucleus. The valence band electrons or outer orbit elec- 
trons determine the chemical and crystalline properties of the elements. 

Valence electrons exist at excitation levels if energy is supplied from some 
external source. When the energy source is removed, the electrons normally fall 
back into the valence band. The most common source of energy that moves 
valence electrons into excitation levels is beat. At absolute zero, electrons do 
not exist at excitation levels. 

Valence electrons at excitation levels are called free electrons. They are 
so loosely held by the nucleus that they will move relatively freely through a 
semiconductor in response to applied electrical fields as well as other forces. 

Now consider a semiconductor crystal wherein the atoms are arranged uni- 
formly in a periodic pattern. The proximity of neighboring atoms leads to modi- 
fications in the energies of the valence electrons. The energies are distributed 
in an energy band that represents the range of energies of the valence electrons 
in the crystal. Although the energies of the specific electrons have discrete 
values, the energy bands corresponding to the valence electrons in the crystal 
appear almost as a continuous band of energy distribution. 

There is also a corresponding energy band for every shell within each atom 
of the crystal. The bands are separated by energy gaps, which represent the 
energy required to move electrons between bands. Energy is generally expressed 
in electron volts (1 ev = 1.6 x 10" 1 ' joules). Quantum mechanics demonstrates 
that electrons can only exist at energy levels within the bands and not at levels 
within the forbidden gaps. 

Electron motion within an energy band can only occur if the band is not filled, 
such as in the case of the valence band. If sufficient energy is applied to an 
electron, it can move from its band to a higher band. Heat or energy supplied by 
an external electric field can move an electron from the valence band to the con- 
duction band, where it may travel with relative ease through the crystal. If all 
valence bands in a crystal are filled, conduction can only occur if electrons are 
first moved to the conduction band. The vacant sites left in the valence band 
are called holes. 



Conduction band 




Fig. 1.2 Comparison of energy gaps 

between valence and conduction 
bands for (a) conductors, (b) semi- 
conductors, and (c) insulators. 



PROBLEM 1.1 What distinguishes conductors, semiconductors, and insulators 
in terms of the forbidden energy gap? 

Solution: In a conductor, the forbidden gap between conduction and valence 
bands is zero (they actually overlap in most conductors.) Therefore, no energy 
is needed to move electrons into the conduction band and electron flow is large 
for small applied voltage. 

In a semiconductor, the forbidden gap is on the order of 1 v. Temperature 
will excite some electrons across it, but the number so excited is small. 

In an insulator, the forbidden gap is very wide and almost no electrons are 
available for conduction. Therefore a large amount of energy is required to 
cause conduction. 

Figure 1.2 shows the above energy levels in a convenient, diagrammatic 
form. 

The valence bands of both germanium and silicon atoms have 4 electrons 
each (Fig. 1.1), and in crystals form covalent bonds; i.e., adjacent atoms share 
pairs of valence electrons. At absolute zero temperature the valence band is 
filled, and there are no electrons available for conduction. The semiconductor 
is then said to have infinite resistivity. As temperature increases, the valence 
electrons absorb energy and a certain number break their covalent bonds 



Semiconductor Physics and Devices 




^=7 ?sr/ 

\/ Electron \/ 
Hole /V, Of 







/ \^ Electron / \ 




Fig. 1.3 The generation of mobi le electron-hole pairs due to thermal agitation in a 
germanium crystal shown two-dimensionally. 



(Fig. 1.3). The broken bonds move electrons into the conduction band, leaving 
holes in the valence band. This makes conduction possible in both bands. In 
the conduction band, the free electrons move in response to an applied electric 
field, while in the valence band, electrons move by shifting from one hole to 
the next. The latter process is most easily visualized by regarding the holes as 
positive particles, moving under the influence of an electric field. When the 
holes reach an electrode, they neutralize electrons at the electrode, so that the 
resultant current cannot be distinguished outside the semiconductor from the 
more familiar conduction band current (Fig. 1.4). 

The valence electrons of common semiconductors require relatively large 
amounts of energy to break their covalent bonds, and thus exhibit a characteris- 
tic poor conductivity. The valence electrons of silicon and germanium need, 
respectively, 1.1 ev and 0.72 ev to excite them out of their covalent bonds. The 
greater energy needed for the silicon electrons indicates that pure silicon has 
higher ohmic resistance than pure germanium. The resistivity of the pure semi- 
conductor is its intrinsic resistivity. 

PROBLEM 1.2 Why does the conductivity of a semiconductor increase, rather 
than decrease with temperature, as does the conductivity of a metal? 

Solution: As temperature increases in a semiconductor, the number of electron- 
bole pairs generated by thermal agitation increases. The liberated electrons and 
holes are current carriers, and thus provide increasing conductivity. 

But at very high temperatures, when sufficiently large numbers of free elec- 
trons and holes are generated, collisions tend to increase resistance by reducing 
the average speed of the current carriers. 



1.2 Effects of Impurities 

When an electron moving through a semiconductor crystal 
encounters a hole, recombination occurs. We may think of the electron as "en- 
tering" the hole, and the electron-hole pair thereby ceasing to exist. At any 
given temperature, equilibrium exists where the rate of thermal generation of 
electron-hole pairs equals the recombination rate. 

It may thus be inferred that in a pure semiconductor crystal, the number of 
electrons equals the number of holes. The crystal is, of course, electrically 
neutral. 





•- © e-© 

© •— © ©— 






■ I 






(+) Positive ions 

(3) Negative ions 
Q Free holes 
O Free electrons 

Fig. 1.4 Movement of electron s 
and holes in two types of semi- 
conductors. 



Transistor Circuit Analysis 



To create a useful semiconductor device, a small amount of a specific im- 
purity element is added to the pure semiconductor crystal. The technique is 
called doping. The most common impurity elements are atoms of approximately 
the same volume as the atoms of the crystal or host, in order to minimize dis- 
location of the crystal structure. However, the impurity atoms have either one 
electron more (pentavalent) or one electron less (trivalent) in their valence bands 
than the host. 

When the impurity atoms are introduced into the crystal structure to form 
covalent bonds with the host atoms, there will be - depending on the type of 
impurity - either an extra electron or extra hole in the vicinity of each impurity 
atom. Impurities that contribute extra electrons are called donor or n-type (n for 
negative) impurities, and the crystal thus treated becomes an n-type semiconduc- 
tor. Analogously, impurities that contribute extra holes are called acceptor or 
p-type (p for positive) impurities, and the crystal thus treated becomes a p-type 
semiconductor. Figure 1.5 shows how the type of impurity determines whether a 
semiconductor becomes either an n-type or p-type. 




(a) 




Fig. 1.5 Effect of impurities on pure germanium crystals, (a) Donor impurity provides 
mobile electrons. The positively-charged atoms are not free to move, (b) Acceptor 
impurity provides mobile holes. The negatively -charged atoms are not free to move. 

Typical numbers showing impurity effects are of interest. Pure silicon, for 
example, has approximately 10*° charge carriers (electrons and holes) per cubic 
centimeter at room temperature, and an intrinsic resistivity of 240,000 Q-cm. 
Typically, a crystal of silicon might be doped by one donor atom per 10' host 
atoms with a corresponding reduction in resistivity. 

PROBLEM 1.3 What effect do added impurities have on semiconductor 
conductivity? 

Solution: Added impurities contribute electrons or holes which are not rigidly 
held in covalent bonds. Thus electrons may move freely through n-type material, 
thereby creating an electric current. Similarly, the principal current in p-type 
material is that of boles moving through the crystal in the opposite direction 
to the movement of electrons. 

Electron and hole motion constitute components of current flow. The charge 
carriers contributed by the impurity atoms lead to substantially increased 
conductivity. 



In n-type material, electrons are called majority carriers and holes are called 
minority carriers. In p-type material, the holes are majority carriers and the 
electrons minority carriers. Both p-type and n-type materials are normally elec- 
trically neutral even though free holes and electrons are present. 



Semiconductor Physics and Devices 



PROBLEM 1.4 Would you expect minority carrier current flow in response to an 
applied voltage? 

Solution: Minority carrier flow occurs in response to an applied voltage since it 
is a current carrier. Majority carrier flow, however, is predominant, except at 
high temperatures where thermally-generated electron-hole pairs lead to a higher 
proportion of minority carriers. 



1 .3 The p-n Junction 

If p-type and n-type materials are mechanically joined 
together to form a single crystal, and they thereby create a junction in which the 
continuity of the crystalline structure is preserved - such a junction is called a 
p-n junction or junction diode. 

Since both the p-type and n-type materials exist at different charge levels be- 
cause of natural and impurity differences, they seek equilibrium between one 
another and an energy exchange occurs. Thus electrons and holes migrate across 
the p-n junction by the fundamental process of diffusion; i.e., the spread of 
charge carriers from regions of high concentration to regions of low concentra- 
tion, ultimately tending toward uniform distribution. By diffusion, the holes mi- 
grate from p-type to n-type material, while the electrons move in the opposite 
direction. 

Figure 1.6a shows the p-n junction. During diffusion, the excited or ionized 
areas on either side of the junction become relatively free of charge carriers due 
to the annihilation of electrons and holes by recombination, and are called the 
depletion layer or region. An electric field also builds up, generated by the 
newly created positive and negative ions located in the opposing materials, and 
conduction decreases. A potential difference or barrier is thus created in the 
depletion region (Fig. 1.6b) which inhibits further electron and hole migration. 
This potential difference is called the potential barrier voltage or contact po- 
tential, and is about 0.3 v for germanium and 0.7 v for silicon at room temperature. 

An equilibrium condition or barrier balance in which conduction is limited 
by the potential difference exists between the p-type and n-type materials. How- 
ever, if electron-hole pairs are formed by thermal agitation in the p-type mate- 
rial, electrons will flow across the p-n junction aided by the electric field. 
Similarly, holes in the n-type material will also migrate. Therefore minority 
carriers continue to flow despite the barrier balance, assisted by the potential 
difference established by the diffusion of majority carriers. Of course any net 
movement of minority carriers due to increasing temperature will be balanced by 
further diffusion of majority carriers, and a resultant widening of the depletion 

Now suppose an external potential is applied to the p-n junction of Fig. 1.7a. 
With the polarity shown in Fig. 1.7b, the junction is forward-biased and the field 
of the applied potential difference opposes the internal field across the depletion 
layer. Majority carriers therefore will flow freely across the barrier. When the 
polarity of the externally applied voltage is reverse- or back-biased (Fig. L7c), 
die internal field across the junction is increased, and majority carriers cannot 
flow. However, minority carriers generated by thermal agitation continue to flow 
freely. This property of conducting essentially in one direction makes the p-n 
junction a rectifier. 

Note that the depletion region gets wider as applied reverse voltage is in- 
creased. Since the depletion layer does not contain many current carriers, it 
acts as an insulator, and the depletion region can be regarded as a capacitor 
whose plate distance varies with the reverse voltage. 



Depletion layer 



Electric field 

III"' -vS>.\\ 



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0^0 ! O0] 
0©i© + © : 

+ T — 1 + 

+ O]GK} 



0_© O_0 
©Oi©© 

:©©ib.©_ 

;@©i©© + 



Junction 
(a) 

— -4 + — 



4- 



OOI00 

00:00 

OO|0 
OOI0O 



+ 



O0jOO 
0O1OO 
©@!0 

©©!oo 



(b) 

Q Donor atoms 

\~^ Acceptor atoms 

+ Holes 

— Electrons 

• Imperfections, etc. 

Fig. 1.6 A p-n junction . (a) loni zed 
regions on each side of the junction 
form a depletion layer, (b) As a re- 
sult of the depletion layer, a contact 
potential, represented symbolically 
by a battery, is established across 
the junction . 



© + ©♦ © + 
©♦©+ © + 



.© .© .© 
.© .© .© 



(a) 





p 


n 






©♦J3*J3* 


-©_..© .© 
_©__©__© 






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1 — 





(b) 





p 


n 






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& £+ 9. 


-§. -0. -§. 
-©, -©. -@. 






H 


h 





(c) 

Fig. 1.7 (a) Unenergized p-n junc- 
tion, (b) The effect on thep-n junc- 
tion of application of forward bias, 
(c) When the battery connections 
are reversed, the electrons and 
holes are drawn away from the 
p-n junction . 



6 Transistor Circuit Analysis 

A plausible expression for current flow across a p-n junction as a function of 
applied voltage may be developed by using relationships from semiconductor 
physics. Referring to Figs. 1.7a-c, consider first the case where no external 
bias is applied. There are four current components flowing simultaneously 
across the junction: 

1. A diffusion current l d „ due to electron flow from the n-type material with 
its relatively high concentration of mobile electrons. 

2. A diffusion current I dp due to hole flow from the p-type material with its 
relatively high concentration of mobile holes. 

These two current components are majority carrier currents since they are due to 
electrons in the n-region and holes in the p-region. As a result of the flow of 
these current components, at the junction the n-type material develops a net 
positive charge and the p-type material a net negative charge, which leads to a 
potential barrier across it. This barrier limits further diffusion except for the ef- 
fect of thermally-generated electron-hole pairs on both sides of the junction. 
Consequently the remaining two current components are: 

3. A current /„„ due to thermally-generated free electrons in the p-region, 
which are accelerated across the junction by the barrier voltage. 

4. A current l ep due to thermally-generated free holes in the n-region, which 
are accelerated across the junction by the barrier voltage. 

These last current components are minority carrier currents, since they are due 
to electrons in the p-region and holes in the n-region. 

Since holes flowing in one direction across the junction, and electrons flow- 
ing in the opposite direction correspond to the same current direction: 



Total diffusion current l d = l dB + / 



dp 



'dm 



Total thermally-generated current /„ = l a + I 



'en< 



(1.1) 



(1.2) 



This latter current component, /,, is called the saturation current, and is dis- 
cussed later. 

In the absence of applied voltage, under open-circuit or short-circuit condi- 
tions, the net current flow must be zero. Therefore, 

The barrier potential adjusts itself until an equilibrium exists between the diffu- 
sion and thermally-generated current components. 

An externally applied voltage modifies this equilibrium, and leads to a con- 
dition of net current flow across the junction. Depending on the polarity of the 
applied voltage, the potential barrier is either raised or reduced. 

To arrive at a quantitative picture of current flow with applied voltage, it is 
necessary to relate /„ to barrier potential. Although the detailed background 
physics is beyond the scope of this book, it is intuitively clear that the rates of 
diffusion of electrons or holes depend on the concentrations, n and p, of elec- 
trons and holes, respectively, in the regions from which they diffuse. In the 
typical materials used in making common semiconductor devices, the concen- 
trations of majority carriers are affected to only a slight extent by the relatively 
low concentrations of thermally- generated electron-hole pairs. 

From semiconductor physics, 



I dp = pe* T 



(1.3) 



and 



l dn = ne' 



fcr < V B~V) 

,?*..* 



(1.4) 



Semiconductor Physics and Devices 



where 



V B = barrier potential at equilibrium, volts, 
k = Boltzmann's constant » 1.38 x 10"" joules/°K, 
T = absolute temperature, °K, 
q = electron charge = 1.6 x 10 -1 ' coulomb. 

In consistent units, for T = 300 °K (approximately room temperature), 

— =0.026. 



(1.5) 



Note that I dp and / dn are proportional to the p and n concentrations, respec- 
tively, as noted earlier. Note further that diffusion currents decrease exponentially 
as V B increases, which is intuitively plausible, and consistent with previous 
reasoning. 

The total diffusion current is, therefore, 



Id = 'dp + '; 



1 dm 



a or, substituting and simplifying, 



/^Ae*' 



(1.6) 



where A is a constant. 

I Since the total junction current is the difference between diffusion current 
r and saturation current (/,), 



\ l-ld-l., 

i Now, at V = and / = 0, 

;, Hence, 



or 



/. 



/ = i4e* T -/.. 



/ = /,(e* T -1), 



(1.7) 



f' This is the expression for the diode current, and is often referred to as the recti- 
fier equation. Since kT/q = 0.026 v at room temperature, the expression for / 
simplifies for V » 0.026 v; that is, 

i^/.e* 1 " for V» 0.026 v. (1.8) 

..Similarly, for V negative by more than about 0.1 v, 

The diode characteristic in the forward and reverse regions are plotted in 
i'.Fig. 1.8. The rapid increase in reverse current at a large reverse voltage is 
-discussed later. 

PROBLEM 1.5 Explain the flat character of the saturation current of the p-n 
junction. 

Solution: The reverse current is dependent on the number of minority carriers in 
the semiconductor crystal. When a few tenths of a volt reverse voltage is applied, 
all the thermally-generated minority carriers are swept across the junction. Re- 
verse current is limited by the number of available minority carriers. 

The saturation or reverse leakage current increases sharply with temperature 
(Fig. 1.9). As a very approximate rule of thumb, this leakage component doubles 
for every 10 °C increase in temperature. 



Crystal 
I breakdown 

7=/.(e 



Minority _ 
carrier 
conduction 



Majority 

carrier 

conduction 



V 



I 
I 

0.6 v I-" 

for Si, 
0.3 v 
for Ge 



-1) 



(a) 



y^ 



(b) 



Fig. 1.8 Current vs. voltage across 
a p-n junction, (a) The magnitudes 
of the leakage current I s and forward 
voltage V F are greatly exaggerated, 
(b) A scaled drawing of a diode 
characteri sti c. 



Transistor Circuit Analysis 



100 



I, amp 




Fig. 1.10 Comparing silicon and 
germanium diode characteristics. 
Note the modified scales for plus 
and minus ordinates. Voltages 
VpQ and Vps are forward volt- 
ages caused primarily by the po- 
tential barriers. 



10 



u 

o 



0.1 





































































































Germanium / 




Si licon 



















































































































































































































































25° 50° 75° 100° 125 c 
Junction temperature, °C — 



150° 175° 



Fig. 1.9 Typical variation of I s with temperature for germanium and 
si licon diodes. 

PROBLEM 1.6 Would you expect germanium or silicon to have the greater value 
of reverse leakage? Why? 

Solution: Since reverse leakage is predominantly due to minority earners gen- 
erated by thermal agitation, it is evident that germanium, with its lower energy 
gap (0.72 ev for Ge compared to 1. 1 ev for Si) between valence and excited elec- 
tron states, would have the greater leakage. The greater energy gap of silicon 
allows it to be used at much higher temperatures (to 150 °C approximately) than 
germanium, whose maximum junction temperature is slightly above 100 °C. 

PROBLEM 1.7 Sketch a curve similar to Fig. 1.8a, roughly comparing a silicon 
and a germanium diode. How does the width of the energy gap affect diode 
characteristics? 

Solution: Figure 1.10 provides the required sketch. In the forward direction, 
more voltage is required to overcome the barrier potential (related to the energy 
gap) for silicon. In the reverse direction, the tighter covalent bonds mean greater 
crystal breakdown voltages. The saturation current, as previously discussed, is 
higher for germanium. Note the different scales in the forward and reverse 
directions. 

PROBLEM 1.8 Derive a formula for the diode incremental forward resistance or 
dynamic resistance where r, = dV/cB for currents in the forward direction. Note 
that this is the resistance to small changes in current and voltage about a par- 
ticular operating current, /. 



Solution: The rectifier equation for the diode current is 



/ = / 8 (e* r 
Differentiating (1.7) with respect to V, 

dV kT 



-1) 



kT 



[1.7] 



(1.9) 



Semiconductor Physics and Devices 



For large positive voltage, e<* /M "> v » 1, and I?I B e<«" [T5v from (1.7). Sub- 
stitute this in the expression (1.9) for dl/dV: 






/, 



and 



_ dV_ *T 
f/ ~ d/ ~ qr/' 



(1.10) 



Note that the incremental diode forward resistance r, varies inversely with the 
diode forward current. 

PROBLEM 1.9 At room temperature, find the incremental resistance r { as a 
function of /. Introduce numerical values for k, T, and q. 

Solution: Room temperature, 25°C, corresponds to 273 + 25°C = 298°K. Substi- 
tute in (1.10) using numerical values for k and q: 



26 



Q, 



(1.11) 



where / is in milliamperes. 

PROBLEM 1.10 What is the incremental resistance of a forward conducting p-n 
junction with 2 ma current? 

Solution: Substitute in (1.11): 

ff ^26 = 26 =13Q 
/ 2 

PROBLEM 1.11 If forward diode resistance r f is 13 fl at 25°C and 2 ma, what 
is the resistance at 125 °C and 2 ma? 

Solution: Refer to (1.10) in which r t is directly proportional to absolute ♦ 
temperature: t 

tt 273+125 (13)=^(13)=17.4fl. 

' 125 ° c 273 + 25 V 298 



The effect of temperature on the diode forward characteristics may now be 
estimated. From (1.10), the incremental diode forward resistance r, is inversely 
proportional to current and directly proportional to temperature, °K. Since 
°K = 273 f °C, relatively small changes in °C about a room temperature ambient 
lead to much smaller percentage changes in °K. Consequently r, is relatively in- 
dependent of temperature. However, diode obmic resistance decreases with in- 
creasing temperature due to increased thermal agitation. 

A family of diode forward characteristics as a function of temperature has 
the general appearance of Fig. 1.11. Points at the same current level have the 
same incremental resistance (except, of course, at very low voltages where e Vq/kT 
is not much greater than unity), so that the curves are essentially parallel. It 
turns out that for a fixed forward current, the forward voltage drop decreases by 
about 1.5 to 3 mv/°C. As a rule of thumb, a good average figure for temperature 
sensitivity is - 2.5 mv/°C. This determines the separation of the individual 
curves of the family shown in Fig. 1.11. 

PROBLEM 1.12 A diode has a forward drop of 0.6 v at 10 ma where the tem- 
perature is 25 °C. If current is held constant, what is the forward drop at 125 °C? 



75° 50° 25° 0° 




Fig. 1.11 Family of forward diode 
characteristics for different tem- 
peratures. At / = ^F l i a constant 
forward current, the curves are ap- 
proximately uniformly spaced for 
equal temperature increments. 



10 



Transistor Circuit Analysis 



Approximately what additional voltage is required at 125°C to increase current 
to 12 ma? 

Solution: At 125 °C and constant current, the diode forward drop decreases by 
(2.5 mv/°C) x 100 = 250 mv. The forward drop at high temperature is now only 
0.350v. 

Using the method of Prob. 1.11, r, = 3.5 0. The additional voltage corre- 
sponding to a current increment of 2 ma is 

AV = r t M = 3.5 x 2 x 10~ 3 = 0.007 v. 
There is a 7 mv increase in voltage. 



•V (Reverse bias) 




Fig. 1.12 Leakage components in a 
semiconductor: / s = saturation com- 
ponent due to minority carriers, lj_ = 
surface leakage component, 1]_t = 
total leakage. 



An additional component of leakage current not previously described corre- 
sponds to surface leakage along the semiconductor surface between terminals. 
Humidity and surface impurities contribute to this leakage component. The 
magnitude of the leakage is proportional to the reverse voltage applied across 
the junction, in contrast to the constant /. component. At low reverse voltages, 
the surface leakage component is negligible. 

Figure 1.12 shows the effect of reverse leakage on the diode characteristic 
curve. At low temperatures, the surface leakage components usually predomi- 
nate. At high temperatures, leakage resulting from thermal agitation becomes in- 
creasingly important. Because silicon requires more thermal agitation to gen- 
erate electron-hole pairs than does germanium, the saturation leakage of silicon 
is much less than for germanium. Surface leakage is therefore more important in 
silicon p-n junctions. 

PROBLEM 1.13 A germanium diode has a saturation leakage of 200 //a at 25°C. 
Find the corresponding leakage component at 75 °C. 

Solution: From Fig. 1.9, it is estimated that the leakage increases over the 
temperature range by a ratio of 20: 1. The high temperature leakage is therefore 
4 ma. 

PROBLEM 1.14 A silicon diode has a saturation leakage of 10 //a at 25°C. 
Find the corresponding leakage components at 75°C and 125°C. 

Solution: Again refer to Fig. 1.9. The leakage increase ratio is about 6:1, 
leading to a 60 ^aleakage at 75°C. At 125°C, leakage becomes 40x 10=400 //a. 

PROBLEM 1.15 A silicon diode operates at a reverse voltage of 10 v and has 
a total leakage of 50 /za. At 40 v, the leakage is 80 ^a. Find the leakage re- 
sistance R L and the leakage currents. 

Solution: The total leakage consists of a voltage-independent component / s , 
and a surface leakage component l L : 

Ilt = I S +I L , 
10 



50 fia = I s + 



R, 



(1.12a) 



80 tia = I a+ i°, 

Rt 



(1.12b) 



where R L equals the equivalent resistance corresponding to surface leakage. 
Now subtract (1.12a) from (1.12b) and solve for R L : 

30 M a=|°, i? L = — M a=lMn. 



Rr 



30 



Semiconductor Physics and Devices 



11 



Thus l LT = I„ + V/l Mft where V is the applied reverse voltage. We then 
solve for / s as follows: 

10 



50 fia = / s + 



1 



I a = 40 fia. 



The final expression is 



Ilt =(40+ V)(ia. 
The 40 n a component varies sharply with temperature, as previously discussed. 



When sufficiently large reverse voltages are applied, the potential gradient 
(electric field) across the p-n junction may measure in the hundreds of thousands 
of volts per inch. Such a gradient will impart a very high kinetic energy to the 
minority carriers normally flowing across the junction. Thus the minority car- 
riers, as a result of increased momenta, will collide with the atoms of the 
crystal with such a force as to release additional carriers, which in turn, are 

: accelerated by the gradient. An avalanche breakdown therefore occurs, and 
there is a very rapid increase in current for slight increases in reverse voltage 

^(Fig. 1.8). But as long as the allowable junction power dissipation is not ex- 

. ceeded, the diode can operate in the avalanche breakdown mode without damage. 

: This characteristic makes the avalanche or Zener diode suitable for voltage 
regulating circuits. 

True Zener breakdown refers to the disruption of covalent bonds because of 

: the presence of a high electric field. In practice, however, the diode generally 
breaks down because of the avalanche effect. 



PROBLEM 1.16 A diode breaks down under a reverse voltage of 40 v. A 60 v 
battery is applied to the diode through a 1000 ft resistor. Find the power dissi- 
pation at the junction. 

Solution: The diode drop is 40 v, leaving a 20 v drop across the resistor. The 
current, by Ohm's law, is 20/1000 = 20 ma. The p-n junction dissipation is 40 v x 
20 ma = 0.8 w. 

PROBLEM 1.17 A diode is in series with a 100 ft resistor and a 2 v battery 
(Fig. 1.13a). Find the circuit current and show, qualitatively, the effect of in- 
creased temperature.* 

Solution: The problem is easily solved by superimposing a load line corre- 
sponding to the 100 ft resistor on the diode forward characteristic. The graphi- 
cal solution of Fig. 1.13a, as shown in Fig. 1.13b, is much easier to obtain than 
an analytical solution based on (1.7). The load line is drawn with a slope of 
magnitude 2v/20 ma = 100 ft. The load line intersects the diode characteristic at 
point P, which is the operating point. From the curve it is estimated that the 
diode voltage = 0.6 v and diode current = 14 ma. At higher temperatures, the char- 
acteristic curve shifts to the left and the operating point is located at P '. 



The diode may be conveniently represented for analytical purposes by the 
Jbtraight-iine piecewise linear approximation of Fig. 1.14. The slope of the 
gitraight-line approximation corresponds to r t , the average forward resistance in 
die vicinity of the operating current This straight line intersects the horizontal 
pods -at E, the voltage corresponding to the battery of the equivalent model. For 
flatious temperatures, the straight line portions are parallel. 




(a) 



Increased 
temperature 



Forward 
characteristic 




(b) 

Fig. 1.13 Graphical solution of 
Prob. 1.17. 




f 1 



V (forward bias) 



Fig. 1.14 Forward characteristi c of 
diode approximated by two-line seg- 
ments (piecewise linear approxima- 
tion). The equivalent model is a bat- 
tery in series with Vp , as long as 
there is substantial forward 
conduction. 



*In this and the following problems, the diode is operated as a forward-biased device. 



12 



Transistor Circuit Analysis 




0.184 0.210 

K, volt — »»- 26 mv 
(a) 

10Q 
WAr 



0.5v 



J 



(b) 






io 12 
-W\r 



0.184v 



.26 mv 



.0.5 v 



• 10ma 
= 2.6fl 



(c) 



Fig. 1.15 Solution to Prob. 1.18. 
(a) Diode characteristics, (b) cir- 
cuit, and (c) equivalent model. 



10 




0.134 0.184 0.210 
V, volt — »» 

Fig. 1.16 Idealized diode charac- 
teristic showing effect of 20°C 
rise in temperature. 



PROBLEM 1.18 A diode having the characteristics of Fig. 1.15a is energized 
as shown in Fig. 1.15b. Calculate the forward current. 

Solution: The diode equivalent circuit used to calculate the current is given in 
Fig. 1.15c. Current is (0.5 - 0.184)/(10 + 2.6) = 25 ma. This analysis maybe 
compared with the graphical method of Fig. 1.13. 

PROBLEM 1.19 In Prob. 1.18, show the effect of a 20 °C rise in temperature. 

Solution: A 20 °C rise in temperature means a 50 mv (20 °C x 2.5 mv/°C) shift 
to the left in the diode forward characteristic. This is shown in Fig. 1.16 as a 
shift in the idealized characteristic. The high temperature current is 



0.5-0.134 
10 + 2.6 



= 29 ma. 



Actually, r t is somewhat reduced at this higher current, but the error in neglect- 
ing this is small. 

PROBLEM 1.20 A germanium diode, for which saturation current / s = 10 //a, 
is conducting 2 ma at room temperature. What is the forward voltage drop? 

Solution: Use the diode equation (1.7) and solve for voltage drop. We have 



l=I s (e kT -1). 



[1.7] 



Substituting numerical values, 



2x 10~ 3 = 10- 5 [e 0026 _1] or 

Taking the natural logarithm of both sides, 
V 



199 x 10 -5 = e 0026 . 



0.026 



5.31, V = 5.31x0.026 = 0.14 v. 



PROBLEM 1.21 A diode with 10 /xa saturation current is in series with a 100 fi 
resistor. What current is developed with an applied voltage of 0.220 v? 

Solution: The problem is solved by trial and error. Assume a series of values 
for V, the voltage across the diode itself, typically between 0.1 v and 0.2 v. Let 
kT/q= 0.026v. Compute / using (1.7). To the IR drop across the 100 Q, resistor, 
add the assumed V to establish a figure for applied voltage. Interpolate (perhaps 
graphically) to find where the calculated applied voltage equals the actual ap- 
plied 220 mv. This occurs for / = 1 ma, with a 120 mv drop across the diode. 
(Problems of this kind are very well suited for solution on a digital computer.) 



PROBLEM 1.22 

22 ma current? 



In 



the preceding problem, what is the applied voltage for a 



Solution: The solution to this problem is direct. The IR drop is 2.2 v. Since 
/ and / s are known, the diode equation is readily solved for diode voltage, 0.2 v, 
corresponding to a total applied voltage of 2.4 v. 

1.4 The Transistor 

The previous section describes the behavior of the p-n 
junction diode as a rectifying device. Consider now two p-n junctions, /, and /,, 
as in Fig. 1.17. Junction / t is forward-biased so that majority carriers (in this 
case, electrons) flow from n- to p-material. Junction /, is reverse-biased, so that 
only /, is flowing. If we now combine these junctions and make the p-region very 



Semiconductor Physics and Devices 



13 



thin, so that majority carriers do not recombine with holes to any appreciable ex- 
tent, then these majority carriers are almost all accelerated to the right by the 
barrier potential of /,. If we call a the ratio of current going through /, to the 
" current going through / |( 

The holes that do recombine with the few electrons in the p-region are sup- 
■ plied by I B . Since a is close to but less then unity, Ib is almost entirely trans- 
ferred to the right-hand junction. Because these carriers are accelerated by the 
i/, barrier potential, which can be high, this current can flow through a high ex- 
eternal resistor to produce voltage amplification. 

I The three-layer device described is called a function transistor. The equilib- 
|SiUm conditions previously mentioned occur automatically at each junction. Fig- 
lire 1.18 shows the two junctions biased so as to produce transistor behavior for 
Poth the n-p-n and p-n-p cases. The emitter-base junction is forward-biased and 
phe base-collector junction is reverse-biased for ordinary amplifier operation. For 
|J|mi-P transistors, holes flow from emitter to base, and electrons from base to 

fitter. This is the typical flow of majority carriers characteristic of forward- 
ised diodes. 
In all cases, the emitter current l B is equal to the sum of base and collector 

If; In practical junction transistor design, very few impurities are introduced into 
flae base, so that the base has relatively few electron charge carriers compared 
m> the large number of hole charge carriers of the emitter (p-n-p device). In addi- 
pon, the base is made quite thin. Both of these factors tend to minimize recom- 
&nation in the base. Because the current flow from base to collector occurs across 
M relatively high reverse bias, the power obtained in the collector-base circuit is 
ponsiderably higher than the power in the base-emitter circuit. This power gain, 
properly exploited, is the basis for the amplifying properties of the transistor. 
m Figure 1. 19 shows a p-n-p transistor in the so-called common-base connection; 
p,e., the base is common to both the emitter and collector circuits. 





vvv II 

9 




— < 


n 


P 


> 



(a) 
R 2 

-WV 1 



s) 



< p 



J 2 

(b) 

I B= I E ~ l C 
R l 1+ 1+ Rl 

r-wv — 'rT^r — v ^~i 




Fig. 1.17 Juxtaposition of two p-n 
junctions to make a transistor, (a) 
Junction /, is forward-biased, (b) 
junction J 2 is reverse-biased, and 
(c) an n-p-n junction transistor. 



Emitter 




Collector 



-o + + o- 



Emitter 




Collector 



-o- 



(a) n-p-n 
Fig. 1.18 A junction transistor showing flow of currents in normal amplifier operation. 




vii r\j 



V E E 



'cc 



Fig. 1.19 Common-base connection of a p-n-p transistor. Lower case letters 

represent small-signal components of voltage and current superimposed on 

steady d-c bias components. 



14 



Transistor Circuit Analysis 




0.99 0.98 0.97 0.96 0.95 



Fig. 1.20 Variation of /S with a. 
Note that large changes in j8 cor- 
respond to small changes in oc. 



Voltage gain = 



PROBLEM 1.23 The transistor in the common-base circuit of Fig. 1.19 has a 
current gain of a. Determine voltage gain and power gain with respect to small- 
signal input variations. 

Solution: The transistor input resistance R, is related to the low forward re- 
sistance from emitter to base. The load resistance R L in the reverse-biased col- 
lector circuit can be quite high. Thus, 

Input voltage = v, = i a R, , 

Output voltage = v e = i e R Li 

Power gain =» current gain x voltage gain = a 1 _ 

R,' 

While the common-base circuit offers a less than unity current gain, it can 
provide high voltage and power gain. Other transistor connections, discussed 
later, can also provide large current gains. 

The current gain p may be defined as the ratio of collector current to base 
current: 

PROBLEM 1.24 Derive a formula for /3 as a function of a. 
Solution: Start with the defining relationships: 

Ie=Ib + Ic, Ic = <xl E , = ^-. 

Substituting l c /ai for l R , and I B » / c //3, we obtain for l B - l B + I c , 

— =— +/ c or CC=- P 
Therefore, ^ 



(1.15) 



l + j 8 



l-a 



(1.16) 



PROBLEM 1.25 A transistor has an a of 0.98. For an emitter current of 2 ma 
calculate the base current I B . Also calculate /3 = / C // B . 

Solution: For the stated conditions, collector current equals 0.98 x 2 = 1.96 ma. 
The difference between emitter and collector is necessarily the base current of 
40 pta. Therefore, 



fl = £c = L96 
/„ 0.04 



= 49. 



PROBLEM 1.26 Sketch the curve of /3 vs. a for a between 0.95 and 1. 
Solution: Calculate points using the formula ft = <x/(l - a): 

_a jS 

0.95 0.95/0.05 = 19 

0.96 0.96/0.04 = 24 

0.97 0.97/0.03=32 

0.98 0.98/0.02 = 49 

0.99 0.99/0.01 = 99 
1.00 1.00/0 = oo 

The curve is plotted in Fig. 1.20. Note the sharply increasing current gain as 
a = 1. A transistor with an a of 0.99 has three times the ft of a transistor with 
an a of 0.97. 



Semiconductor Physics and Devices 



15 



PROBLEM 1.27 A transistor has a jS of 60. Find a. 
Solution: Start with the equation /3 = a/(l - a). Solve for a: 

a = /3- 0tj8, 



1 + /3 



(1.17) 



Substitute j8 = 60, and solve for a: 



a = ^ = 0.984. 
61 



The point may be estimated from the curve of Fig. 1.20 as a a 0.98. 



1 .5 The Ebers-Moll Model of the Transistor 

We are now in a position to develop a general model of 
the transistor applicable to forward- and reversed-bias conditions, and adaptable 
to a-c as well as d-c conditions. The Ebers-Moll model, in effect, presents the 
transistor static characteristics derived from previously developed concepts in 
convenient form. Although the Ebers-Moll model will later be expanded to cover 
high-frequency characteristics, for the moment its use will be confined to low 
frequency where capacitive effects are negligible. The low-frequency model is 
the starting point for the development of a variety of equivalent circuits and their 
analyses in succeeding chapters. 

The following relationships have already been derived: 



-I. (e*"4 



/ = /. (e tT -ll, [1-7] 

It is obvious that since the transistor is essentially a symmetrical device, a cor- 
rect model must likewise exhibit this symmetry. From the point of view of the 
model, either outer terminal relative to the base could be the emitter, with the 
remaining outer terminal the collector. Whether a terminal is forward- or reverse- 
biased depends on whether it is the emitter or collector. 

The following equations cover the symmetry conditions described above: 



/ qVbb \ 



Ief = Ibs 

Ier = - Q-r Icr> 

IcF = - CCjf l|!Fi 

*vbc 

'cs ■ Ics 



I qV B C \ 



(1.18a) 
(1.18b) 
(1.18c) 

(1.18d) 



Using the notation of Fig. 1.21, the conditions defined by these equations are 
depicted on the Ebers-Moll model of Fig. 1.22, which also defines the symbols. 
The representation of the polarities of the separate components of current and 
voltage is particularly important. As indicated, the model defines the transistor 
static characteristics, and applies to all polarities of bias conditions. 

Since the transistor is usually used with a forward-biased emitter junction, 
and a reverse-biased collector junction, the Ebers-Moll model may be simplified 
for this condition. This simplified model is particularly well-suited to the analy- 
sis of amplifier circuits. 




Veb 



Base, 
B 

-Q — 



' B \ 



V C B 



Collector, 
C 

— -Q 



(a) 




(b) 

Fig. 1.21 (a) Representation of 
n-p-n transistor showing stan- 
dard polarities of voltages and 
currents, (b) Alternate represen- 
tation of n-p-n transistor. 



16 



Transistor Circuit Analysis 



~lER= a RlcR 



a F I EF=~ICF 




EO •■ 



H4- 




* » 



>f- 



'CR 



-oc 



Fig. 1.22 The Ebers-Moll model of the transistor. 

Figure 1.23 shows such a model or equivalent circuit, adapted only to the 
specific set of bias conditions. For these conditions, 

a R 'ck « IefI 
therefore we neglect (X R / CR , and 

A small-signal equivalent circuit is one which depicts the response of the 
transistor to small-signal inputs appearing as small variations about the bias or 
operating points. The small-signal model is basic to the design of small-signal 
a-c amplifiers. 

The most useful forms of the equivalent circuit are the tee-, the hybrid, and 
the hybrid-7r models. The tee- and hybrid models provide a simple and direct 
representation of transistor behavior, and are readily suited to circuit calculation 
at audio frequencies. The hybrid-^ is useful for analyzing the performance of 
transistor amplifiers at high frequencies. 



I CS=IcBO 



EO 




OC 



EO- 



-WAr- 




e 



-oc 



a/ E 



Fig. 1.23 Ebers-Moll model with forward-biased emitter 
junction and reverse-biased collector junction. 



Fig. 1.24 Simplified tee-model with equivalent repre- 
sentation of emitter diode. 



'e 



EO- 







'b 



B 

Fig. 1.25 Equivalent tee-circuit 
with leakage current omitted. 



For the present, the tee-equivalent circuit will be developed. Referring to 
Fig. 1. 23, the input diode of the Ebers-Moll model can be replaced by the diode 
equivalent circuit of Fig. 1.24. This consists of an equivalent battery E, and an 
incremental resistance r,. Since the equivalent battery is, in effect, part of the 
d-c bias, it can be neglected in the incremental a-c equivalent circuit, leading to 
the further simplified model of Fig. 1.25. The leakage current component is also 
deleted. 

This equivalent circuit is a good practical representation of the small-signal 
behavior of the transistor biased for amplifier application. However, it can be 
refined somewhat to improve accuracy. 

As V C b is increased, more of the carriers injected into the base from the 
emitter reach the collector. Recombination in the base region is then reduced. 



Semiconductor Physics and Devices 



17 



Thus, collector current increases with V C b for constant Ie- This is equivalent 
to connecting a resistor across the current source, Ot /g. This collector resist- 
ance, r e , is defined by the equation 



AAA* — i 



d Vr. 



(1.19) 



'C r , . 

li£ B constant 

An increase in F CB causes an increase in emitter current for constant V EB . 
This feedback effect can be represented by a resistance r fa ' in the base lead. In 
addition, the ohmic or base spreading resistance r bb ' of the thin base region is 
also included in the base lead. Then the total base resistance r b = t b ' + r bb ' as 
in Fig. 1.26. Resistance r t is labeled r e , the emitter resistance. 



1 .6 Basic Transistor Amplifier Circuits 

There are three basic transistor circuits, namely, the 
common-base, the common-emitter, and the common-collector connections. Their 
configurations derive from the choice of the input and output terminals and the 
terminal common to both. 'In each of them, the basic bias conditions are satis- 
fied; i.e., the collector-base junction is reverse-biased, and the emitter-base junc- 
tion is forward-biased. (Of course in an actual circuit, the polarities of the bias- 
ing voltage depend on whether the transistor is p-n-p or n-p-n.) 

Figures 1.27-28 show the configurations of p-n-p and n-p-n transistor circuits. 
As will be illustrated by numerous examples throughout the book, each configura- 
tion has its own area of superiority in specific applications. 




Fig. 1.26 More accurate equivalent 

tee-circuit for the common-base 

connection. 




fr "t 



L 7¥ T T H T 



Common-base connection 

l c =al E 

(a) 



Common-emitter connection 



Common-collector or emitter- 
follower connection 



/c=/3/ B » 



a 



1-a 



(b) 



1-a 

(c) 



Fig. 1.27 Common circuit configurations for the p-n-p transistor. For the above, I E =I B + l c , a - Iq/Iei P ~ l c/ l B- 
The circuits are simplified. Bias and load resistors are not shown. 



IE 




h€5R' 




Vcc 



V B B - 

Common-base connection 

(a) 



Vbb 

Common-emitter connection 
(b) 




Vbb ~ v cc 



Common -col lector or emitter- 
follower connection 

(c) 



Fig. 1.28 Basic transistor circuits using an n-p-n transistor. 



18 



Transistor Circuit Analysis 




Characteristic curves relating transistor currents and voltages may be used to 
describe the behavior of each circuit. Typical characteristic curves for the^! 

eZ io:*:™** 10 " are Pr ° Vided by Fi8 ' U9 ' Corresponding sets ofcu^s 
exist for the common-emitter and common-collector connections. Note that^he 
common-base connection, collector current flows with v„ T 



V CB =0 




(b) 



Fig. 1.29 Common-base (a) output and (b) input characteristic 




(a) 



7wi>/ 



a) 




(c) 
Fig. 1.30 Leakage components for 



1.7 Transistor Leakage Currents 

nt , . , In transi stor circuits a problem arises from the variation 

of leakage currents with temperature in the collector-base junction. This leaka~ 
component ^analogous to diode leakage (Fig. 1.9). Since the emitter-base junc- 
tion is normally forward-biased, leakage current here is not significant. 

Figure 1.30 a-c shows the basic leakage current components. Current I co (as 
i is usually called) is the common-base leakage comment, and is more pre- 

crrcutted. Analogously. I EO rI EBO applies to the emitter-base junction when it 
is reverse-biased (not a normal condition) and the collector is open-circuited 

Now consider 1 cbo . This current varies as noted in Fig. 1.9 with temperature 
It is much more significant in relatively high leakage germaniu. "SoSST than 
m silicon transistors. As temperature increases, l CBO riees , and the junction 
wanner due to the increased current component. This, in turn, further increases 

«?£? ^T ^ t0 ^ UnStaWe C00diti0n known as th '™«l runaway (dis- 
cussed in detail in Chap. 6). Leakage current variation leads to shifts in the d-c 
operating or b ias point of the transistor, and can result in nonlinear operation. 

17"'; ^ SC COnnection ^Pen-circuited, is an important parameter, 

which can be expressed in terms of / CBO and fl. 



■=• ~~ PROBLEM 1.28 Find / 



tfie 



principal transistor configura- 



cbo a s a function of I CBn and B usins th» *».,.,;..*«. 
equation defined in Fig. 1.24, but including the l4age cutnt 7 C 
Solution: The basic equation 



1 cbo ■ 



tions. Since the emitter circuit is 

not normally reverse-biased, I EO 

is not signifi cant. 



IS 

tc = a l E + / 



CBO i 



l B = lc + h 



Therefore, 



'c=a(/ c +/ B ) + / Cfl o or f c (l- a ) = a/ fl +/ c 



BO- 



Semiconductor Physics and Devices 



19 



Solving for l c , 



lc = - — — Ib + I; ) Icbo- 

1 - a \l-a/ 



Since /3 = a/(l - a) and 1 - a = 1/(1 + j8), 

The first component is the output current resulting from l B , and the second com- 
ponent is IcEOt f ot the common-emitter configuration: 

There is an interesting graphical interpretation of the above expression. Re- 
fer to Fig. 1.31. Note that when l B = 0, l c = Icsoi when collector and base cur- 
rents are equal, l B = -I c = l CB o ( the emitter being open). 

PROBLEM 1.29 A transistor has an 1 C bo = 50 /ia when measured in the grounded 
base configuration. If /3 = 100, find / ceo . 

Solution: I CEO = (j8+ 1)/cbo = 101 x 50^5000 ^a, or 5 ma. 




CBO 



—tcBO ° 1 B — »- 

Fig. 1.31 Leakage components on 

an Iq vs. Ig curve. For /g = 0, 

only the IcEO leakage current 

flows. 



1 .8 Transistor Breakdown 

In a transistor the conditions for breakdown, when reverse 
voltage is applied from collector to base, correspond roughly to the breakdown of 
a diode under reverse bias conditions. Usually, breakdown is an avalanche ef- 
fect as previously described. However, when the base-emitter circuit is involved, 
the breakdown mechanism becomes more complex. 

Figure 1.32 shows l c under reverse voltage conditions which occur in tran- 
sistor applications. The figure defines the most significant breakdown condi- 







BVcbo 



BV CB0 



BV, 



CEO 



BV C ES 



Reverse voltage- 



Fig. 1.32 Breakdown voltages for different transistor connections; BVqer corresponds 

to breakdown voltage for a resistor i?j connected from base to emitter. This curve must 

lie between BV CE0 (R = <x>) and BV CES {R = 0). 



tions. Note that the reverse voltage breakdown across the collector-base junction 
is the highest of the several breakdown voltages, and may not be used safely as 
a voltage limit in most transistor circuits. The correct breakdown voltage rating 
depends on the circuit, and cannot usually exceed BV CBS , the breakdown voltage 
from collector to emitter with the base connected to the emitter. Voltage break- 
down is usually not harmful if current is limited, so that the junction does not 
overheat. Many voltage regulating devices depend on the voltage breakdown phe- 
nomenon for their behavior. Voltage breakdown of transistors will be covered in 
more detail in Chap. 7, as it is most important in power amplifiers. 



20 



Transistor Circuit Analysis 



Et> 




© C 



l CBO 



HEH 



«-* 



(tlr 



e 

-w- 



• o 



fB 



*B 



Fig. 1.33 Simplified d-c transistor 

equivalent circui t, common-base 

con fi gu ra ti on . 



(|8+l)/ C BO 




Fig. 1.34 Simplified d-c transistor 

equivalent circui t, common -emitter 

confi guration. 



1.9 D-C Models 

Let us briefly relate the tee-equivalent circuit (Figs. 1.22- 
25) derived from the Ebers-Moll model to the n-p-n transistor under static (d-c) 
conditions as shown in Fig. 1.33. The tee-equivalent circuit suggests, loosely 
speaking, the representation of the transistor as two back-to-back junction diodes. 
Output current includes two components, leakage current and amplified input 
a l E , as was previously explained. The forward-biased emitter circuit impedance 
varies substantially with input voltage, as shown in Fig. 1.29b. This impedance, 
because it is of such low value, is usually swamped by external resistances. The 
emitter is most conveniently dealt with analytically by assuming a constant volt- 
age drop of several tenths of a volt from emitter to base, and perhaps adding a 
small resistive component and working from input currents rather than input volt- 
ages. This is exactly analogous to the earlier study of diode circuits. For all 
except low collector voltages, the emitter-base characteristic is independent of 
collector voltages. 

The collector is always reverse-biased for normal amplifier operation. Its 
leakage current varies a great deal from transistor to transistor, and also with 
temperature, much as does the leakage current of the diode. At very low collector 
voltages and emitter currents, decidedly nonlinear transistor behavior occurs. The 
equivalent circuit parameters vary over a wide range. Notwithstanding this vari- 
ability, the tee-equivalent circuit is an invaluable aid in preliminary design, 
in visualizing the effects of changing external circuitry, and in the establish- 
ment of optimum circuit performance. Furthermore, the equivalent circuit itself 
provides a firm basis for the evaluation of the effects of these variations on over- 
all circuit behavior. The entire subject of transistor circuit biasing is closely 
tied to the study of the effects of changes in transistor characteristics and methods 
to minimize the effects of these changes on the operating point. Shifts in the 
collector current with changes in transistor leakage, with forward current gain a, 
or with bias voltage, constitute significant problems in the maintenance of a 
stable operating point. An orderly study of this topic is presented in Chap. 4. 

Figure 1.34 shows the d-c equivalent circuit for the common-emitter configura- 
tion. Note the leakage component (fi + l)/ CBO , which is the previously derived 
result. The base-collector current gain is /8. 



PROBLEM 1.30 The common base d-c equivalent circuit of an n-p-n transistor 
is shown in Fig. 1.35 driving a resistance load R L . Using the equivalent circuit, 
calculate the d-c input and output resistances, R t and R ol respectively. Neglect 
leakage current 1 C bo, and the small resistor r E shown in the emitter circuit. 

Solution: The basic equations required to find R t are 

Ve = -(.V B e +IbRb)> l=aI E , I B = (1 - a)I E . 
Referring to Fig. 1.35b and combining equations, 

V E _[(1- 0O/ £ R b + V bb ] 



R, 



-U 



-I, 



Ri = (1 - a) R B + 



U 



For this idealized configuration, output resistance R is infinite as long as Vcb 
is an effective reverse bias. Output current is, of course, a I E , regardless of R L . 



Semiconductor Physics and Devices 



21 





cc 



(a) «») 

Fig. 1.35 Common-base amplifier, (a) D-c circuit, and (b) equivalent model. 

PROBLEM 1.31 Analyze the circuit of Fig. 1.36 for input and output impedances 
(resistances), R t and R ot respectively. Neglect leakage components and the rela- 
tively small ohmic resistance in the base circuit. 




B O *\rW 



R< 



VbiTZT 



Re, 



(j3+i) I C BO 

-©- 



e 

|8/ B 



ic 



I E 



Rt 



b v cc 



(a) (b) 

Fig. 1.36 Common-emitter amplifier, (a) D-c circuit, and (b) equivalent model. 



Solution: From the equivalent circuit the basic equations are 



V B =V RB +R E l 



E *E i 



Combining equations, 



V c = Vcc-RlIc, / c = /3/b, / b = (j8 + 1)/b. 



V b = Veb + Re(P + 1)Ib- 



The input impedance R, is the sum of Veb/Ib and R E (1 + /3). It is characteristic B 
of this type of circuit which features moderately high input resistance. 

The output resistance, R =<», since the output current is supplied by an 
ideal current source. The output impedance is very high as long as the circuit 
biasing is correct. 



Ib 



*\ 



f 



ICBO 




a F / E 



1.10 TheHybrid-7T Equivalent Circuit 

The hybrid-n is an equivalent circuit configuration par- 
ticularly suited to high-frequency calculations. It may be derived from the Ebers- 
Moll model of Fig. 1.22 as shown in Fig. 1.37, and some physical considerations. 



Fig. 1.37 Simplified tee-equivalent 
circuit used as a basis for deriva- 
tion of hybrid-?/ equivalent circuit. 



22 



Transistor Circuit Analysis 



B Tbb ' 
O—VW 




6m v b'e 



I 




The hybrid-iT circuit is derived for the common-emitter configuration in Fig. 
1.38. Only the small-signal model is considered. The pertinent small-signal 
parameters are 

v b. 



I Sn ~ 



dv 



BE 



(1.21a) 



U m 



Fig. 1.38 Simplified representation 

of hybrid-77 equivalent circuit for the 

common -emitter connection. 




(1.21b) 

Note that lower case letters and subscripts are used for small-signal parameters. 
These small-signal relationships lead to the simplified equivalent circuit of Fig. 
1.38, in which l CBO and the d-c diode drops are not pertinent. In Fig. 1.38, B' 
represents a theoretical base point within the transistor, while B is the base 
terminal. The bulk resistance, r bb > , intervenes. This resistance component be- 
haves as a pttte ohmic resistance. 

The simplified equivalent circuit of Fig. 1.38 may be improved as shown in 
Fig. 1.39. The added resistors r b > and r c . are related to the increasing width 
of the collector-base junction depletion layer with increasing collector-base 
reverse bias. As the reverse bias voltage increases, the width of the base is 
effectively reduced so that a increases, while recombination in the base de- 
creases. The increase in collector current with voltage is represented by r co in 
Fig. 1.39. The reduced base current is achieved in the equivalent circuit by the 
feedback from C to B' through r b i e . 

Cft'c 



oc 



r bb 

bo — WV 



Fig. 1.39 More accurate hybrid-TT 
equivalent circuit forthe common- 
emitter connection. 




Oc 



O E 



Fig. 1.40 Hybrid-77 equivalent circuit incorporating capaci- 
tances for a more accurate representation of high-frequency 
characteristics. 

High-frequency features may now be incorporated simply by including capac- 
itances between collector and base, and emitter and base (Fig. 1.40). The ca- 
pacitances are excellent representations of effective capacitances actually 
appearing across the junctions. This high-frequency model is relatively unaf- 
fected by frequency over a wide and useful range. 

The capacitances appear primarily because the depletion layers themselves 
appear as capacitors. The widening of the collector-base depletion layer, for 
example, behaves like a reduction in capacitance.. This leads to transient cur- 
rents whose effects are represented very satisfactorily by the capacitors of 
Fig. 1.40. 

1.11 Supplementary Problems 

PROBLEM 1.32 Explain (a) kernel, (b) valence electron, (c) excitation level, 
and (d) free electrons. 



PROBLEM 1.33 Explain the meaning of holes in semiconductors. 



Semiconductor Physics and Devices 23 



PROBLEM 1.34 What is the significance of electron-hole pair generation? What 
are its main causes? 

PROBLEM 1.35 Define majority carrier and minority carrier current components. 

PROBLEM 1.36 For kT/q= 0.026 v and a saturation current of 10 fia, plot / 
from v = -5 to.v = +l. Use (1.7) and suitable increments to obtain a smooth 
curve. 

PROBLEM 1.37 For a germanium diode, / s = 0.0005 a at 25°C, determine the 
leakage current at 75°C. 

PROBLEM 1.38 Find the incremental resistance of a diode at room temperature 
(25°C) with a forward current of 1 ma. 

PROBLEM 1.39 Explain the behavior of a p-n junction which is (a) back-biased 
and (b) forward-biased. 

PROBLEM 1.40 In a transistor in the common-base connection, i b = 0.1 ma and 
i c = 5 ma. Determine Ot and fi. 

PROBLEM 1.41 Why is the current gain of a transistor in the common-base con- 
nection always less than unity? 

PROBLEM 1.42 Why is the voltage gain of the common-collector circuit always 
less than unity? 

PROBLEM 1.43 For/ CBO = 10 ^ain the grounded base configuration and £= 50, 
find I ceo- 

PROBLEM 1.44 Show the directions of all currents in a p-n-p transistor for the 
three common connections. 



2 

CHAPTER 



TRANSISTOR 
CIRCUIT ANALYSIS 



V CE 



BO 




o c 



Fig. 2.1 Voltoges and currents in 
a p-n-p transistor. 




Fig. 2.2 Comm 
sistor circu 



i-base n-p-n 
/?L is a loa 
tor. 



CC 



tran- 
d 



2.1 Characteristic Curves 

The static characteristic curves of the transistor define 
the steady-state relationships among its input and output currents and voltages. 
The curves are easily obtained by means of d-c measurements, and provide: 

1. The basis of graphical design procedures. 

2. A description of transistor performance under nonlinear conditions. 

3. The starting point and final reference in the development of analytical pro- 
cedures. 

The characteristic curves thus constitute the basis for understanding transistor 
operation. 

The transistor is a three-terminal device that in general has six variables 
comprised of three currents and three voltages as shown in Fig. 2.1. Since any two 
currents or any two voltages determine the third respective quantity, the actual 
number of variables is reduced to four. If any two of the four variables are speci- 
fied, the remaining two are automatically determined. 

Now in general terms, let x, and x t be a pair of specified independent varia- 
bles, and y, and y, be the automatically determined dependent variables. Mathe- 
matically, 






(2.1) 
(2.2) 



where /, and /, are the functional relationships between the independent and de- 
pendent variables. 

To graphically describe y, and y 2 , we require a separate family of curves for 
each. Thus, two families or sets of curves are necessary for a complete steady- 
state description of the transistor. From the two sets of curves, all other possible 
curves may be derived. 

The choice of the two independent and two dependent variables from the six 
possible transistor variables is a matter of convenience. It may depend, for ex- 
ample, on which sets of curves are easier to use than others, or on the particular 
transistor under investigation. In general, it is most convenient to ascribe one 
set of curves to the transistor input, and the other to the transistor output. Thus 
for the common-base configuration of Fig. 2.2, V EB is plotted versus the inde- 
pendent variable l B for various values of the second independent variable V CB 
as shown in Fig. 2.3a. The output collector current / c is plotted versus the same 
independent variables l E and V CB in Fig. 2.3b. This figure constitutes the col- 
lector family of curves. 

The preferred choices of variables have become somewhat standardized by 
manufacturers who wish to present their data in the manner most suitable for use. 
Characteristic curves such as the ones illustrated by Fig. 2.3a are especially 



24 



Transistor Circuit Analysis 



25 



1.0 



0.8 



-o 0.6 



IB 

^ 0.4 



0.2 





























V CB = 




p 










V CB >U 































2 4 6 8 10 12 14 

1 E , ma ►- 

(a) 



10 y 1 






1 




10ma 
















8m a 
















6 ma 


6 r 














1 














4ma 


** 
















2 














2ma 


»• 




























7 E = 



10 15 20 25 30 35 

V CB , volt fr- 

(b) 



Fig. 2.3 Common-base (a) input and (b) output characteristi cs of the 2N929 transistor at room temperature. 



convenient, because the independent variable is essentially a function of only 
one dependent variable, in this case, the emitter current l E . Curves such as those 
of Fig. 2.3b, which are uniformly spaced parallel straight lines over most of the 
useful transistor operating range, provide a basis for linearizing transistor param- 
eters and simplifying circuit analysis. 

Static characteristics are directly obtainable by means of elementary methods. 
Figure 2.4 shows how common-base parameters are measured. The collector-base 
voltage and emitter current are the independent variables; the collector current 
and base-emitter voltage are the dependent variables (see Fig. 2.3). 

Analogous to the common-base configuration of Fig. 2.2 and its curves of 
Fig. 2.3 are families of curves particularly descriptive of the behavior of the com- 
mon-emitter and common-collector configurations. As with the common-base con- 
nection, the circuit characteristics of the latter are conveniently described by 
static characteristic curves as in Figs. 2.5-6, respectively. Note that the char- 
acteristics - although shown to different scales - are essentially identical be- 




Fig. 2.4 Simple d-c circuit for ob- 
taining the curves of Fig. 2.3. 
Shown is a common-base connec- 
tion for a p-n-p transistor. With an 
n-p-n transistor, the polarities of 
all voltages and currents are 
reversed. 



1.0 



0.8 



^ 0.4 



0.2 

















P_^~ 










. v 


CE - lv 

v CE =o 













































100 200 300 400 500 600 700 
I B , fta ► 

(a) 




(b) 



Fig. 2.5 Common-emitter (a) input and (b) output characteristics of the 2N929 transistor at room temperature. 



26 



Transistor Circuit Analysis 



1.0 



0.8 



i0.6 

o 

> 



w 
5?0.4 



0.2 















V CE >lv 


P-^ 




V 


r CE = _ 



















20 



40 
, pa- 
rt 



60 



80 



cause I E = l c , and that the curves completely define transistor circuit behavior 
under d-c or low-frequency conditions. Figure 2.7 shows how the curves of Fig. 
2.5 may be determined experimentally. 



2.2 The Operating Point 

In normal operation of a transistor circuit, as for example, 
in a linear amplifier, currents and voltages are applied to the transistor to estab- 
lish a bias or quiescent operating point in the linear region of the output charac- 
teristics (e.g., point P, Fig. 2.5b). In this region variations in input (base current) 
lead to proportional changes in output (collector current). The proportionality 
constant represents a current gain - comparable to /3 in Chap. 1 - that can be de- 
termined from the characteristic curves. By means of this constant as well as 
other similar ones applicable in the linear regions, the transistor may be analyzed 
using a linear equivalent circuit or model, just as in the case of a vacuum-tube 
device. 




<fp, lg=4.Slla 



20/te 



-15fia 



10/Ua 



S/ia 



/n = 



5 10 

V EC , volt 

(b) 



IS 



20 



PROBLEM 2.1 The tabulation below lists sets of values of given transistor cur- 
rents and/or voltages. Verify by inspection of the curves of Figs. 2.3 and 2.5 
that the currents and/or voltages are consistent.* 

V CB = 3 v 



l E = 3 ma 



l B = 10 ma 
I E = 10 ma 



/« = 



I B = 30 fia 
l B = 10 pa 



V CB = 20 v 



V CB = 5 v 



V CB = 20 v 



V CE = 20 v 



' CE 



= 30 v 



V EB = 0.57 v Fig. 2.3a 

l c = 10 ma Fig. 2.3b 

I c = 10 ma Fig. 2.3b 

/ c = Fig. 2.3b 

l c = 8.5 ma Fig. 2.5a 

l c = 3 ma Fig. 2.5a 



PROBLEM 2.2 Given the common-emitter characteristics of Fig. 2.5, and I B = 
20 fxa, and V CE = 20 v, find the collector current and the base-emitter voltage 
drop. 



Fig. 2.6 Common -co I lector (a) input 
and (b) output characteristics at low 

ba " CU a7roo°m 11™™^°' * , ." t '™ , *** P * ** 2 * ^ ^ base-emitter voltage drop V BE = 0.58 v. 

Point P of Fig. 2.5b shows the collector current I c = 5.4 ma. 

PROBLEM 2.3 For a common-collector configuration using the 2N929 transistor, 
V EC = 2 v and l E = 0.6 ma. Find the collector current l c and the base-emitter 
voltage drop V BE . 

Solution: Use the common-collector characteristic curves of Fig. 2.6. (Note 
that if common-collector curves are unavailable, common-emitter curves are almost 
identical for most transistors.) In Fig. 2.6b, operating point P is located. By 
interpolation, l B = 4.5 fia (between the l B = and 5 pa curves). Thus, l c = 0.6 ma. 

In Fig. 2.6a, point P is located corresponding to l B = 4.5 n a, and V CE > 1 v. 
The base-emitter drop is found to be V BB = 0.53 v. 

PROBLEM 2.4 The operating point of a common-emitter circuit using the 2N929 
transistor is I c = 5.6 ma, and V CE = 20 v. Find l B , V BE , V CB , and l E . 




Protective 
resistor 



Fig. 2.7 Simplified d-c circuit for 
obtaining the curves of Fig. 2.5. 



"The characteristic curves of the Jesas Instrument 2N929 n^p-n silicon transistor are used for most 
or tne problems in this chapter. 



Transistor Circuit Analysis 27 

Solution: Use the characteristic curves of Fig. 2.5b to locate point P l at V CE = 
20 v, / c = 5.6 ma. By interpolation, I B = 21.5 fja. From Fig. 2.5a, V BE = 0.585 v. 
By summing voltages, 

V CB = V CE - Vbe = 20 - 0.585 = 19.42 v. 
Since the algebraic sum of the three transistor currents must equal zero, 

1e = Ic + Ib = 6.02 ma. 
This analysis gives all six parameters of the operating point. 

PROBLEM 2.5 For a common-base connection using the 2N929 transistor, l c = 
5 ma and V CB = 5 v. Determine the remaining four voltage and current parameters 
for the operating point. (Note that in most data sheets only common-emitter curves 
are provided by the transistor manufacturer. Therefore use only the common-emitter 
curves of Fig. 2.5 to solve this problem.) 

Solution: Start by estimating that for the conditions of this problem, V BE lies 
between 0.5 v and 0.6 v. Therefore, for V CB = 5 v, Vce = 5.6 v. For V CE = 5.6 v 
and lc = 5 ma (given), from Fig. 2.5b, l B is estimated at 20 /za (point P 2 ). 
For l B = 20 fua and V CE > 1, V BE = 0.58 v in Fig. 2.5a. More accurately: 

V CE = V B e + V CB = 5.58 v, 

l E =lc +'b = 5.0 ma + 20 /xa = 5.02 ma. 

All parameters are known. 



The preceding examples illustrate how calculations may be made using any 
available family of curves. Often, however, a particular set of curves leads to 
greater accuracy or convenience in a specific problem. In carrying out the above 
and other calculations, the following points are worth remembering: 

1. The emitter and collector have nearly the same current. Typically, 99% of 
the emitter current flows in the collector circuit. For this reason, it is usually 
important to specify base current, and either collector or emitter current. 

2. Base-emitter current increases very rapidly with increasing base-emitter 
voltage. The base-emitter current is, in effect, the forward current of a diode. 
Excessive base-emitter voltage overheats the base-emitter junction and may burn 
out the unit. It is important to control base current and not apply low impedance 
voltage sources to the base-emitter circuit. 



2.3 The Load Line 

Transistors, of course, are not used as isolated elements. 
They are usually operated in essentially resistive networks where resistors are 
employed in biasing circuits to establish an operating point for the transistor, and 
as load elements. In a-c applications, capacitors are generally used to isolate 
d-c signals while permitting a-c signals to pass. The combining of transistors and 
resistors presents no special problem, because the current flow through the re- 
sistors determines their corresponding voltage drops, as well as the voltages ap- 
pearing on the transistor terminals. 

The graphical treatment of transistor circuits makes use of the concept of the 
load line. Consider, for example, the output or collector characteristics of a typi- 
cal common-emitter transistor circuit shown in Fig. 2.8. Assume a collector volt- 
age supply Vcc in series with a load resistor Rl- A straight line may be super- 
imposed on the collector characteristics corresponding to the volt-ampere charac- 



28 



Transistor Circuit Analysis 



teristic of the battery-resistor combination. The slope of the load line represents 
the voltage-current characteristic of resistance R L . The equation for the load 
line is 



Vgb**V cc -IcRi,< 



<2.3) 



Setting l c = in (2.3). V CB = V cc ; setting V CB - 0, l c . V CC /R L . These two 
points or intercepts define the load line whose slope equals -1/R,. If /. . / 
at point P, the quiescent operating point is defined. Figure 2.8 also shows load* 
lines (dashed lines) for increased V cc , and increased V cc combined with reduced 
R L . The quiescent point corresponds to the given base current. 

Figure 2.9 provides a numerical illustration of the use of the load line. The 
supply voltage V cc - 30 v and R t = 5000 fi. The load line is superimposed on 
the collector characteristics. The horizontal intercept occurs at l c - and equals 
30 v; the vertical intercept occurs at V CB = and equals 30 v/5000 Q = r>ma. 
The figure also shows the load line for V cc = 10 v and R L =.- 2000 fl. 



Increased V cc , 
Reduced R L 





Fig. 2.8 Load lines superimposed on transistor collec- 
tor characteristics for the common -emitter connection. 



Fig. 2.9 Graphical analysis using the load line. 



PROBLEM 2.6 A common-emitter circuit using the 2N929 transistor has a load 
resistance R L = 5000 Q in the collector circuit; V cc = 30 v, 7 C = 3.7 ma. Find 
Ib> V ce , l E , and V BE . 

Solution: The set of curves in Fig. 2.9 shows a superimposed load line repre- 
senting the voltage-current characteristic of the collector circuit resistor. At 
l c = 3.7 ma, l B = 15 ^a, and V CE = 11.6 v. Hence, I E = / c + I B = 3.7 + 0.015 = 
3.715 ma. 

From Fig. 2.6a, which is applicable to the 2N929 transistor, V BE = 0.57 v 
for V CE > 1 v, and I B = 15 /za. 

Note that both voltage across the load resistor and the collector current can 
be much larger than V BE and I B , indicating the possibility of large current, volt- 
age, and power gains for the common-emitter circuit. 



The load line approach is simpler to use at the transistor input whose charac- 
teristics are nearly independent of collector voltage. The load line establishes a 
simple intersection with the significant input characteristic to determine the 
operating point. Figure 2.10 shows the manner in which base current is deter- 
mined from a given voltage and resistance in the base circuit. The parameters in 
question are indicated. 



Transistor Circuit Analysis 



29 



1.0 



0.8 



W 
(I) 
&. 0.4 



0.2 

























V CE >U 
V CE =0 


2N929 










I B - 


R,= 


!»0. 




\ 

\Load 
\line 


V, = l 


V - 


k 1 ~ 

Vbe 

1 


V^CE 
>lv 












(b) 







50 100 150 200 250 300 350 

1 B , (Ja p* 

Fig. 2.10 Base circuit load line. 




15 20 25 

V CB , volt »- 



30 35 



Fig. 2.11 Common-base characteristics with superim- 
posed load line. 



PROBLEM 2.7 For a common-base connection using the 2N929 transistor, V cc = 
25 v, I c = 3 ma, and R L = 5000 Q. Find l B , V BE , and V CB . 

Solution: Refer to Fig. 2.11. Draw a load line corresponding to the 5000 fi load 
resistance. For l c = 3 ma, V CB = 10 v corresponding to point P. Emitter current 
I E = 3 ma. From Fig. 2.3a, which is applicable to the present problem, V BE = 
0.57 v. 

It is worth noting that since 1 B and / c are almost equal, current amplification 
does not occur in the common-base configuration. Because of the higher impedance 
level of the output collector circuit, voltage gain can be realized. 

PROBLEM 2.8 For the common-collector configuration of Fig. 2.12a using the 
2N929 transistor, V EE = 30 v, l E = 3.7 ma, and R L = 5000 fi. Find l B , l c , V BE , 
V, , and V . 



10 




E 
W 









**3Stla 


1 
30; 


la 

35, 


1SL 














2 Op 














15fia 










P^ 








10/la 














/ B = o 









(o) | 

o r i i i i 

5 10 15 20 25 

V ECl volt »- 

(b) 

Fig. 2.12 (a) Elementary common-collector amplifier, (b) Common-collector output char- 
acteristics with superimposed load line. 



30 35 



30 



Transistor Circuit Analysis 



Solution: Refer to Fig. 2.12b for the load line construction. From the load line, 

V EC = U.6 V , 
Ib = 15 fja , 

V BE = 0.57 v (from Fig. 2.6a), 
V = 3.7 ma x 5000 = 18.5 v, 
V, = 3.7 ma x 5000 + V BE = 19.07 v. 



Note that for the common-collector (emitter-follower) circuit, V is always 
somewhat lower than V,. There is no voltage gain. The input current l B is much 
smaller, however, than the output current l E . This configuration is essentially a 
current amplifier with less than unity voltage gain. 



IN 




"ig. 2.13 Elementary common- 
emitter amplifier. 



2.4 Small- and Large-Signal A-C Circuits 

Refer to the basic common-emitter circuit used as an a-c 
amplifier in Fig. 2.13. The input coupling capacitor blocks d-c signals but per- 
mits transmission of a-c signals. In effect, relatively small a-c signals con- 
stitute a perturbation or small modification to the bias point. 

Figure 2.14 shows the load line superimposed on the collector characteristics 
of the 2N929 transistor. When a bias point is chosen in the center of the transis- 
tor's linear region, the output-to-input ratio with moderate signal amplitudes is 
constant and may be expressed as a gain. To determine this gain, we need only 
to vary the input by a small amount about the bias point and determine the cor- 
responding variation in output. The transistor parameters associated with small- 
signal excursions about the bias point, usually in the linear region, are referred to 
as small-signal parameters. Small-signal parameters actually vary somewhat with 
the bias point, even in the linear region. 

PROBLEM 2.9 Given the common-emitter transistor amplifier of Fig. 2.13, ca- 
pacitor C presents negligible impedance to a-c. Resistance R B is adjusted so that 
l B = 15 /za. An input a-c current having a 5 /xa peak-to-peak (p-p) amplitude is im- 
pressed at the input terminals. Using point-by-point graphical construction, plot 
i B (f). Also repeat for a 30 ^a p-p input current amplitude. 

Solution: The required graphical construction is developed from Fig. 2.14. The 
intersections of the load line with the collector family of curves leads to the l c 
vs. l B transfer characteristic of Fig. 2.15. The small and large sinusoidal base 
currents are shown superimposed on the 15 fi a quiescent current. Observe the 
clipping of the output, resulting from the large amplitude input current, which 
drives the transistor into the nonlinear region. 



Largersigaai parameters are based on the static d-c characteristics of the 
transistor over the fall operating range, including nonlinear regions. As a result, 
they vary substantially with signal amplitude. Large-signal behavior is important 
in d-c amplifier design, in the design of biasing circuitry, in switching applica- 
tions where the transistor is intentionally driven into nonlinear regions, and in 
power amplifiers where large signals are permitted, with distortion maintained 
within tolerable limits. 



Transistor Circuit Analysis 



31 



£ 

» 4 
o 



r 


^ — 






25 ^-a 






y~~ 






^ 










20 Ma 
15 /ia 




r 








< 
^ 




PS, 






10/ia 














5/xa _ 


J B =0 


k 









10 



15 



'CE> 



20 
/oh 



25 



30 



40 



Fig. 2.14 Common-emitter output characteristics 
with superimposed load line. 



PROBLEM 2.10 For the common-emitter circuit using the 2N929 transistor with 
a 5000 Q load and V cc = 30 v, find: 

(a) I B needed to operate at /c = 5 ma. 

(b) The power P c dissipated in the collector junction. 

(c) The d-c voltage V L across the load, and the power P L dissipated in the 
load resistor. 

(d) The input d-c power P B to the base. 

(e) The variation in the parameters l c , V CE , and v l if 1 b is decreased by 
5 fia. 

(f) The variation in the parameters V BE , P B , and P L if l B is decreased by Fig. 2.15 Collector current variation 




-L 



40 



i B , 30^(a 
Peak-to-peak 

Time 



5 iia. 

Solution: (a) Refer to Fig. 2.16. Draw the load line corresponding to 5000 Q. 
At l c = 5 ma, I B = 20 /*a. 

(b) D-c power is current multiplied by voltage. From Fig. 2.16, V CE = 5.3 v, 
I c = 5 ma, and P c = 26 mw. 

(c) The power P L =IcRl = 125 mw. The voltage V L = 30 v - 5.3 v = 24.7 v. 

(d) The power P B = V BE l B . From the applicable curve of Fig. 2.17, V B = 
0.58 v. Hence, P B = 0.58 x 20 x 10 -6 = 11.6 jzw. 

(e) Since l c must remain on the load line of Fig. 2.16, the new operating 
point must be at the intersection of the load line and the l B = (20 - 5) or 15 pa 
characteristic. From this new operating point, it is found that 



with sinusoidal base current drive. 
Note the large-signal distortion re- 
sulting from saturation. 



0.7 



0.6 



0.5 



0.4 







0.3 



0.2 



0.1 





Slope | 
2.2mv/f 


l 3^*^ 


Fce-!v 
















v CE = o 



































20 



40 
Ib , P-°- 



60 



80 



Fig. 2.17 Low level input character- 
istics in common -emitter connection. 



Fig. 2.16 Common-emitter output characteristics 
with superimposed load line. 



32 Transistor Circuit Analysis 

V CE = 11.6 v, 
lc = 3.7 ma, 

V L = 30 v - 11.6 v = 18.4 v. 
Use A notation to designate changes in these parameters with the shift in l B : 
AF CE = 11.6-5.3 = 6.3 v, 
A/ c =3.7- 5 ma = -1.3 ma, 
AV L = 18.4 -24.7 = -6.3 v. 

The negative signs indicate that the changes are reductions. 

(f) The reduction is A/ B = -5 pa. 

From Fig. 2.17, V BE = 0.569. Hence, V BE is 0.011 v lower at the reduced 
base current. This is most accurately estimated from the tangent at the original 
operating point as the rate of change of V BE with I B . Thus, 

A7 B£ =0.011 v, 
AP B = V BE2 I Bi - V BEi l Bi = [(0.569 x 15) - (0.58 x 20)] x 10* = -3 x 10" 6 w . 
Now find A P L =P L2 -P Li ; 

p l 2 = Ic 2 2 Rl = (3.7 x 10- 3 ) 2 x 5000 = 58 mw at I Bi = 15 ,*, 
p i, = 1 c\Rl = (5 x 10- 3 ) 2 x 5000 = 125 mw at / Bj = 20 ^a, 
AP L = 58-125=-67mw. 



PROBLEM 2.11 From Prob. 2.10, determine the d-c current gain, i.e., the ratio 
of collector to base current. Also find the incremental current gain, i.e., the ratio 
of a change in I c to a change in I B . 

Solution: From Prob. 2.10(a), I c = 5 ma, and 7 B = 0.02 ma. Thus, 

D-c current gain = -£ = = 250 

1 B 0.02 

From Prob. 2.10(e), A/ c = -1.3 ma for A/ B = -0.005 ma. Thus, 

Incremental current gain = c = ~ = 260 

A/ B -0.005 



PROBLEM 2.12 Using the conditions of Prob. 2.10, determine the input resist- 
ance (static d-c value), and the incremental resistance to small input changes. 

Solution: Static input resistance is 

V BE 0.58 v 



I B 20xl0- 6 a 
Incremental input resistance is 

A V BE -0.011 



29,000 n. 



A/ B -5xl0' 6 a 



2200 fi. 



Note the very large difference between static and incremental resistances. The 
input resistance is decidedly nonlinear. 



Transistor Circuit Analysis 



33 



PROBLEM 2.13 Referring to Prob. 2.10, find the ratio of output power (in R L ) 
to input power (to the base of the transistor) for static and incremental conditions. 



p 
Solution: Static (d-c) power gain is — — 



0.125 w 
11.6 x 10" 6 w 



10,800. 



AP L -6.7 xlO -3 
From Prob. 2.10(f), incremental power gain is 



AP t 



-3x10' 



= 22,300. 



PROBLEM 2.14 For the conditions of Prob. 2.10, find the incremental voltage 
gain, A V L /A V BE . 

Solution: From Prob. 2.10(e), 

-6.3 



AV, =-6.3 v, 



AV BE =-0.011 v, 



Voltage gain = 



-0.011 



570. 



PROBLEM 2.15 For the 2N929 transistor in the common-emitter circuit of Fig. 2.13, 
calculate the static and incremental output impedance for V CE = 10 v and I B = 15 fia 
from the transistor characteristics. 

Solution: Incremental output impedance is defined as A V CE /A lc for constant 
l B . To obtain it, use A V CE = +5 v (arbitrarily), so that V CE ranges from 10 v to 
15 v. Since A V CB is noncritical in the linear region of the characteristics, it is 
selected for convenience. Referring to Fig. 2.18a-b, 



Point P t : 



Point P 2 : 



V CE = 10 
V CE = 15 



v, lc = 3.7 ma 1 

> l B = 15 n a (given), 
v, lc = 3.8 ma J 



Incremental output impedance = 



AV 



CE 



Static output impedance = 



Air 



CE 



— — =50,ooon = — 

0.0001 h ol 

10 = 2700 fl = — . 
0.0037 h OE 



The much higher incremental output impedance as compared with the static 
value is, of course, due to transistor nonlinearity. Note that h OE and h oe are the 
static and incremental output conductances for the common-emitter connection by 
definition. 





(a) 



(b) 



Fig. 2.18 (a) Determining transistor small-signal out- 
put impedance from the common-emitter output charac- 
teristics, (b) Enlarged view of (a) showing transistor 
characteristics in region of interest. 



34 Transistor Circuit Analysis 



PROBLEM 2.16 For the transistor circuit of Prob. 2.15, using the characteristic 
curves of Fig. 2.17, calculate the static and incremental input impedances. Use a 
+ 5 p increment for l B , 

Solution: From Fig. 2.17, for V CE > 1 v, 

/ B = 15pa, l B =20fia, A/ B =5pa, 

V BE = 0.569, V BE = 0.580, A V BE =0.011 v, 

Static input impedance = ' = 38,000 Q = h IE , 

15 x 10 -6 

Incremental input impedance = ' * _ = 2200 fi = h ie . 

Parameters h JB and h ie are static and incremental input impedances, respec- 
tively, in the common-emitter circuit. Note that the values of input impedance 
are the same as would be deduced from the calculations of Prob. 2.10, in which 
V CE is not constant, due to the load resistance R L . The reason is that the V CE 
vs. l B curve is insensitive to collector voltage except when this voltage is very 
low. Since the calculations are carried out with respect to / B = 15 pa rather than 
l B = 20 pa as in Prob. 2.13, h IE is much higher, due to the nonlinearity of the 
base-emitter junction. 

PROBLEM 2.17 Using the common-emitter circuit of Prob. 2.15, calculate the 
static and incremental ratios of collector current to base current for V CE constant. 
Set l B = 15 pa as operating point, and A/ B = +5 pa as increment. Refer to Fie 
2.18. B 

Solution: Choosing V CE = 10 v (Fig. 2.18a), 

I B = 15 pa, l c = 3.65 ma, 
Ib = 20 pa, I c = 5.1 ma. 



Static current ratio is 



Incremental current ratio is 



^L = i^_=246=/, FE . 
1 B 0.015 FE 

A/ c 1-45x10-' 

A/*" 5x10- - 290 = ^ 



The static current ratio with V CE constant in the common-emitter connection 
is designated as i FB . This is known as the forward current gain. The incremen- 
tal forward current gain is designated h la . These current gains may be compared 
with the values of Prob. 2.11. Differences are due to differences in V CE for dis- 
parate operating conditions. 

PROBLEM 2.18 A commonly-used two-transistor circuit is shown in Fig. 2.19. 
Find the quiescent operating point and the over-all incremental current gain 
A 'c 2 /A I Bi . 

Solution: Since / Bi is undefined, assume / Cj = 5 ma, which corresponds to a 
5.3 v collector voltage V C e 2 on the 5 KQ load line of the applicable curve of Fig. 
2.16. From Fig. 2.16, / Bj = 20 pa, and from Fig. 2.19, I B =l E . 



Transistor Circuit Analysis 



35 




O V C c = 30v 



50 



40 



30 



o 
^ 20 



2N929 



Fig. 2.19 Simplified schematic diagram 
for Prob. 2.18. 



10 













0.3fia 




























0.2Ma 


0.166 
0.1 Ma 
















IB 














0.0983 



10 



15 20 

V CE , volt- 



25 



30 



35 



Fig. 2.20 Common-emitter output characteristics in 
the very low current region of the 2N929 transistor. 



Consider Fig. 2.20, the common-emitter curves for the 2N929 transistor ap- 
plicable to the low current region. For / Ej « / Cl = 20 /xa and V CEl = 30 v, 

l B = 0.166 /xa = 166 ma, 

scaled from the figure. To determine incremental gain, change I Bl to 0.166/2 = 
0.083 /xa, which yields (from the curves used above) / Bj = 10 pa and / Cj = 2.4 ma. v 



!'• 



Hence, 



A/ f 



83 ma, A/ c = 4.9 - 2.4 = 2.5 ma, 



' rt" 

SwV < 

-L4 



R L = 5Kfi 

-Wr-o 

: V cc 

= 30v 

2N929 



100 fi 



Incremental current gain =—^ r^r = 30,000 



83 x 10" 



for the two amplifier stages. 



PROBLEM 2.19 In the circuit of Fig. 2.21, switch Sw is closed. Assume an op- 
erating point at l B = 10f*a. Determine from the characteristic curves the incre- 
mental voltage gain for a change of + 10 mv in V B , the voltage from base to ground. 

Solution: Refer to the curves of Figs. 2.16 and 2.22. From the slope on Fig. 
2.22, 10 mv (A V BE ) corresponds to A/ B = 3 /xa at the specified operating point. 

From Fig. 2.16, points P l and P 2 locate the operating points for I B = 10 /xa 
and l B - 13 /xa, respectively. 

At P,: I B = 10 /xa, l c = 2.4 ma, V CE = 18 v. 

At P 2 : l B = 13 tx a, l c = 2.9 ma, V CE = 15.6 v. 
And therefore, 

A I B = 3 /xa, A / c 
Thus, 

Voltage gain A v 



Fig. 2.21 Circuit for Probs. 2.19-20. 
0.7 

0.6 

0.5 

I 0.4 



0.5 ma, A7 CE =-2.4v. 



w 0.3 

.°5 



0.2 



0.1 



-2400 mv 
10 mv 



= -240. 



Slope at 
iB=10ii 
= 3.33mv 


a y 




VCE>}v 
















v CE =o 



































20 



Note that a small increase in V B leads to increased collector current and a 
reduced collector voltage. This is represented mathematically by the negative 
voltage gain. Because of the exceptional sensitivity to base-emitter voltage, the 
base is usually fed a current input. The gain calculated above is in effect the 
a-c gain to small-signal voltages about the quiescent operating (bias) point. 



40 

j b, H<> 



60 



80 



Fig. 2.22 Calculation of input im- 
pedance at an operating point from 
the common-emitter input 
characteristi cs. 



36 



Transistor Circuit Analysis 



PROBLEM 2.20 Repeat Ptob. 2.19 with switch Sw open. 

Solution: Because R L and R E are in series and the collector current is nearly 
equal to the emitter current, the load line of Fig. 2.16 is applicable to the present 
problem. 

The most direct approach is to find the base to ground voltages which lead to 
the same operating points as P t and P 2 in Fig. 2.16, and then calculate voltage 
gain from these values. At P lt from Prob. 2.19, 

l B = 10 (ia, I c = 2.4 ma, 

I c Re = 2.4 ma x 100 Q, = 0.240 v. 
AtP 2 , 

AV BE = 10 mv, l B --, 13 fia, I c = 2.9 ma, 

l c R B = 2.9 ma x 100 fl = 0.290 v. 

The total change in base to ground (input) voltage is the increase of 10 mv in 
base to emitter voltage plus the change in drop across the emitter resistor. Hence, 

Change in base-ground voltage = (0.29 - 0.24) + 0.01 = 0.06 v. 

As in Prob. 2.19, the change in output = A V CE = -2.4 v : 



Effective voltage gain A v = 



-2.40 
0.06 



= -40. 



■Afn 






Fig. 2.23 Circuit and input current 
for Prob. 2.21. 



., The calculated voltage gain is substantially reduced by the introduction of 

irO = 5v *-^ e ^e resistor. Note that the 10 mv contribution, which is the increase in base- 

^ A A*. q emitter voltage, is a relatively minor factor in establishing gain. The drop across 

R E is a negative feedback voltage which stabilizes gain. As V B is increased, 
the increased emitter drop tends to reduce the base-emitter voltage. If the base- 
emitter voltage is relatively small, the base-ground voltage approximately equals 
the emitter resistor drop. Thus, 

A ~ ^ L 

K E 

as long as the voltage gain is much higher with R E short-circuited. 



2N929 



10 



.? 4 







35jxa^ 


30/ia 












25/Ua 






K~^ 






20/Xa 






lSua 














lOfte 








5jUa 


' — \ 


p ? 




/ s =o 



10 
volt- 



15 



20 



Fig. 2.24 Solution to Prob. 2.21. 



PROBLEM 2.21 Refer to Fig. 2.23. If I B varies as shown between and 25 /xa, 
what is the variation in output voltage V ? What is the variation if / B varies be- 
tween and 35 \i a? 

Solution: Figure 2.24 shows the common-emitter characteristics applicable to the 
present problem. A load line is drawn corresponding to 7 cc =5v and a 1000 fi 
load resistor. From the load line, it is apparent that as long as l B > 20 ft a, the 
operating point remains at P,. The transistor is saturated and is said to be on. 
The collector-emitter voltage drop cannot be substantially reduced by further in- 
creases in l B , 

Similarly, if I B = or less (reversed in polarity), the operating point moves to 
P 2 where the collector-emitter drop equals V cc , and the transistor is said to be 
off. Therefore, Vq varies between 5 v and about 0.7 v. 

The mode of operation described here is called switching, since the output is 
either on or off, with output voltages independent of l B in the extreme nonlinear 
regions. 

PROBLEM 2.22 Using the circuit of Fig. 2.23 but with R L = 0.25 MQ, find the 
variation in V as I B varies between and 10 i&. 



Transistor Circuit Analysis 



37 



Solution: Refer to Fig. 2.25, which is the common-emitter characteristic for low 
values of collector current. Draw the load line for a 0.25 Mil resistor. The verti- 
cal axis intercept of the load line corresponds to a collector current of 

= 20 jxa . 



250,000 n 

Collector-emitter voltage varies between 0.25 v at P t Q c = 19 /za) and 5 v at 
Pi Oc = °)- The on collector current is determined by the circuit and not by the 
value of l B , as long as l B is greater than the value needed to sustain l c , in this 
case, about 0.2 y. a. 

2.5 Supplementary Problems 

PROBLEM 2.23 From the curves of Fig. 2.5 for the 2N929 transistor, deter- 
mine the operating points (a) l c when V CE = 30 v and l B = 0.01 ma, (b) / B when 
V CE = 15 v and / c = 5 ma, and (c) V CE when l B = 30fta and / c = 8 ma. 

PROBLEM 2.24 Using the characteristics of the 2N929 transistor of Fig. 2.5, 
draw a load line for V cc = 30 v and R L = 10,000 O. Find I c and V CE for I B = 
0.01 ma. 

PROBLEM 2.25 Repeat Prob. 2.24 with R L = 4000 12. 

PROBLEM 2.26 A transistor with a very high j8 is connected in the common- 
base mode. Draw a load line for V cc = 20 v and R L = 5000 fl, and find V CB 
and l c for l E = 1 ma. 

PROBLEM 2.27 For the common-emitter circuit using the 2N929 transistor with 
a 6000 Q load and V cc = 30 v, find (a) l B needed to operate at l c = 5 ma, (b) the 
power P c dissipated in the collector junction, (c) the d-c voltage V L across the 
load and the power P L dissipated in the load resistor, (d) the input d-c power 
P B to the base, (e) the variation in the parameters l c , Vce, and v l if 1 b is de- 
creased by 5 jxa, and (f) the changes in V BE , P B , and P L if l B is decreased 
by 5/ia. 

PROBLEM 2.28 From Prob. 2.27, determine the d-c current gain, i.e., the ratio 
of collector to base current. Also, find the ratio of a change in l c to a change in 
l B (incremental current gain). 

PROBLEM 2.29 Using the conditions of Prob. 2.27, determine the input resis- 
tance (static d-c value), and the incremental resistance to small input changes. 

PROBLEM 2.30 Referring to Prob. 2.27, find the ratio of output power (in R L ) 
to input power (to the base of the transistor) for static and incremental conditions. 

PROBLEM 2.31 For the conditions of Prob. 2.27, find the incremental voltage 
gain Ar L /AV BE . 



50 



40 



30 



10 ' 









0.3fia 


' 














0.2(la 










\ 






O.lfta 


■\ 


, p > 




'?.= ?. 



S 10 15 20 

V CE , volt-*> 

Fig. 2.25 Solution to Prob. 2.22. 



3 

CHAPTER 



SMALL- SIGNAL 
EQUIVALENT CIRCUITS 



3.1 Introduction 



1.0 



0.8 



0.6 



- 0.4 
0.2 



Although the tee-equivalent circuit introduced in Chap. 1 
provides an easily visualized model of transistor behavior, there are other equiv- 
alent circuit configurations that offer characteristic advantages. Alternate models 
are now presented here on a small-signal basis, where essentially linear rela- 
tionships hold for small-signal excursions about the operating (Q) point on the 
characteristic curves. 

Figures 3.1a-b show typical transistor input and output characteristics with 
small-signal excursions about the operating point. Note that the assumption of 
linearity is more valid for the output characteristics - which are well approxi- 
mated by parallel straight lines - than for the highly-curved input characteristics. 



















**\Kv 




















rjA's 
















v 


CE=10v W t 
/ B =30//a ) 


operatin 
point 


9 




! 















100 



200 



300 400 
I Bl fla — 

(a) 



500 



600 



700 




(b) 




(c) 



I B =32— f'v 9 ' 3-1 T/Pe 2N929 common-emitter characteristic curves, (a) Input characteristics, 
£^^ZL r < b > output characteristics, and (c) enlarged view of critical region of output character- 
istics. Note thatA = reference point; C= final point; A/ Ci = 0.25 ma for A V CE = 5 v, 
where A/ Ci is the change in I c due only to the change in V CE ; A/ c = 1.4 ma for 
A/ B = 5 Ha, where A/ C2 is the change in I c due only to the change in I B . 



3.2 Hybrid Equivalent Circuit 

The hybrid equivalent circuit is the most widely used 
for describing the characteristics of the transistor. It is termed hybrid because 



38 



Small-Signal Equivalent Circuits 



39 



it combines both impedance and admittance parameters, known as the b-parameters. 
The ease of measurement of the A-parameters has contributed to its widespread 
.a^pttoa. 

A set of A-parameters can be derived for any black box having linear ele- 
ments and two input and two output terminals. Each of the three basic circuit 
configurations of the transistor, that is, the common-base, common-emitter, and 
common-collector, has a corresponding set of A-parameters, both for small- and 
large-signal operation. 

The development of the hybrid equivalent circuit is illustrated by the fol- 
lowing problem. 



PROBLEM 3.1 Derive the equivalent common-emitter circuit equations from the 
following functional relationships that characterize the families of curves shown 
$y Pigs. 3.1a-b: 



'c = IcWcE' 'b)> 
Solution: Both (3.1) and (3.2) may be expanded into differential forms: 



dl c = 



fa 



dV BB = 



dVcE 
*V BB 



dV, 



CB 



r CE 



VcE = 






'B> 



"CE 



dV, 



BE 



a/ B 



V C E 



(3.1) 

(3.2) 



(3.3) 
(3.4) 



Assuming small-signal linear conditions, the partial derivatives, 



dtr 



dV t 



CB 



dV, 



Mi 



dV CE 



dl c \ 

d, B I V CE 



BVt 



BE 



dl B 



'CE 



become constants whose values are determined from the characteristic curves. 
Hence substitution of the appropriate constants leads to the required equations. 

The above constants are given a special nomenclature because of their im- 
portance: 



*v 

9Vmb 
dV cs 

die 
dl B 

dV BE 



= A oe , output admittance (mhos) , 



= A,., reverse voltage ratio (a numeric) , 



= h f9 , forward current gain (a numeric), 



dl K 



CB : 



r GE 



A is> input resistance (ohms). 



(3.5) 
(3.6) 
(3.7) 
(3.8) 




VBE = hjE/s + h RE V CE 



Ir=h 



FE'B 



(a) 



*OE v CE 




Sow using lower case letters for small-signal operation, (3.3) and (3.4) become 

': Note the mixed or hybrid nature of the A-parameters in (3.5) through (3.8). 
Tim second subscript e is applied to the individual A-parameters, since in this 



Vbe =hie>b + J>re" C e 
'e = hfe'b + h oe v ce 

(b) 

Fig. 3.2 Block diagram representa- 
tion of the hybrid equivalent circuit 
for the common-emitter connection, 
(a) Large-signal parameter (d-c) and 
(b) small-signal parameter. 



40 



Transistor Circuit Analysis 




v be = 'fih/e + h re v ce 



h te'b 




PC 



'c = h oe v 'ce + h fe'k 



ce 

I 



(b) 

Fig. 3.3 Equivalent circuit (model) 

representation of the common-emitter 

configuration, (a) Input side and (b) 

output side. 



instance, it signifies the common-emitter connection. For the common-base and 
common-collector connections, the subscripts b and c apply, respectively. 

Figures 3.2a-b illustrate the character of this black-box approach by black- 
box representations of the common-emitter circuit for small- and large-signal 
parameters. As was explained in Chap. 2, the large-signal parameters exhibit 
decidedly nonlinear characteristics. 

PROBLEM 3.2 Illustrate the physical significance of (3.9) and (3.10) by ref- 
erence to Figs. 3.1a-c. Also establish numerical values for the parameters at 
the operating points on the input and output characteristics. 
Solution: Consider Figs. 3.1b-c in relation to the expression 

*'c =^oe^ce +f>fei, [3.9] 

and remember that h oe and h te are assumed constant for small-signal operation. 
Now A is the reference point, and C, a new point that shows the shift due to 
changes, v ce and i b . On the I B = 30 M a curve, l B is constant, so that i b = 0; 
hence i c = h oe v ce . At point B, V CE = 15 v and AV CE = v ce = 5 v. The change 
A/ C7 = i c in I c is due only to a change in V CE . The slope of the characteristic 
curve is 



Mr 



AF, 



K e = 



CE 



0.25 ma 
5 v 



50 x 10 -6 mhos. 



Now consider the component change in l c due to a change in /„, V r * = con- 
stant (v ce = 0): 



Mr. 



KM B , 



Mr 



M* 



= h. 



1.4 x 10 _ 



From Fig. 3.1c, 

M c = 1.4 ma, A/ B = 5 /ia, A 

5x10- 

With parameter values substituted in the expression for i c , 



280. 



= A„ 



+ A,„i„ 



= 50 x 10~ 6 v ce + 280 i b . 

A similar procedure can be followed with respect to the input characteristics 
of Fig. 3.1a, whose defining equation (3.10) is repeated here: 

v be =K e v ce +h ie i b , [3.10] 

The input characteristic curves, for all but very low values of V CE , are al- 
most independent of V CE . Thus, for practical operating points, h re may be set 
equal to zero, so that v be = h le i b . From Fig. 3.1a, at I B = 30 na, 

M B = 100 fia, AF BE =0.13v, 



A7, 



BE 



v be 



0.13 



A/ B 



100 x 10- 



= 1300 fi, 



h ie = 1300 fl , 
and (3.10) reduces to v be = 1300 i b . 

As already mentioned, an analogous set of A-parameters can be obtained for 
both the common-base and common-collector connections, since there is nothing 
in the preceding analysis which depends on the transistor configuration. All 
that is necessary for each connection is the analogous set of characteristic 
curves with the operating point identified. 



Small-Signal Equivalent Circuits 



41 



PROBLEM 3.3 Show how (3.9) and (3.10) may be represented by equivalent 

Solution: Figures 3.3-4 show the set of equations and the equivalent circuit 
representations. It is seen that the circuit equations are identical with (3.9) 
and (3.10). The equivalent circuit or model provides an exceptionally simple 
basis for calculation. 

PROBLEM 3.4 For the 2N929 transistor whose characteristic curves and opera- 
ting points are defined in Figs. 3.5a-b, compute the /i-parameters for the common- 
emitter connection, and draw the equivalent circuit. 

Solution: The output operating point, A, is defined in Fig. 3.5b as 




h re v ce hfe'fa i c 

AAA^-^-CV-»— £>-) * " P( 



l B = 15 u&, 
Proceeding as before in Probs. 3.1-2, 



'CE 



= 12 



v be = h ie'b + h te v ce 

>c = h fe'b + h oe v ce 

Fig. 3.4 Complete hybrid parameter 
model for the common-emitter con- 
nection. This circuit applies to 
small-signal operating conditions. 



Mr 



bV CE 

. A/ c 
b " ~~ bT B 



0.3 x 10" 



V C E 



h.„ = 



bI B 

bV BE 





10 


1.4 


xlO" 3 


5 


xl0~ 6 




0.22 



= 30 x 10 -6 mhos , 



290, 



V CE 



bv, 



CE 



Ib 



2,200 n, 
100 x 10- 6 

(essentially), for V CE > 1 v. 



The equivalent circuit corresponding to these parameters is shown in Fig. 3.6. 

i.o . • . . 1 1 1 io 

0.8 



u 



m 0.4 

CO 



0.2 













V CE >lv 












■ ^1 


i L— — ■ 
J^*" — r^ 

{Av BE = 0.22v 






V C B 


= 


/&1b 


= 100(Ja 















































35p 


30fia j 










25/Jfl 












^S 


20/to 






D 




C _{_ 




15/te 


-+(V<~i? = 


A/ Cj 


! 
i 

nt)* 






| '* - 

A Av 


CE =10\ 


, B t = 


A/c t 
= 0.3 ma 


lOfla. 














I B = ° 













100 200 300 400 500 600 700 5 

I B , fia fc- 

(a) 

Fig 3.5 Computing h-parameters for Prob. 3.4. (a) Input characteristics and 

(b) output characteristics. 



10 15 20 

VcEl volt — 

(b) 



BO- 



h ie = 
■ 2200fl 
-WAr— t 



25 



290i„ 



e 



30 



35 



-OC 



-ArW 

= 30 X 10~ 6 mhos 

(= 33,000Q) 



The equivalent circuit based upon small-signal variations about an operating 

point is, of course, immediately adaptable to the analysis of small-signal a-c Fig . 3.6 Equivalent circuit corre 
amplifiers. The calculation of amplifier performance is merely the determination sp0 nding to the ft -parameters 

Of Output Signals With given input Signals. derived in Prob. 3.4. 



«£ 



42 



Transistor Circuit Analysis 



PROBLEM 3.5 We are given the circuit of Fig. 3.7 whose operating conditions 
and parameters correspond to those of Fig. 3.6. The input capacitor is assumed 
to have zero a-c impedance. 

(a) For an input signal v g = 10 mv rms, calculate the currents i b and i c , and 
the voltage across and power in R L . 

(b) Calculate the current gain A, = iji b . (This is not the same as h te , since 
the external resistance R L enters into the calculations. Parameter h le is defined 
for short-circuit conditions; i.e., v ce = 0.) 

(c) Calculate the voltage gain A v = v ce /v be . 

(d) Calculate the power gain, i.e., the ratio of a-c load power to transistor 
a-c input power. 

(e) Calculate the input impedance Z t . 

(f) Calculate the output impedance Z . 

It is assumed that h re = 0. This is generally a valid or realistic assumption for 
small-signal operation which results in simplified calculations. 



R B . 



:!'* 




looo J2 c b /y^\ ' 



2N929 



10 mv rms 



5000 0, 



-o v. 



cc 



;30v 



Fig. 3.7 Circuit for Prob. 3.5. The bias point is set 
at a base current of 15 fla supplied through R B . Ca- 
pacitor Cg blocks the d-c bias current to prevent its 
flowing in the low impedance generator circuit, com- 
ponents Rg and Cjg are neglected in calculations, 
and Vg and Rg are a-c generator voltage and internal 
resistance, respectively. 




R g = 
1000 fl 



A/W- 



220012 
-Wr- 



10 mv rms 



290 i b 



— vw 

e =30x 10" 6 mhos 
(=33,000 Q) 



,R L = y L 

' 5000 fi 



Fig. 3.8 The a-c hybrid model corresponding to the 
circuit of Fig. 3.7. 



Solution: The first step is to draw an a-c model for the circuit of Fig. 3.7, as 
shown by Fig. 3.8. Calculations are then made in a straightforward manner using 
ordinary circuit theory, 
(a) To calculate i b : 



10" 



R g + h ie 1000 + 2200 



= 3.1x10-* a. 



The current generator develops h le i b , or 290 x 3.1 x 10~ 6 = 0.90 ma. 

The current source output divides between h oe and R L in accordance with 
Ohm's law: 



L = h f „ i 



Ife'b 



^ 1= 0.90 I \ ma = 0.90 ( 

+ J_ \R L h oe + l) { 



5000x30xl0- 6 + l, 



~ 1.15 
= 0.78 ma. 



Small-Signal Equivalent Circuits 



43 



The voltage across R L is v L = 5000x(-0.78xl0" 3 ) = -3.9 v rms. The voltage 
is negative because of the assumed current and voltage polarities of Fig. 3.8. 
The power dissipated in R L = 0.78 x 3.9 v = 3.04 mw. 

(b) The calculation of current amplification is 



'b 



0.78 x 10" 
3.1 x 10" 



= 252. 



(c) To calculate voltage amplification, input voltage is taken as the input 
voltage at the transistor base: 



4„ = 



v be 



-3.9 
i h h ia 



-3.9 



-3.9 



3.1 x 10- 6 x 2.2 x 10 3 



6.8 x 10" 



■574. 



Note that input voltage = i b Z t where Z, = h ie . The minus sign in the voltage gain 
calculation arises because i c is flowing away from the assumed positive side of 
of R L . In the common-emitter circuit at low frequencies, the output voltage is 
180° out of phase with the input signal. 

(d) Calculation of power gain: Load power, previously calculated, is 3.04 mw, 

Power input = i b x v be = (3.1 x 10~ 6 )(6.8 x 10~ 3 ) = 21 x 10~ 9 w, 



Power gain 



3.04 x 10" 



145,000 , 



21 x 10- 9 
or calculated somewhat differently, 

Power gain = 1-4,4,1 = 252 x 574 = 145,000. 

(e) Input impedance = h ie = 2200 fl. 

(f) Output impedance = l/h oe = 33,000 Q. This is the a-c impedance seen 
looking toward the transistor from R L . 



3.3 Tee-Equivalent Circuit 

The tee-equivalent circuit (Fig. 3.9) provides a close ap- 
proximation of transistor behavior. Within the scope of the linearity assumptions, 
it is easy to relate its circuit parameters to physical ones. However, it is difficult 
to measure tee-parameters directly with high accuracy, in contrast to the ease 
with which h-parameters may be measured. The best way therefore to determine 
tee-parameters is to convert from known A-parameters. 

The basis for converting between A- and tee-parameters depends on the nec- 
essary identity of behavior of each configuration fpr different input and output 
conditions. The conditions that will be used in the subsequent analysis are as 

1. Input impedance i» measured with output short-circuited. 

2. Output impedance is measured with input open-circuited. 

3. Reverse voltage ratio is measured with input open-circuited. 

4. Foward current gain is measured with output sbort-circeited. 

For the above conditions, all valid equivalent circuits must yield the same nu- 



PROBLEM 3.6 Using the common-emitter hybrid and tee-equivalent circuits of 
Figs. 3.9-10, calculate the four quantities listed above. Also, develop comparable 
equations for ^e two circuit coaf^uratioaa. 



Pit 



T n 

Vbe 



r b 

-vw- 



— vw- 



^T 



Fig. 3.9 The tee-equivalent circuit 
for the common -emitter connection. 
The parameters r bl r e , rj, and p are 
constant only for small-signal oper- 
ation. The fixed bias currents ond 
voltages are not shown. 



Bo Wv ± V V 7" 

Vbe 



h fe'b 

-€>■ 



"oe 
-VW 1- 



Fig. 3.10 Common-emitter hybrid 
model. 




44 Transistor Circuit Analysis 



' Solution* (a\ Tft f*a\r*ii\ata tkft inrait tmtiaflannA £«• «4> A >_,. ^al^l-^A iJ.^.*! _ > 

i •*wfi#iiw«. \»/ tu uaicuittic uic input lrnpcuancv tor ine lOe^OQulVaURlt ClfCuit, r©~ 



draw Fig. 3.9 as shown in Fig. 3.11, with the output short-circuited. The current 
entering node A is (/S + l)i b . The voltage across the parallel shunting resistors 

Impedance i * 1 iTW is theref ° re . ' - : "- ; / : .'. . , ;, - -^ ' ^ 



Fig. 3.11 Calculation of input im- The input voltage equals 

pedance of the tee-configuration. 









Since the input voltage = Z,i b where <Z, is the input impedance, 

The input impedance of the hybrid equivalent circuit is. determined by in- 
spection of Fig. 3.10. Note that h„ v e , * 0, since the output (y„,) is short- 
circuited. Therefore, 

(b) To determine the output impedance from the tee-equivalent circuit of 
Fig. 3.9, the input is open-circuited. Since i b = 0, /3i 6 * 0, and the output im- 
pedance Z is 

Analogously, referring to Fig. 3.10, with i b = and therefore h,,if, « 0, 

(c) The reverse voltage ratio is also calculated for i b = 0. From Fig. 3.9, 



*?>» = *e» 



and for (he hybrid equivalent circuit of Fig. 3.10. 

(d) Referring to Fig. 3.11 to calculate the forward current gain in the tee- 
equivalent circuit, the current in r d is 

'6 08 + 1) -^ 



' o + T d\ 

Solving for i c , 



i''o-/3ib-08 + l)i fc ~^ 



Since r g « r d , the following approximation is valid: 

For the hybrid circuit of Fig. 3.10, since the output is short-circuited for 
the forward current gain calculation, : 

'c = "le'bi ~T~ = "t»' 



Small-Signal Equivalent Circuits 45 



Notice the simplicity with which results are obtained from the hybrid equiva- 
lent circuit. The simple relationships between easily measureable circuit char- 
acteristics and hybrid parameters are a prime reason for using h-parameters. 

PROBLEM 3.7 Using the results of Prob. 3.6, derive formulae for conversion 
between tee- and A-parameters. 

Solution: The equations derived in Prob. 3.6 lead naturally to expressions for 
the h-parameters in terms of the tee-parameters. These are listed below: 

Z, - h t , » r b + (1 + /8)-^- . (3.13) 

Z = J_ « f . + r„, A .= — (3.14) 

A„. '- + «■ 



!'oe 



» + r d 



The above formulae may be solved for tee-parameters in terms of A-parameters. 
Obviously, 

Dividing (3.15) by (3.14), 






** 



From (3.14) add (3.17), 



LL_ r>tt X-^L = izA2.. (3.i8) 

K0 Km K» K» 



Solving for x b in (3.13), 

r b «A,.-(l + 0>i 



r . + r d 



However, 






A. K 



oe 



But /3 = A, e and 



Since h„ « 1, 



r i = A *. -(1 + */•)** 



(4# 



r» = fti. -a + **>!=-. (3.i9) 

PROBLEM 3.8 Using the results of Prob. 3.7, convert the hybrid equivalent 
circuit of Fig. 3.6 to the corresponding tee-equivalent circuit for the common- 
emitter connection. 



46 



Transistor Circuit Analysis 



r b = 2200fi 
B o VW 



EO- 



290; 



€> 



r d = 33,000li 

— — wv 



-oc 



-OE 



Fig. 3.12 Equivalent tee-circuit, 

identical to the hybrid circuit of 

Fig. 3.6 because h re is assumed 

to be zero. 



"fe'b 



Solution: From Fig. 3.6, 

Applying the formulae of Prob. 3.7, the parameters of the tee-configuration are 






- 33,000 Q, 



ic-e^ 



2200 n. 




With these parameters, the tee-equivalent circuit of Fig. 3.12 is identical to 
the hybrid circuit of Fig. 3.6. This is so because A,, was assumed to be zero, a 
perfectly valid approximation. 

Because A,, is so small, it is generally not feasible to determine it from the 
transistor static characteristics. Instead, it may be obtained by making small- 
signal a-c measurements on the transistor. With the transistor properly biased, 
a small a-c voltage is applied to the output with the input circuit open (to a-c),' 
as in Fig. 3.13. The ratio of the open-circuit voltage to the applied voltage is 
h„. This technique is also used for determining h rb and A rc . 

For example, using the above procedure, the value of A,, for the 2N929 tran- 
sistor at V CB = 12 v and I B - 15 fia was found to be 2 x 1<T 4 . This means that a 
1 v change in V CB produces a 0.2 mv change in the coupled base-to-emitter volt- 
age. This magnitude of change cannot be seen on the characteristic curves, 
which explains why the previously derived h„ equals zero. 

PROBLEM 3.9 For the equivalent circuit of Fig. 3.8, determine the errors in 
voltage gain (A v ) and current gain (A,) resulting from the assumption that A,. = 0. 
(In this problem, A re = 2 x 10" 4 .) 

Solution: The equivalent circuit with the same operating point as in Prob. 3.5 
but with the h„ v ce voltage source inserted, is shown in Fig. 3.14. It will be 
recalled that v ce = -3.9 v, yielding an h te v ce = 2 x 10" 4 x -3.9 = -0.8 mv rms. 
If i b is held constant, v g must decrease by 0.8 mv to 9.2 mv. For this condition 
the output current i e is unchanged. The input voltage v be becomes 



v be = 9.2 x 



h,. + R. 



= 9.2 



2200 



2200 + 1000 



6.3 



mv, 



-3.9 
6.3 x 10 



- = -618 (vs. -574, neglecting h re ). 



Fig. 3.13 
showi 



Simplified circuit diagram The a PP roxi ™te gain is 7% lower than the "exact" value. This approxi- 

ng how to measure h re . mation error is almost always acceptable, since the variability in transistor 

parameters is much greater than 7%. The current gain is unchanged, because it 
depends primarily on h te . 

PROBLEM 3.10 Obtain the tee-equivalent circuit from the hybrid model of 
Fig. 3.14. 



Small-Signal Equivalent Circuits 



47 



Solution: The A-parameters are 

h ie =2200fi, 
A oe = 30 x 10 -6 mhos, 
A re = 2 x 10- 4 , 
h„ = 290. 

Substitute in the conversion formulae: 

j8 = A /# = 290, 

r d =-— = 33,000 0, 



2x10- 
30 x 10" 



= 6.67 O, 



r b = h ie - (1 + A, e ) ^- = 2200 - 291(6.67) = 260 O. 
A„„ 



h oe 
= 30 X 10" 6 mhos 



lOOOfl =220011 




J3; b =290i b 



r b =260fl 
BO VW — 



-WAr- 



'b 

r e =6.67fl 



r d = 33,000fl 



-oc 



Fig. 3.14 Hybrid equivalent circuit, common-emitter connection. 

The tee-equivalent circuit is shown in Fig. 3.15. Note the substantial 
change in t b in contrast to Fig. 3.12. The coupled voltage (i e through r e ) in- 
troduces a large effective resistance value, equivalent in over-all effect to the 
previous 2200 12 base resistance. 



\>. 



Fig. 3.15 The tee-model derived 

from the hybrid circuit 

of Fig. 3.14. 



3.4 Common-Base Parameters 

Since many manufacturers' data sheets list only the 
common-emitter characteristics, it is important to be able to determine the common- 
base parameters by calculation. The parameters under discussion are ftf 6 , ho b , 
ha, and A,*. The defining equations for the common-base circuit are 

v*. » A«> »'• + A* v «b. ( 3 - 2 °) 



PROBLEM 3.11 Determine the common-base A-parameters for the 2N929 tran- 
sistor at an operating point l c = 4 ma, V C b = 12 v. 

Solution: Refer to (3.20) and (3.21). These expressions are most easily in- 
vestigated by letting i e = A/ E = 0, and in turn, v cb = AV CB = 0, then graphically 
determining the relationships among the remaining variables. 
Consider Fig. 3.16a: 



48 



Transistor Circuit Analysis 



10 

8 

t« 

o 
B 

^4 



h ob = 



Ale 



AT, 



CB 



A/ Cl 
AB 



= 0, 



'/b 



A/ c 
A/ f 



CB 



BC ^ 2 x IP' 3 
A/ E ~ 2x 10" 3 



It is clear that for a high-quality transistor with low leakage current and high- 
current gain, the collector family curves are almost useless in establishing the 
output circuit parameters in the common base configuration. 



.-- — 












10 ma 
8 ma 










C 




6 ma 


r 








JA/ C 




4 ma 






A [s 


>V CB 


B 




2 ma 














/ E =o 



1.0 



0.8 



|0„ 



0.4 



s 



0.2 



10 15 20 

VcBi volt— 

(a) 



25 



30 



35 



01 





















A 






Av BE 

i_L 










Ai E 


B 


T 































10 



12 



14 



"ig. 



2 4 6 8 

Is , mo— ► 

(b) 
3.16 Type 2N929 common-base characteristic curves, (a) Output characteristics and (b) input characteristics. 

The input characteristics are more amenable to calculation. Referring to 
Fig. 3.16b, 



A,6 = 



AV, 



BE 



A/* 



CB 



0.06 v 
8 x 10- 3 a 



= 7.5 il. 



Parameter h Tb = 0, since V BE is almost independent of V CB . 

The h ib parameter can be established with fair accuracy from the characteristic 
curves; the remaining hybrid parameters cannot. The parameters can still be 
measured by a-c techniques, as previously explained, but it is usually more con- 
venient to compute them from the generally available common-emitter parameters. 



3.5 Derivation of Common-Base Parameters 

Common-base parameters may be derived from common- 
emitter parameters by the following procedure: 

1. Redraw the common-emitter hybrid equivalent circuit, taking the transistor 
base as the common terminal between the emitter and collector sides. 

2. For the redrawn circuit, calculate the four quantities listed in Sec. 3.3 
from which the hybrid parameters are derived. 

3. Equate the results obtained in Step 2 to the hybrid parameters of the 
common-base circuit. 

PROBLEM 3.12 Using the procedure given above, calculate the common-base 
hybrid parameters of a transistor from known values of the common-emitter hybrid 
parameters. 

Solution: Refer to Figs. 3.17a-b which show the hybrid common-emitter circuit, 
and its redrawing, in which the base B is made common to the input and output. 



Small-Signal Equivalent Circuits 



49 



The four quantities to be calculated are repeated below: 

1. Input impedance, measured with output short-circuited. 

2. Output impedance, measured with input open. 

3. Reverse voltage ratio, measured with input open. 

4. Forward current gain measured with output short-circuited. 
Calculate the input impedance of Fig. 3.17b with the collector short-circuited 

to the base, as shown in Fig. 3.18a. The circuit may be simplified by replacing i K„v 
the active sources, A^Vce and n /e i b , by equivalent resistances. The base leg E 
can be simplified as follows: 



hfe'l 



t k =>: 






(3.22) 



Because the output is short-circuited, v ce = vj, a , and (3.22) becomes 



i* = 



v b .O.-K.) 



™le 



r^h 




(a) 



/ife'h 



r^h 



Solving for the equivalent resistance of this leg, 



"6» 



";• 



Consider the current generator, h t9 i b . Using the value of i b from (3.22), 

v b ,h, e (l-h n ) 



hmh - 



»ie 



Since the voltage across the current generator is v be , the current generator can 
be replaced by an equivalent resistor: 




Veb=~v b 



(b) 

Fig. 3.17 Deriving the common-base 
parameters, (a) Original common- 
emitter circuit, and (b) redrawn so 
the base is now the common terminal. 



"le 



With the above simplifications, the equivalent circuit takes the form shown 
in Fig. 3. 18b, with three resistors in parallel and the active sources eliminated. 
The circuit can be further simplified by the following approximations: 

Ke h to (1 ~ A re) h le 

With these approximations, the equivalent circuit reduces to h le in parallel with 
Ai./A,„. The common-base input impedance is therefore, 




hf.it 



h* x 



l>U 



I 'e i h, 



'/« 



Me 



This may be simplified and equated to the hybrid common-base input impedance 
parameter: 



Vbe 



\\'b 



, /i/ e (l - h re ) 



Aj 



HI 



i + fi" 



(3.23) 



fe 



The forward current gain h a is determined in a similar manner. Referring 
again to Fig. 3. 18b and using the above approximations, 



-7- C 
<c 

(b) 

Fig. 3.18 Determining hjb ond ''/b- 
(a) Circuit of Fig. 3.17 (b) redrawn 

with C short-circuited to B. 
(b) Elimination of active sources. 



ftfb = 



(3.24) 



50 



Transistor Circuit Analysis 



and 



>c = v b. 



21*. 



Substituting the last two expressions in (3.24), 



h tb = - 



l + ht. 



(3.25) 



Consider now the calculation of the hybrid output admittance parameter in 
the common-base configuration. Referring to Fig. 3. 17b, let i. = and calculate 
the admittance from collector to base. By Kirchhoff's laws, 



'b + »'c = 0, 

Vb c = v be + v ec , 



-«' b = A /e i b - v ec A 



Solving this last expression for v ec . 



Also, 



ib d + hte) 
Vbe = ibh, e + A re v co 



(3.26a) 
(3.26b) 
(3.26c) 

(3.27) 
(3.28a) 



h ib 



o— w\, 1 



h (b'b 

h ob 
(i /WV • 



h rh v, 



rbV cb ^ 



v b» = 'h hi e - h ta V ec . 

Substitute (3.27) and (3.28b) in (3.26b), 



Vbc = i* a,. - *±- ib (1 + hie)+ (bSLthiA, 



Simplifying, 

(1 + *,. ) 

'b Ke 

This is the output impedance. In terms of common-base parameters, 



V " c = A le+ ii-f-^si(i_A F#)ii 



1 - 1+ ^(l-A ro ). 

'ob " OB 



= f>le + 



Using the previous approximations, 



> c and substituting, 



'cb 



",. « 1, A,. « l±JU*_, 

A*- . 



A b = 



1 + h, 



(3.28b) 



(3.28c) 



(3.29) 



(3.30) 



Fig. 3.19 Hybrid model for the 
common-base configuration. 



' B It remains now to determine h tb in terms of the common-emitter hybrid pa- 

rameters. Refer to the common-base hybrid model of Fig. 3. 19. This equivalent 
circuit should be compared with Fig. 3.17b, where 

Veb = v eb h tb , v be = v bc h rb . 

Substituting (3.27) in tt.28b) for v be and using G.28c) for v br . 



Small-Signal Equivalent Circuits 



51 



i& h 



le - ^re 'b 



(1 + h te ) 



u Vbe 

"rb = ' " 



hi e h oe 



v bc . - h te d + ftf e) ft le* 

»b "le ~ 'b U + «/«)+ »b 7 

"oe "oe 



1 + A/e 



Making the usual approximations, 
Then l>,5 becomes 



1+h 



le 



Ke 



»hi 



1 + 6*. 



<3.31) 



Vbe 



(3.32) 



3 'b 



r? 



'b 



rd 



AAA/ o — AAA •- 



Fig. 3.20 Common-emitter tee- 
equivalent circuit. 



;,;. The above problem concludes the development of formulae for the conversion 
W-eaminon-etnittef hybrid parameters to coauaea-base hybrid parameters. The 
Simplified conversion formulae are summarized below: 



'ib 



J ie 



hg, «*- 



h ob = 



1 +.*,.' 



[3.23] 



1 + h 



te 



1 + h 



[3.25] v °" 
A- 
[3.30] 



lit 



/l.K = h&hsS. _ /,; 



««* 



1 + h lm 



L3.32] 



^'b 



■AAAr- 



-AAA * 




Vcb 



Fig. 3.21 Circuit of Fig. 3.20 re- 
drawn so that the base is now the 
common terminal. 



PROBLEM 3. 13 Convert the parameters of the common-emitter tee-equivalent 
^Circuit to corresponding common-base parameters. 




(a) 



AAAr-^ j- 



P'fd 

(b) 



^v-O-O^ 



r d 



fi'e r d fii c r d 

(c) 



o 



P'etd 
(d) 



P'd 

■A/W- 



»Iution: The common-emitter tee-equivalent circuit is shown in Fig. 3.20. It 
redrawn in Fig. 3.21 for the common-base configuration. For a true common- 
ue model, the network consisting of {H b in parallel with r d must be developed 
. terms of input current i a , rather than input current i b . 
Therefore convert the current source /Si b in parallel with r d shown in Fig. 
^22a to an equivalent voltage source in series with a resistor, as in Fig. 3.22b. 
equivalency of the two networks is obvious from the figures, where they 
ibibit equal open-circuit voltages and equal output impedances. 

The network of Fig. 3.22b must be expressed in terms of i e instead of i b . 
following fundamental equations have been developed in Chap. 1: 




».-ju -i> 



/Sib* 



-AAAr- 

r c =(l+j8)r d 

(e) 

Fig. 3.22 Steps in the network con- 
version of Prob. 3.13. For (a) and 
(b): output resistance = r^, open cir- 
cuit voltage = pi b r d . 



52 



Transistor Circuit Analysis 



Using these relationships. Fig. 3.22b takes the modified form of Pig. 3.22c, in 
which two voltage generators are shown. Note that the generator Bi e r d has a 
voltage drop opposing i' c exactly equivalent to the drop across a resistor, Br,,. 
This suggests ^m^^s^Mit^muk-W^g^-M^^^ ■"' . ' "\ ■■■ . : -.- " .' 

The above network is converted to a current source in parallel with a re- 
sistor to obtain the common-base tee-equivalent circuit. The output impedance 
of the network is r d (l + B). The parallel current source, multiplied by r d (l + 8), 
must equal the open-circuit voltage, Bi u r d . Thus, the current source is 
[B/(l + B)]i e , or ai.. Figure 3.22e shows this parallel configuration. The re- 
sultant common-base tee-equivalent configuration is given in Fig. 3.23. 



i Figures 3.24-7 summarize approximate conversion formulae between hybrid 

B and tee-models for the common-base, common-emitter, and common-collector con- 
c . , , r . figurations. Those formulae not derived here may be verified using the methods 

rig. 3.23 Common-base tee- - .. . ,. ...... „ -»•.«. .........vo 

equivalent circuit. of the P^vious problems. A table of "exact" formulae is given in Appendix B, 

but these are rarely used in practice. 




3.6 Calculation of Amplifier Performance 

A prime application of transistor models is in the calcu- 
lation of small-signal amplifier performance. This includes the determination of 
voltage, current, and power gains, and input and output impedances. 



r€T] 

'be f , 

i ltd 



(a) Common-emitter configuration. 




(b) Hybrid equivalent circuit. 



Hybrid 



'ie 



h le 

h oe 



Common- 
base 



hn 



1 + A/b 



1+A 



h t b 



tb 

hfb 



1 + A, 



1+A« 



Common- 
collector 



1-A,c 
■(1 + A/c) 



Tee- 
equivalent 



Tb + 


r e 


1-a 




r e 


(1 


-a)r c 




a 


1 


- a 




1 



(1 - a)r c 



(c) Approximate parameter conversion formulae. 



A,„ = 2200 n 

A re = 2 x 10" 4 

A fe = 290 

A oe = 30 x 10" 6 mhos 

(d) Typical values for type 2N929 transistor 
at Iq = 4 ma, Vce = 12 v. 



Fig. 3.24 Conversion to common-emitter h-parameters. 



Small-Signal Equivalent Circuits 



53 




v eb v cb 

i )^J> 



(a) Common-base configuration. 




(b) Hybrid equivalent circuit. 



Hybrid 



Common- 
emitter 





1 + h le 


h 


i e " o e j. 


1 






hi. 




l + *«. 




ft oe 



1 + fcf. 



Common- 
collector 






fc,«-l- 



ft/c^oc 



1 + ftfc 
A/e 

_ A OC 
/l /c 



Tee- 
equivalent 



r e +(1 -Cl)r b 



'b 



(c) Approximate parameter conversion formulae. 



h, b = 7.57 Q 

).268 x 
-0.996 



ft rb = 0.268 x lO" 4 



/i o6 = 0.103 x 10" 6 mhos 
(d) Typical values for type 2N929 transistor. 



Fig. 3.25 Conversion to common -base h-parameters. 



I > 1 



(a) Common -co I lector configuration. 



h ■ l b 
11 1 r. —zL 





r~r 



tc'b « '•oe v ec 



(b) Hybrid equivalent circuit. 



Hybrid 



h ic 



hie 



Common- 
emitter 



!-*,. = ! 

-a+A,.) 

Aoe 



Common- 
base 



Ait 



1-ft, 



1 + h, b 

* 1 + h tb ~ 
1 



1 + Afb 

Aob 



1+A 



/6 



Tee- 
equivalent 



" 1-0 

1 r -± — = 1 

(l-a)r e 

-1 

1- a 
1 



(l-a)fe 



(c) Approximate parameter conversion formulae. 



h lc = 2200 n 

h rc = 0.9999^1.0 

h lc = - 291 

h oc = 30 x lO" 6 mhos 

(d) Typical values for type 2N929 transistor. 



Fig. 3.26 Conversion to common-collector h-parameters. 



54 



Transistor Circuit Analysis 



ie 



eo 'VAA/ f • — *\AiA* — • — oc 



(a) Tee -equivalent ci rcuit, common-base. 



l-a 



-■b=-p' b 



BO VW f * VW-1 — oc 





<■<*=«•<; (1-<X)=. 



i+)8 



(b) Tee-equiva lent circuit. 



common -em i tter . 



Tee- 
param- 
eter 



P 



Common- 
emitter 



1 + A/e 

h le + 1 



Ke_ 
Ke 

h h re (l + h le ) 

"ie 

Ke 



Common- 
base 



- h ib 

i~Kb 
K b 

h ib ~a + h tb )^l 

Kb 

Kb 

Kb 

hfb 



Common- 
collector 



1 + A, 



_ his. 

Ke 



"lc + 



1 f h lb 
(c) Approximate parameter conversion formula 



a+A/c) 



a = +0.996 
r c = 9.7 Mfi 
r e = 6.667 fi 
r„ = 260 [l 

(d) Typical values for type 2N929 transistor 



Fig. 3.27 Conversion to tee-paramete 



CC 
2N929 30v 




Fig. 3.28 The a-c emitter-fol lower 

amplifier for Prob. 3.14. Choke I. 

and capacitors C l and C 2 isolate 

a-c and d-c circuits. 



PROBLEM 3.14 Figure 3.28 shows a single-stage, a-c transistor amplifier. 
The collector characteristics for the type 2N929 transistor are given in Fig. 3.29 
Determine: 

(a) A-c voltage gain, for a 10 mv input signal. 

(b) Input impedance. 

(c) Output impedance. 

Solution: (a) This is a common-collector circuit, thus requiring common-collector 
parameters to be used in the analysis. Let us first establish the d-c operating 
point at which the small-signal parameters are to be determined. Since I E = /,! 
for the very low base current of this example, a load line can be superimposed 
on Frg. 3.29, even though the 5000 ft resistor is in the emitter circuit. The op- 
erating (Q) point is determined as 

V CE = 11.6 v, I c = 3.7 ma, I B = 15/za (as given). 
This is close to the operating point of Fig. 3.6, in which the /.-parameters were 
determined for the common-emitter connection. These parameters are repeated 
below tor convenience: 

h ie = 2200 ft, 

Ke = 2 x 10- 4 , 

h le = 290, 

h oe = 30 x 10- 6 mhos. 

The above parameters are converted to common-collector parameters using the 
conversion formulae of Fig. 3.26c: 



Small-Signal Equivalent Circuits 



55 



h lc =h le = 220012, 



A™ = 1, 



h k = -(l + fi fe ) = -291, 
h nr = h nB = 30 x 10- 6 mhos. 



•oc — "oe 



The common-collector hybrid equivalent circuit therefore takes the form of 
Fig. 3.30. Using this equivalent circuit, 



»ec - v o" 




Fig. 3.29 Determining the operating point 
in Prob. 3.14. 



B f 1)c =2.2KQ 

-o wv— 




h tc 'b = 

-291 /„ 



e 



U j «'o| 



Z a v 




Fig. 3.30 Common-collector equivalent circuit corresponding 
to the amplifier of Fig. 3.28. 



The basic equations are 



'i = '6 



v 6 - A rc v ec 



'ic 



h, c i 



fc 'b 



h (c i 



'« = l B = 



fc 'b 



Rl.+ 



1 h oe R L + 1 



v =-i a R L- 
Since v ec = v 0) we may combine the above equations to solve for v in terms 
of i b : 



1 + h oc R L h ic 



Simplifying,. 



d _ A tc *z. x Ajc.\ = _ A fc R L /M (3i 3 3) 

\ l+h oc R L h,J l + h oc R L \h ic J 



Substituting numerical values, 

l + h oc R L =1.15, h ^= ^ r =4.54xl0- 4 , 



'fc 



291 



| Thus, 



h lc 2200 

(-253) (5000) 



1 + /VP, 1.15 



= - 253. 



1- 



2200 



(-253) (5000) vg 
2200 



Amplifier voltage gain is now determined: 



&> Transistor Circuit Analysis 



v 6 1 + 575 



575 

= 1 - 0.00174 ^1. 



The voltage gain is slightly less than unity. 

(b) If v g = 10 mv, then v ec = v ^ 10 mv. Now substitute in (3.22) and cal- 
culate i b in order to determine the input impedance Z,- : 



h lc h.„ • f 3 - 22 ] 



i b = Vbc ~ h ™ V ec = V g ~ h rc V Q 

Since the voltage gain is only slightly less than unity, let 



v = v e 



where Av /v is the per unit deviation of output from that corresponding to ex- 
actly unity gain. Substituting this expression in (3.22), 



(3.34) 





ib = 


v 6 
h ic ~ 




v e(l- 


Av 


Let h rc = 


1, and simplify: 














ib 


h ic 


ra 




Calculate the 


input impedance 


> Zi- 












z t 


ib 


hic 

Av 





Substitute numerical values: 

h le - 2200, ^l = 000174; z = 2200 = L2fi4 x l0 . m im m 
v o U.U0174 

(c) The output impedance is obtained by inspection of Fig. 3.30 as 

1 



Z„ = 



— +h c 



Substituting numerical values, 



z ° = T/sooo + aoTiF = 435oa 



The common-collector amplifier studied in the preceding problem exhibits the 
following characteristic features: 

1. The voltage gain is very close to unity. 

2. Input impedance is relatively high. 

3. Output impedance is relatively low. 

This circuit is called an emitter. follower, analogous to the vacuum tube cathode- 
follower. 

While the calculations of Prob. 3.14 usually provide satisfactory accuracy 
it is often important to know the deviation of voltage gain from unity to a high 
degree of precision. The approximation h rc = 1 is not sufficiently accurate, and 
a more precise figure is required. 



Small-Signal Equivalent Circuits 



57 



PROBLEM 3.15 For the emitter-follower of Fig. 3.28, using the "exact" value 
of h rc , calculate the percent deviation from unity gain and the input impedance. 
Use the equivalent circuit of Fig. 3.30. 

Solution: Rewrite (3.33) to obtain the voltage gain v /v g : 



-h tc Rl 



1 + Kc Rl [hi J 



Vg i _ ftfc r l 



1 + h nr . R 



oc "L 



Equation (3.35) may be expressed as 



(3.35) 



~l + h oc R L (h lc \ 
. h tc R L \h TC ) 



The quantity in brackets is very much less than unity. Therefore, dividing 
and keeping the first two terms of the quotient, 



1 



1 + (L±J1ocRl\ (hjc. 
h fc R L j \h rc 



For h r 



1, 



1 + h oc R L \ Ihu 



1 
575' 



■M1--V 



This is the value that was obtained in Prob. 3. 14. More accurately, 
h tc = 1 - h re = 1 - 2 x 10- 4 , 

J- = i s 1 + 2 x 10- 4 , 

h rc 1-2x10-* 

4=(l+2x 10" 4 )(1 - 17.4 x 10-*), 

A v e 1 - 15.4 x 10- 4 . 

The deviation from unity voltage gain is 0. 154%. 

The input impedance may be calculated from (3.34): 



■•^K^)} 



z - Y±- 



hie 



1-h. 



(-^) 



From the previous gain calculation, 

1 - ^Se. = 1 _ 15.4 x Hr 4 , 



Substituting in (3.37), 



(3.36) 



[3.34] 
(3.37) 



i„ = l-2x 10- 4 , 

= 1 - (1 - 2 x 10- J, )(1 - 15.4 x 10- 4 ) = 17.4 x lO" 4 . 



Z = 2200 1Q , l2M Mfl . 
17.4 



58 



Transistor Circuit Analysis 



R L = 500012 




Fig. 3.31 The a-c amplifier ci rcui t 
for Prob. 3.16. 



The input impedance is not particularly susceptible to the error introduced 
by using the approximate value of h rc . 

PROBLEM 3.16 Calculate the input impedance Z t and the voltage gain v /v e 
for the circuit of Fig. 3.31. 

Solution: Figure 3.31 is treated as a common-emitter circuit where R E is a cur- 
rent feedback resistor. Since I E and l c are nearly equal, the effective load line 
resistor is R L + R B , as shown in Fig. 3.32. The Q point is approximately 3.7 ma 
at 11.2 v. This is close enough to the operating point of Prob. 3.4; therefore the 
same h e parameters may be used: 

h ie = 2200 0, 
A re =2x 10- 4 , 
Afo = 290, 
Ke = 30 x 10- 6 mhos. 



h f „i 



le'b 



r€h 




(b) 

Fig. 3.33 Model for the ampli- 
fier of Fig. 3.31. (a) Exact 
equivalent circuit and (b) 
simplified output circuit. 




IS 20 
V CE • v olt ► 

Fig. 3.32 Finding the operating point for the 
circuit of Fig. 3.31. 

The equivalent circuit takes the form of Fig. 3.33a. The emitter resistor 
acts as a coupling element between the base and collector circuits, and is best 
dealt with on an approximation basis. This practice is almost always legitimate 
in transistor circuitry where parameters are rarely known to a high degree of ac- 
curacy. The following two approximations are very helpful. 

1. Let h te £ 0, since v ce h re is very small for A v h re « 1. (This may be 
checked after the voltage gain has been approximately determined, as explained 
below.) 

2. Let i e = i c , an excellent assumption for high current gain transistors. 
Using the above approximations, the output equivalent circuit can be simpli- 
fied as shown in Fig. 3.33b and analyzed by conventional methods: 



™ie 'b 



1 



^e't 



From Fig. 3.33a, 



Rr + R, 



tbh ie + 



l + (R E +R L )h oe 



(3.38) 



Re hie 



l + (R B +R L )h c 



Small-Signal Equivalent Circuits 59 

Solving for Z t = v g/i b , 

Z, = h ie + R ^ . (3.39) 

Substituting numerical values, 

?9 000 

Z, = 2200 + *»>}™>. = 27,3000. 

' l + (30x 10" 6 )(5100) 

The output voltage v is 



1 +h oe (R E + R L ) 



Substituting V g/Z { for i b , 



The voltage gain is 



y -**< h f X ^ 

° l + h oe (R E + R L ) Z { 



A Is = Z^Jlle x _L. (3.40) 

v & l + h oe (R E + R L ) Z i 

Substituting for Z f and simplifying, 

A v = =^^ t (3>41) 

A ie + /i ie h oe {R E + R L ) + h, e R E 

Before substituting numerical values, observe that if h fe is very large, the 
voltage gain reduces to 

A r = =^. (3.42) 

K E 

This approximate formula is very valuable in estimating the approximate behavior 
of circuits having the configuration of Fig. 3.31. 

The numerical results of this problem confirm the validity of (3.42). Us- 
ing (3.41), 

-5000x290 
A„ = 



2200 + 2200(30 x 10" 6 )(5100) + (290) (100) 
- 5000 x 290 



= -46. 
2200 + 337 + 29,000 

This compares well with a value of - 50 determined from the approximation of (3.42). 
Check the validity of our assumption that h Te v ce is negligible. Assume 
v g = 10 mv. Then v = A v v g = 460 mv. Thus, 

h re v ce = 2 x 10 -4 x -460 = - 0.092 mv. 

This voltage aiding the input signal is less than 1% of v e , confirming the sound- 
ness of the earlier assumption. 

The characteristics of the above circuit can be further clarified by solving for 
input impedance and voltage gain using the common-emitter tee-model. The pa- 
rameters were determined earlier in Prob. 3.8: 

291 
r b =260O, r a = 6.67 0, r c = ^-^ = 9.7 MO, 

fl = 290, r d = -^- = 33,0000. 

1+ P 



60 



Transistor Circuit Analysis 



PROBLEM 3.17 Using the above parameters, solve the tee-equivalent circuit of 
Fig. 3.34 for Z { and A v . 

Solution: The tee-circuit is easily solved using conventional two-mesh analy- 
sis. Since most engineers are more adept in using voltage generators, these are 
substituted for the current generators of Fig. 3.34, yielding the modified circuit 
of Fig. 3.35. 

The mesh equations are 

v 6 = (r b +r e + R E )i b + (r e + R E )i c , 



Ph 



B r b 




+1 




4 — wv— -4 — • 



f^p h = (Re + r e )i b + (r e + R E + ^S- + R L \ if 



(3.43) 



The second of these equations may be rewritten as 



1+0 



Using determinants, solve (3.43) and (3.44) for i b : 



(3.44) 



1 



Fig. 3.34 Tee -equivalent circuit 

for common -emitter connection 

showing resistor R E . 



- V 



t- 



r „ + R K 



r e +R E + —£- + R L 
1 + 



+ R B+T f^ + R L 



where A is the determinant of the system equations. Solving for Z, = v 6 /i b , 

A 



Z. 



r e + R B + 



(3.45) 



1 + 



+ Rr 



The determinant A is 



1 + B 



'b 



1 + 



B r b 
-• — VW- 



&l 



A = 



7 



t b + r e + R E 



r B +Rr 



R E +r e - 






+ Rl 



+1 /~\ ?° ' c 

(~) ^ '" 'M Je (u) R L ^ v =r b ^r e+ R B+ -i- + R L \ + (r e + R E )( fc + R L ). 

Substituting (3.46) in (3.45), 



Fig. 3.35 Equivalent circuit solved 
by using mesh currents. 



Z l = r b + 



(r. + R E )(r c + R L ) 



(r e + R E ) + 



(3.46) 



(3.47) 



Insert numerical values: 



1 + /3 



+ Rl 



Z, - 260 + a06-67)(9.7xl0' + 5000) _ ^^ 

(106.67) + 9J x 1Q6 + 5000 
291 

This checks very closely with the value of input impedance calculated for 
the hybrid circuit of the previous example. 

Simplifying (3.47) by making the following approximations, 

r e + R E « -^ +R L , r. <v (r e +R E )(r c +RL) 



1 + /3 



T h « 



1 + /3 



+ Rr 



Small-Signal Equivalent Circuits 



61 



we obtain 



Z,^ 



(t e +R E )(t c +R L ) 



+ Rl 



(3.48) 



1 + 



A further level of approximation with consequent simplification is introduced 
by assuming that 

» Ri, 



l + i8 



which leads to 

Z, = (1 + /3)(r e + R E ). (3.49) 

Check this approximate Z t with the more accurate value of 27,10012 by sub- 
stituting numerical values: 

Z, = (1 + 290) (106.7)= 31,000 fl. 

This approximation is perfectly satisfactory for many purposes. 

Now calculate voltage gain. Determine i c by the use of determinants, 



t b + t e + R E 



£lc 



1_ 

A 



1 + 18 
Since v = -i c R L , and A v = v /v g , 

We now substitute the expression for the determinant: 

A = t b It. +R E + y±- + R^j + (r e + R E )(r c + R L ). 
Simplifying (3.50) and (3.46) by the following approximations, 



(3.50) 



[3.46] 



r c » t e + R E , 
the equation reduces to 



1 + 



»r e +R E , r c »R L 



p. ll^ 



1 + 



•(iV*) 



(3.51) 



+ r c (r e + R E ) 



Substituting numerical values, 



A„ = 



290 

-(5000) — 9.7 x 10« 

291 



260 



f 9,7 x 1Q6 + 5000J + 9.7 x 10 6 (106.7) 



= -46.3. 




r i i 

'E, 



^ Transistor Circuit Analysis 



This confirms the previously calculated value of - 46. 

The expression for gain (3.51) can be further simplified. The second term in 
the denominator of (3.51) is often much greater than the first term when R B is 
present in the circuit. Therefore, 



A.* - Rl 



(3.52) 



r e +R B 
or simply, 

A v ^ ~ R ^ , 

r e +R E 

As a check, substitute numerical values from the above problem: 

^^?— • 

This is obviously an excellent check of the approximate expression. 

The significance of the simplified gain formula -^.//fe is readily apparent 
from a physical viewpoint. The base-emitter voltage is small, so that changes 
in base voltage must be approximately duplicated by changes in emitter voltage. 
The presence of an emitter resistor means that emitter (and therefore collector) 
current must follow changes in base voltage. If the collector current follows 
base voltage changes, then the drop across R L must do likewise. The drop 
across R L is equal to R L /R E times the emitter resistor drop, which approximately 
equals the base voltage. Hence, the voltage gain approximates -R L /R E . If R B 
is substantially larger than the variations of r e due to temperature, long term 
drift in the point and voltage gain will be relatively insensitive to these factors. 
Voltage gain is also relatively insensitive to changes in /3. In the above cir- 
cuit, if doubles, the voltage gain will increase by about 0.2%. Although this 
use of R B — an example of current feedback —reduces voltage gain, it provides 
a simple method of introducing negative feedback around a single stage for in- 
creased stability and input impedance. 



3.7 Hybrid-7T Equivalent Circuit 



h ie = 2200fi h le = 290 

h re = 2 X 1CT 4 h oe = 30 X 10- 6 mho 



This equivalent circuit was originally derived by means 
of fundamental considerations in Chap. 1. Its value rests primarily on its use at 
(°> "*& frequencies. However, in this chapter we will concentrate on its low-fre- 

quency characteristics, in particular, the development of conversion formulae be- 
tween h- and hybrid-* parameters. Accordingly, the capacitors which represent 
high-frequency effects are momentarily ignored. 

Figures 3.36a-b show the h- and hybrid-* models for comparison purposes. 
Note that the hybrid-* circuit has five independent low-frequency parameters; i.e. 
one more parameter than the other equivalent circuits we have thus far studied. 
One parameter may be specified in an arbitrary manner. Usually it is convenient 
to select r bb , as this arbitrary parameter, although at high frequencies the actual 
value can be measured. No problems arise from this arbitrary selection; however 
_. , ,, , . u L ltlS P referable to choose r bb , so that all hybrid-* parameters are then positive. 

rig. j.Jo (a) Hybrid equivalent cir- 
cuit for common -emitter connection. PDnni CM ■» in ,-■ ,. 

(b) Hybrid-77 equivalent circuit for ™ UB L-CM J.18 Given the fi-parameters of Fig. 3.36a, derive conversion for- 
common -emitter connection. Capaci- ">ulae for the hybrid-* parameters. 

tive components are not shown in C»l„»!„. tl l 

this low-frequency model. Solution. The basic approach is to compare the behavior of the circuits for the 

conditions of the output short-circuited and the input open-circuited; i.e., short- 




(b) 



Small-Signal Equivalent Circuits 63 



circuiting the collector to the emitter so that v ce = 0. Then i c /i b is calculated 
for both configurations and equated. 
For the hybrid-??, 

(3.53) 









'c = 


SmVb'e 


= >bgm 


r b'c 


+ Tb'e 


For the /i-parameter 


circuit 


J 

'e = 


hfe 'b 


$ 




Equating, 






















Bm = 


» 

f eq 


feq = 


rb'c 

Tb'c 


Tb'e 

A r b ' e 



(3.54) 
Vc ■•- r b ' e 

Note that r eq = r b ' B since normally r b ' c » r b ' e . 

In a similar manner, the short-circuit input impedance is calculated. For the 

hybrid-;7, 

Z l = T bb ' + r.q, 

and for the h-parameter circuit, 

Z, = h le . 
Equating, 

fcfe = Tbb' + fau- 
lt we determine r bb ' either by measurement at high frequency or arbitrarily, we 
can determine r eq : 

feq =h le -i bb '. (3-55) 

From (3.54), g m is determined: 

*. = — ^— . (3.56) 

h le ~ 'bb' 

A simple approximate expression for the large-signal value of g m may be de- 
rived. From (3.53), 

{ e = &m V b 'e- 

Dividing both sides by I B , 

b_ =gm Y^S.. (3.57) 

/a 'a 

However, based on (1.11) at room temperature (300°K), 

V b , e _ 0.026 

Substituting in (3.57), 

i '* 

oil 



0.026 

For commercial silicon transistors, a somewhat more accurate expression for 

£m is 

is f ' (3.58) 

Sm 0.043 

If no measured value of r bb ' is available, this expression can be used to estimate 
g m and r bb '. 



64 



Transistor Circuit Analysis 



To continue our conversion of parameters, v c ./v b8 is determined with the in- 
put circuit open, and v c , applied at the collector. For the hybrid-*, 



;V».-v c . ■ *>'> , y , '■ 



For the A-parameter circuit, 



Equating these expressions. 



r b'« + r 6 ', 



v be = /»r« v c 






(3.59) 



*W 



-A* 



TABLE 3.1 Conversion from hybrid 
to hybrid-TT parameters. 



&m z 


A /e 




[3.56] 


- 




A ie - r b b 






r b'c- 


A ie - r bb > 

Ke 




[3.60] 


fb'e = 


hie - r bb > 
1-A,. 






= ft /e ~ ffcb' 




[3.61] 


-!--*-- 


,, 1+A/e 
""re- 


-tl t e 




r ce 


"fe - 


Tbb' 




= ftoe 






[3.63] 



**t - *** At* ~ *** 

A re "re 



For these same conditions, 

Substituting (3.60) for t b - c in (3.59) to determine r b '„ 

* * A*»~«'tri» > 



(3.60) 



[3.59] 



(3.61) 



Again, for these same conditions, the base circuit open and v c . applied to the 
collector circuit, 



v b'» = v c . 



«V. 



f 6'» + rv e 
All currents at node C of the hybrid-jr circuit are now summed: 



[3.59] 



*'. - vc U m tb '° + — + — * — \ (362V 

This may be modified by substituting the hybrid parameters already determined: 



But by definition, 



so that 



v ee h l9-T bt) ' h lm -r bb ' r eo 



r- A oe , 



Ac - A M * + *'■-*" = A oe . (3.63) 

r c« "le-r bb i 

This completes the required conversion. The results are summarized in Table 3.1. 

PROBLEM 3.19 Using the parameters of Fig. 3.36a, derive the corresponding 
hybrid-7r parameters for r 66 / = 0. 

Solution: The required parameters are found by direct substitution. Referring to 
Table 3.1, 



290 
* m= 2200 = <U32mh0 ' 

2200 
Tb ' c = 2710= 

r b ' e = 2200 0, 



= llx 10 6 Q, 



[3.56] 

[3.60] 
[3.61] 



Small-Signal Equivalent Circuits 



65 



1 -= 30 x 10- 6 - 2 x 10- 4 | J?L ] = 3.4 x lO" 6 mhos, 



\2200 ) 



[3.63] 



so that r ce = 286,000 £1. 



PROBLEM 3.20 Repeat the previous problem using r bb ' = 255 Q. 
Solution: Proceed as before: 

290 



1945 
1945 



0.149 mho, 
-=9.73x 10 6 fl, 



oc "2xl0- 
r b >. = 1945 fl, 

— = 30 x 10- 6 - 2 x 10- 4 -££-= mho, 
t.. 1945 



[3.56] 

[3.60] 

[3.61] 
[3.63] 



so that r ce = ■». 

For r bb > > 255 Q, r ce would be negative, making it inconvenient for calcula- 
tions. 

PROBLEM 3.21 Figure 3.37 shows the hybrid-77 amplifier model. Using the hy- 
brid-w values found in Prob. 3.20, calculate load power, and current and voltage 
gains. 



R 



R e = 



K r bb ' = r b'c - n 

lKO b 25511 B ' 9 - 73x lo6fl 

« Wr-f WV f- 



g - rbb' 

lKfl B 225fi 



-W\» • W^ — f 



9.73 X 10" fl 

-vs/v- 





5Kft 



K L =0.149v b ' e R L = 745v t 



-._.,,., .... . , n ■ o on Fig. 3.38 Hybnd-77 amplifier circuit 

Fiq. 3.37 Hybrid-TT amplifier circuit for Prob. 3.20. M „ ' . , 

s ' of Fig. 3.37, with current source re- 

placed by voltage source for easier 
calculation. 

Solution: Start by replacing the current source and R L of Fig. 3.37 with the 
equivalent voltage source shown in Fig. 3.38. The basic equations are 

v g = {R £ + r bb ' + r b ' e ) i t - t b > e i 2 , 

V L = - r b ' e ii + (ffc'e + *Vc + Rl) V 

Substituting numerical values and solving by determinants, 
I i l = 3.38 fj. a, 

\ i 2 = 0.44 n a. 

Since v b > e = r b ' e (i, - i 2 ), 
j v L = 745 r b ' e (»', - i a ) = 4.12 v, 

( and continuing, 

- v ce = v L + i 2 R L = 4.12 + 0.44 x 10" 6 x 5 x 10 s 2 4.12 v, 



i„ = - 



4.12 
R L ~ 5000 



= 0.824 ma, 



p l =i c v ce = 3.12 mw. 



66 Transistor Circuit Analysis 

Thus, 

A Lm 824x10-' 
i, 3.38 x 10- 6 

A v = Zls± = ~ v " = - 625. 

v be v b'e + Tb'b 'b 



3.8 Supplementary Problems 

PROBLEM 3.22 Give the generalized definitions of static and incremental h- 
parameters. 

PROBLEM 3.23 Define mathematically the static and incremental fc-parameters 
for the common-base connection. 

PROBLEM 3.24 For the characteristics shown in Fig. 3.5, find the /i-parameters 
for a 2N929 transistor when the CE connection is at V CE = 10 v and I c = 2 ma. 

PROBLEM 3.25 Determine r e , r b , and r d for the A-parameters of Prob. 3.24. 

PROBLEM 3.26 In the circuit of Fig. 3.7, let R L = lOKfl, R B = «, R g = 
2KQ, C B = oo,and I B = 20/xa. Determine (a) the operating point, (b) the 
incremental A-parameters at the operating point, and (c) r e , r b , and r d . Draw this 
circuit, replacing the transistor by its tee-equivalent network, and determine the 
input and voltage gain using standard circuit analysis and assuming r d infinite 
as an approximation. 

PROBLEM 3.27 How are r e and r d measured? 

PROBLEM 3.28 Design a simple (3 measuring circuit. 

PROBLEM 3.29 In the circuit of Fig. 3.28, if l B = 5 pa, find (a) the maximum 
rms output voltage without distortion, (b) the v^ that generates the maximum 
voltage, and (c) the approximate input impedance. 

PROBLEM 3.30 If R L = 10 6 fl in Fig. 3.31, the approximate formula (3.42) is 
no longer valid. Why? 

PROBLEM 3.31 If h ie = 5000 Q, /, fe = 300fl, h re = 10~ 4 fl, and h oe = 10~ 6 O 
for a transistor, find (a) the tee-equivalent circuit parameters and (b) the input 
and output impedances. 

PROBLEM 3.32 For Fig. 3.2b, define the small signal /i-parameter in physical 
terms for the common-emitter circuit. 



BIAS CIRCUITS 
AND STABILITY 



4 



CHAPTER 



4.1 Introduction 

The key to correct transistor operation is the establish- 
ment of a. quiescent operating (Q) point. This corresponds to the steady current 
condition that occurs in the absence of an input signal. Setting up a bias point 
for transistors is more difficult than for vacuum-tube circuits because of transis- 
tor leakage currents, which are extremely sensitive to temperature. A transistor 
which is correctly biased at room temperature may be incorrectly hiasfid at high 

temperature. 

This drift in operating point is far more characteristic of high-leakage ger- 
manium transistors than low-leakage silicon ones. However, leakage currents are 
Important even for silicon transistors. Therefore, this chapter not only considers 
rSow to set the correct bias point but also how to compare circuit configurations 
for sensitivity to leakage changes. It will be found that some configurations are 
for more stable than others with changing temperature. 



4.2 Leakage Current 

Diode leakage has been described in Chap. 1. The re- 
verse-biased collector-base junction of a transistor (emitter open) exhibits simi- 
lar leakage characteristics. Transistor collector-base leakage l CBO varies with 
temperature typically as shown in Fig. 4.1. Since leakage currents in silicon 
transistors are far lower than in germanium devices, Fig. 4.1 tells only part of 
the story. 

PROBLEM 4.1 A germanium transistor has a leakage current of 5 pa at room 
temperature (25°C). If Fig. 4.1 applies, find the leakage at 75°C. 
Solution: The room temperature value is 5 pa. At 75°C, this is multiplied by a 
factor of 30, for a leakage current of 150 /xa. 

PROBLEM 4.2 A 2N929 silicon transistor has a maximum 25°C leakage current 
of 0.01 pa. Find the maximum leakage from Fig. 4.1 at 125°C. 
Solution: From Fig. 4.1, the leakage is multiplied by a factor of 45, for a leak- 
age of 0.45 pa. 

Because germanium transistors have much greater leakage currents than sili- 
con ones, a germanium 2N1308 n-p-n type has been selected for examples in this 
chapter. Figures 4.2-3 show its common-emitter characteristic curves, which will 
provide the necessary data for subsequent calculations. Although this transistor 

67 



68 



Transistor Circuit Analysis 



100 



10 



u 





« 1.0 



0.1 



0.01 



-50° 





























































































Silic 


on / 






























































































































































































































German 


um 




















i 














r 














f- 














/ 














/ 














/ 














/ 






Germanium 

(multiply scale by 10 

. ■ i i 


»v 


f 



-25 1 " 



25 L 



50 1 - 



75 u 



100° 125° 



Junction temperature, °C — ► 



Fig. 4.1 Variation of l CBO with temperature relative 
to 25°C. 



0.6 



0.4 






0.2 









V CE =2v 




















-20°C 
25°C 


r 












r 












70°C 


r 















0.1 0.2 0.3 0.4 0.5 0.6 0.7 

l B , ma-* 

Fig. 4.2 Input characteristics of 2N1308 n-p-n germa- 
nium transistor vs. junction temperature for the com- 
mon-emitter connection. 




Fig. 4.3 Collector characteristics of 2N1308 n-p-n 

germanium transistor vs. junction temperature for 

the common-emitter connection. 



'CBO 




Fig. 4.4 Common-base tee-equivalent 

circuit. The directions of current flow 

correspond to an n-p-n transistor. 



has a 5 pa maximum leakage at room temperature, 1 ^a is more typical and 
assumed here. 



4.3 Tee-Equivalent Circuit 

Representation of Leakage* 

The tee-equivalent circuit, discussed in Chaps. 1 and 3, 
is particularly convenient for studying the effects of leakage in transistor cir- 
cuits. Figure 4.4 gives the equivalent circuit for d-c or bias conditions. If the emit- 
ter circuit is open, l B « 0, and the output current from collector to base is / CBO 
(sometimes abbreviated to l co ). This circuit, in effect, provides a definition of 
collector-base leakage. 

A modified tee-equivalent circuit for the common-emitter connection is pro- 
vided in Fig. 4.5. Here, the leakage component is between collector and emitter. 
The value of leakage current, l CBO , in terms of I CBO , may be determined from 
simple transistor equations. 

* As we are analyzing only d-c signals in this chapter, /? and a correspond to static characteristics. 
Currents and voltages are shown with their normal polarities. 



Bias Circuits and Stability 



69 



PROBLEM 4.3 Derive a formula for l CEO in terms of current gain /3 and / cbo . 
Solution: The basic transistor current equations are 

We combine the two expressions to eliminate l E and then solve for / c : 



f^ V 



. 1+a ■ 



(4.1) o 



Now we substitute the common- emitter current gain /3 as a new variable to re- 
place a in (4.1), where j8 = a/(l - a). Therefore, 

h = Icbo (/3 + 1) + h P- (4-2) 

Since the second term in (4.2) is the normal transistor output current, the first 
term must be the required leakage component, /cec- Therefore, 




Fig. 4.5 Tee-equivalent circuit in the 
common-emitter connection. 



Icmo m l&solX + /8X 



(4.3) 



The current gain factor j8 leads to a relatively high leakage current in the com- 
mon-emitter circuit. 



Since the leakage current occurs with the base open, the leakage is identical 
in the common-collector circuit. The multiplied leakage currents in the common- 
emitter and common-collector connections, and their high temperature sensitivity, 
lead to bias point instability. The drift in bias point due to temperature or inter- 
changing transistors of the same type is the central problem of biasing. The es- 
sential requirement is that l c be maintained constant over all operating condi- 
tions, because this fixes the quiescent point on the load line. 

Figure 4.6 provides additional clarification on the effect of leakage. The 
figure shows / c vs. l B in the common-emitter connection. Note that at l B = 0, 
the collector current must equal I C bo- Furthermore, when base current becomes 
negative and equal to the collector current, emitter current must be zero, so that 
the coordinates of point P are as shown. 

PROBLEM 4.4 For the circuit of Fig. 4.7, determine R B at 25°C, such that 
I c = 19 ma at the operating point. 

Solution: Refer to Figs. 4.2 and 4.8a. On the latter, draw a load line corre- 
sponding to R L = 100. The l c intercept is 5 v/100 = 50 ma. Thus, l c = 19 ma 
at l B = 0.1 ma (point P,). , 

From Fig. 4.2, for I B = 0.1 ma, V BE = 0.22 v. The voltage across R B is | npu 
therefore 5 - 0.22 = 4.78 v. For this voltage, and a base current of 0.1 ma, 




*-/« 



Fig. 4.6 Leakage in a common- 
emitter circuit. 



Rr 



4.78 
0.1 



x 10 3 = 47,800 Q. 




PROBLEM 4.5 For the conditions of Prob. 4.4, find I c at 70°C. 
Solution: From Fig. 4.2, V BE has decreased to 0.12 v. Now I B is 

4.88 v 



Fig. 4.7 Common-emitter amplifier 
with bias set by adjusting R B . 



47,800 Q, 



= 0.102 ma. 



In Fig. 4.8a, the operating point has moved from P t (/ c = 19 ma) to P 2 , where 
l c = 23 ma. This is a considerable change. 



70 



Transistor Circuit Analysis 



60 
50 

40 

t 

□ 

E 30 

U 

20 
10 



— 


70 


°c 
°c 




i 










■— "**"* 


_ r 





0.5 

"" c 


Oma 

r — 
.20 ma 




if *** 
1 s 

\t 


^€ 


^q 






0.1 5 ma 










1/^- — " 


•^ 








0.10 ma 


ys" 






p, 




0.10 


ma 


Y 










0.05 ma 


1 '" 

fy 










0.05 ma 


Y 








.\.. 


/ B =o 


' 









-x 


r B =o 



70°C 




0.005 ma 

/ B =o 



0. 005 ma 
I B =0 



3 4 

F CE ,volt- 

(a) 




1 1.5 2 2.5 3 

V CE / vo 1 1 *• 

(b) 

Fig. 4.8 (a) Collector characteristics of common-emitter 

connection with superimposed load line, (b) Expanded 

region showing load lines. 



The germanium transistor of the preceding examples has a relatively low 
Icbo- Considerably higher leakages are common, leading to correspondingly in- 
creased drift of the operating point. 

PROBLEM 4.6 Referring to Fig. 4.9, determine R B so that V CE = 1.25 v at 
25°C. With this same R B , find V CB at 70°C. 

Solution 
/ 



Draw a new load line on Fig. 4.8b. At point P 3 , V CE = 1.25 v and 



B = 0.005 ma. From Fig. 4.2, V BE = 0.22 v. The drop across R B is 1.5 - 0.22 

= 256,000fi. 



1.28 v. With a base current of 0.005 ma, 

s„- L28 



Input 



CE 



5x 10- 6 

At 70°C, V BE decreases to 0.12 v (approximately - 2.2 mv change per de- 
gree C). Base current, at 70° C can be calculated: 



Fig. 4.9 Resi 
for V CE 



stor R B is adjusted 
1.25 vat 25°C. 



1.5-0.12 _ 1.38 
256,000 ~ 256 



;10~ 3 =■ 0.0054 ma. 



This results in an operating point (P 4 ) of V CE = 0.2 v. At. such low voltage, the 
transistor is almost inoperative, showing the possible critical effects of leakage 
change with temperature. 

PROBLEM 4.7 In Prob. 4.6, find the quiescent collector current I c at 25°C 
and at 70°C. 

Solution: From Fig. 4.8b, / c = 1 ma at 25°C (P 3 ) and 4.5 ma at 70°C (P„). 
This is an enormous percentage change and is due to the fact that at low oper- 
ating levels, l c contains a particularly high leakage component. 



In the previous examples, a large bias resistor is in series with the base, 
essentially presenting a current source characteristic. Although base current is 
relatively independent of temperature, collector current may change significantly, 
perhaps drastically, when the transistor is operating at low current levels, It is 
thus worth comparing this simple bias circuit with other bias circuits to see 
whether or not the operating point stability with temperature can be improved. 



Bias Circuits and Stability 



71 



4.4 Constant Base Voltage 
Biasing Techniques 

The following problems illustrate the stability of the 
transistor operating point (collector current) with the base voltage held reason- 
ably constant with temperature, in contrast to constant base current conditions. 



PROBLEM 4.8 Referring to Fig. 4.10, determine R B so that V C e 
Find l B and l c - Calculate I B at 70° C. 



2 v at 25° C. 



2.5 



eq 



1000 + Rr 



0.22 



R. 



1000 x R B 
1000 + R B 

= 5 x 10- 6 . 

Solving, 

R B = 97 O. 
At 70°C, V BE is reduced to 0.12 v, and the base current becomes 



2.5 x 



97 
1097, 



0.12 



1000 x 97 
1097 



1. 13 ma. 



1KQ 



Solution: Draw a load line on Fig. 4.8b. The operating point for V CE = 2 v is 
shown at P 5 . At this point, I c = 1.25 ma and I B = 5 fia. 

To determine R B , use Thevenin's theorem which states (with reference to 
this problem) that the source resistance R eq driving the transistor base equals 
the parallel resistance of R B and 1 Kfl, and that the equivalent source potential 
7 eq equals the open base circuit voltage at the junction of the two resistors. 
Figure 4.11 shows how the circuit is simplified for analysis by the application 
of Thevenin's theorem. The base-to-emitter drop is represented by a battery of 
0.22 v at room temperature (see Fig. 4.2). 

Resistance R B is now calculated: 




2N1308 



Fig. 4.10 Voltage divider for adjust- 
ing base bias voltage. 




o 



1000 xR B 

1000 + R B 
— W\r 






22v 



J- 



V eq =2.5v 



1000 +R, 



(b) 

Fig. 4.11 Simplification of the cir- 
cuit of Fig. 4.10 using Thevenin s 
theorem. 



This is over two hundred times the base current at room temperature. Obviously 
we may conclude that constant voltage base-emitter bias is impractical. 

The previous considerations may be examined from a somewhat simpler view- 
point. The change in base-emitter voltage is 0. 1 v. The effective resistance is 
97 x 1000/1097 = 88.5 fi. The change in current is 0.1/88.5 = 1.13 ma. 

The result might have been expected. Figure 4.2 shows that small changes 
in base-emitter voltage can lead to very large current changes when the effective 
external resistance in the base circuit is small. A large base resistance is nec- 
essary to achieve relative insensitivity to changes in V BE . 



PROBLEM 4.9 For the circuit of Fig. 4.12 and the transistor characteristics of 
Fig. 4.13: 

(a) Determine I B and /c for V C e = 2 v at 25° C. 

(b) Using the above value of I B , find Vce and l c at 70° C. 

(c) Determine a new l' B at 70°C, so that l c is restored to its 25°C value. 




/? L = 50on 



2N1308 



Fig. 4.12 Transistor in common- 
emitter circuit with constant 
base current drive. 



72 



Transistor Circuit Analysis 



Solution: From Fig. 4.13: 

(a) Point P, at I B = 0.005 ma; l c = 1 ma at 25°C. 

(b) At 70°C, for l B = 0.005 ma, l c = 4.7 ma and V CE ^ 0.2 v at point P 2 . 

(c) Since l B = -0.025 ma gives V CE = 2 v, l c = 1 ma at point P t at 70°C. 



- 0.005 ma 




0.025ma 
0.005 ma 



Fig. 4.13 Low level transistor characteristics 
of common-emitter connection with superim- 
posed load line. 





V CE , volt — *- 

Fig. 4.14 Common-emitter collector characteristics of 
the 2N1308 transistor at 25 C. The two values of base 
current for each curve correspond to two different tran- 
sistors of the same type. 

Aside from the effects of temperature on transistor stability due to changes 
in V BE and Iqbo • there is a considerable spread in characteristics among tran- 
sistors of the same type. Replacing a transistor in a given circuit can lead to a 
major shift in operating point. 

Figure 4.14 displays a family of collector characteristics for a 2N1308 ger- 
manium transistor. The values of l B in parentheses correspond to a low current 
gain unit. The unbracketed base currents refer to a medium j8 transistor. The 
three-to-one variation in ft is not uncommon; similar variations occur over mili- 
tary temperature ranges such as -55 c to -t85°C. 



Fig. 4.15 Common-emitter circuit 

with approximately constant base 

current drive for Prob. 4.10. 



PROBLEM 4. 10 The transistor used in Fig. 4.15 has the characteristics of 
Fig. 4. 14. Calculate the following: 

(a) R B , such that I c = 9 ma with the low /3 transistor. Also determine V C b- 

(b) With R B fixed, change to the higher /3 unit. Obtain a new operating point, 
and discuss its usability. 

(c) Readjust R B to achieve I c = 9 ma for the high (3 transistor. Discuss the 
usability of the new operating point. 

Solution: (a) Referring to Fig. 4.14, at l c = 9 ma (point P,), l B = 0.15 ma and 
V CB = 2.7 v. The operating point is centrally located in the usable area of the 
characteristics. Since the base-emitter drop is 0.22 v (see Fig. 4.2), the drop 
across R B is 5 v - 0.22 v = 4.78 v: 



R* 



4.78 



0.15 x 10- 3 



31,800 0. 



Bias Circuits and Stability 73 



(b) The base current is essentially unchanged with the high (3 transistor, be- 
cause l B is almost entirely determined by the values of R B and V C c- Assuming 
l B = 0.15 ma on the same load line as before, the new operating point is located 
at P 2 , where l c = 19 ma and V C e = 0.2 v. This point is not in the useful oper- 
ating region of the transistor (the transistor is in saturation). 

(c) To restore I c = 9 ma using the high /3 transistor, reduce I B to 0.05 ma, 
thus returning to the original operating point in the center of the linear region. 
A new R B is now required: 

5 - 22 
R B = — — ^~ = 95,600 0. 
0.05 x 10- 3 

If we now use the low /S transistor with the new R B , the operating point moves to 
near cut-off, point P 3 . 



The foregoing example illustrates the difficulty in maintaining a stable oper- 
ating point as transistor parameters vary. For stable operation, it is important to 
bold l c reasonably constant as V BE , Icbo, "rid fi vary with temperature, aging, 
and from transistor to transistor. The next section develops a quantitative ap- 
proach to stability, so that different circuits may readily be compared. 



4.5 Stability Factors 

For the purpose of comparing the relative stabilities of 
different transistor circuits, a stability factor S is defined as 

where 5 is a measure of the sensitivity of the collector current I c to changes in 
leakage current Icbo, and varies with the circuit configuration, such that the 
lower the value of S, the more stable the circuit. This stability factor can be 
calculated using convenient formulae applicable to the specific circuit con- 
figurations. 

The permissible value of S depends on both the transistor material and the 
requirements of the application. Generally speaking, low-leakage silicon tran- 
sistor circuits tolerate a much higher S than relatively high-leakage germanium 
transistor circuits. For silicon, leakage current may typically be 0.01 /na, while 
a comparable germanium transistor may have an Icbo ot 5 //a. For an S of 25 
and similar bias circuitry, l c changes by 0.25 //a in the silicon circuit, and by 
125 fia in the germanium one. 

The following discussion investigates common bias circuits, establishes de- 
sign procedures, and evaluates stability. The common-base circuit is not con- 
sidered because a constant bias current Is leads to a practically constant Ic- 
This follows since I c = I E . The common-emitter circuits considered will lead 
to results directly applicable to the common-collector circuits, by setting the 
collector circuit 'resistance R L equal to zero. 

Figure 4.16a shows the general form of the most commonly-used bias circuit. 
A single battery source and current feedback {Re) characterize the circuit. A 
simplified equivalent circuit (r c = <*, r E = 0) is shown in Fig. 4.16b. 

If R t in parallel with R 2 constitutes a very low equivalent resistance /? eq in 
the base circuit, the base voltage V B is essentially constant. The drop across 
R E is significantly higher than V BE . The emitter current adjusts to satisfy the 
relationship: 



74 



Transistor Circuit Analysis 



Re Re 

if V B » Vbe, which is a valid approximation. Since lc = Is, the collector cur- 
rent remains about as constant as the voltage at the base, notwithstanding 
changes in V BE , 1 C bo', and /3. 

The behavior of the circuit depends on a low value of the combination of R 
in parallel with R 2 . The current in these resistors should be substantially more 
than the base current. However, the resistances must be high compared to the 
reactance of the blocking capacitor at the minimum a-c input signal frequency. 

Note that in practical a-c amplifiers, R B is by-passed to avoid gain reduction 
due to a-c negative feedback. The negative feedback is, of course, the basis for 
d-c stabilization, on which the capacitor has no effect. 

PROBLEM 4.11 Derive formulae for / c and the stability factor S in terms of 
circuit parameters for the common-emitter amplifier of Fig. 4.16a. 



Input © 




(a) 



R„ 



o /WV 



, VccR 2 
R,+R 2 




Fig. 4.16 (a) General bias circuit for common-emitter connection, 
(b) Simplified equivalent circuit. 

Solution: The collector current is 

lc - fiI B + Q8+1)/cbo.' 
From Fig. 4.16b, 



(b) 



| )(P + l)l C BO 



[4.2] 



' cc 



R, + R 



2 -V B E=*-&r l B + R E l E . 



R x + R 2 



Also 



(4.5) 



The above equations may be combined, eliminating / B and l E , and solved for 
l c in terms of the parameters of the circuit. The basic bias equation becomes 



Re + /_!_} JL* 



(4.6) 



Equation (4.6) is a fundamental one, readily modified and adapted to the solu- 
tion of a variety of problems. Now differentiating (4.6) with respect to l CBO 
yields 



Bias Circuits and Stability 75 



He 



Ut + aJ 

\1 + P) R l + R, 



Re 

S = -^ — ^— ^ LJ ^ / • (4.7) 

R* + 



Since 1/(1 + |8) is very small, minimum S occurs when R B » R l R a /(R l + /?,). As 
this condition is approached. 5 approaches unity. 



It is appropriate at this point to introduce the additional stability factors 

w = JZc_ and N ^ilc t (4>8) 

which are measures of the sensitivity of collector current to changes in V BB 
and /3, respectively. Applying these definitions to (4.6), 

If.-ife-.. l±l « Zl . (4.9) 

dv BE „ / 1 \iA. p funu R > R > 

RB + \Trfi)R-^t RBil+fi)+ R^t 

Solving for N = ril c /(ifi is tedious but ab&ululth direct. The mathematics 
can be simplified by differentiating with respect to a: 

remembering that jS = a/(l - a) and 1/(1 + /3) = 1 - a. Let R,R 2 /(/?i + R 2 ) =/? eq . 
an equivalent base circuit resistance, and k = /?,/(/?, + R 2 ), an attenuation factor. 
Substituting in (4.6), 

(* V cc - V BB ) a + /cso («b + R. q ) 
/ c _ ■ . (4. 10) 

Differentiate with respect to a: 

81 c „. (Ru + *.,)(* ^cc - ^be + /cboR«») „ tiX 
= JV*= :: . (4.11) 



The expression (4.11) gives the variation of /c with a, and is a valuable meas- 
ure of stability in its own right. The symbol for d lc /dOL is N*. 

Substitute /3 for a in the expression for JV*: 
3a = 



WW 



76 Transistor Circuit Analysis 



The factor N* is often more convenient to use than N since it changes very little 

An additional, sometimes convenient relationship, is established by compar- 
ing the expressions for S and N*, i.e., (4.7) and (4.11): 

r^.Sx^il^i. (4 . 13 ) 

There are many practical approximations which increase the utility of the 
above formulae. Consider a room temperature bias condition where leakage is a 
negligible component of collector current. The approximate collector current is 
easily obtained fro® (4.6): 



A. 



-■*,*£** 



{kV cc -V BB ) 



**$$. 



R«q 



Comparing with (4»13)» 

where / e is the quiescent collector current, neglecting leakage current. This 
formula shows how S may be used as a convenient figure of merit, even for dis- 
covering sensitivity to changes in /3. 

Since N* => dl c /dai, the following approximate relations hold: 



A/ = iV*Aa = S/ ^Aa, 



— 0- = per unit change in quiescent collector current = S . (4.15) 

fa . -a.- . •*' 

The percentage change in collector current equals S times the percentage change 

A further realistic simplification in the above formulae assumes that R B » 
R« q /(1 + /3). To minimize the influence of variations in j8, it is important to ad- 
just the circuit resistors so that this inequality is valid. When this is not the 
case, it is necessary to return to the more exact formulae as originally derived. 
The three sensitivity formulae simplify as follows: 

«■+*- S1+ ^L, (4>16) 






W= ^£- = - — (for /3 > 10) , (4.17) 



R s + 



R»q Rb 



1 + /8- 

N* = S 



'tVce- - -Vbb + 1 cm &*£ 


a 


R B + 3s_' 

1 + /S . 



(4.18) 



Bias Circuits and Stability 



77 



The last approximation assumes that Icbo is negligible under nominal room tem- 
perature conditions. 

PROBLEM 4.12 Refer to the circuit of Fig. 4.17. Assume I C bo = 3 /za at room 
temperature. 

(a) Calculate the current I c in R L using (4.6), after first determining the ap- 
proximate operating point from the collector characteristics and the load line. 

(b) Calculate V C e at the operating point. 

(c) Calculate S, M, and N*. 

(d) If Icbo = 3 n& at 25°C, what change occurs in I c due to the change in 
Icbo at 30° C? 

(e) If V B e changes by -2.2 mv per degree centigrade, and is 0.22 v at 25° C, 
find the change in Ic resulting from the change in Vbe if the temperature in- 
creases from 25° C to 30° C. 

(f ) If /3 is reduced to 0.9 of its nominal value, what is the corresponding 
change in l c ? 

(g) For the conditions of (c/), what is the change in I c between 25° C and 75° C? 

(Note: For parts (c-f) above, use the approximate expressions for S, M, and N*, 
which apply especially well to small changes.) 

Solution: Refer to the basic formula of (4.6) and to Fig. 4.18 which shows the 
transistor collector characteristics. The formula is repeated here: 



/3 



1 + 



(* V cc -V BE )+ Icbo (.Re + R eq ) 



[4.6] 



Rf.+ 



i + y s 

Now determine the numerical values of the parameters: 



k = 



R, 



1380 



= 0.274, 



R, + R 2 3650 + 1380 

R E =50, R E + R eq = 1050 0, 



R, + R 2 



1380 x 3650 
5030 



= 1000 fl , 



' cc 



5v, k V CC = 1-370 v. 



=3650fi 




R 2 
= 1380fi 



I CBO = 3/Ua at 25 C "=■ 



Fig. 4.17 Common-emitter ampli fier 

with voltage divider providing base 

bias voltage. 



60 



50 



40 



E 

. 30 
o 



20 



10 



1 

7 


o°c 

5°C 






^ 










u o.^^r 




, -"■""" 




_ — —• 


"""~"c 


.20tna 




1 / 






._ — — 


---" 


Q.lSjj 


va 




^f^ 












2 










1/ 


/c" 












If 




: = = 


: = =.= 


~6~025 


0. 00b ma 
"1)75 05 ma" 















V CE , volt- 



-0.025 ma 



Fig. 4.18 Common -emitter output characteristics at 25 C and 70 C 
with superimposed load line. 



78 Transistor Circuit Analysis 



(a) On Fig. 4.18, draw a load line. The resistance which determines the 
slope of the load line is the sum of R L and R E (since l c = I E ). Estimate the 
approximate voltage at point A of Fig. 4.17 as 

t/ e 1380 

V A = 5 x = 1. 37 v. 

3650 + 1380 

From Fig. 4.2, P BE = 0.22 v; therefore the voltage at point B is 1.37- 
0.22 = 1.15 v. For R E = 50 Q, I E = 1.15/50= 23 ma. This establishes the op- 
erating point at P, (Fig. 4.18) where I B = 0.125 ma (by interpolation) and 
Vce = 1.6 v, and 

23 
£dc = -j^J^ = 184 ( the d "C value h FE , not h te ). 

Having determined the approximate operating point, using (4.6), 

, 184 (1.37 - 0.22) + (3 x 10~ 6 )(1050) nn „ 

'c = — — ■ = 20.8 ma. 

185 „ 1000 
50+ 

185 

This corresponds to point P 2 where I B = 0.12 ma. 

(b) At P 2 , V CE = 1.85 v. 

(c) The sensitivity formulae are 

„ , Req 1000 

S^l+— i = i+ -— = 21, [4.16] 

K E 5U 

M= ^-=^=-0-02 ma/mv, [4. 17] 

K E 5U 

»;* SI „„ 20.8 

N = ^ = 21x o^ = a44a > [4 - 18] 

since 

«--£-. ^ = 0.9946. 
1 + B 185 

(d) At 25°C, l CBO = 3fta. From Fig. 4.1, for a germanium transistor, 1 C bo in- 
creases to 4.4 /za at 30° C. Therefore M C bo = 1.4 jia and 

A/ c =SM CBO = 21 x 1.4 = 29 fja. 

(e) Since, from 25°C to 30°C, &V BE = -11 mv, 

A/ c = _ _ A V BE = - 0.02 x A V BE = + 0.22 ma. 

K E 

(f) The effect of a small reduction in /S is easily estimated from N* deter- 
mined above: 

184 
Nominal B = 184, a = — = 0.9946, 

185 

1fi4 
Reduced B = 0.9 x 184 = 164, a = — = 0.9939, 

165 

A/ c = W*Aa = -0.0007x0.44 =-0.31 ma. 

(g) From Fig. 4.1, l CBO is 22 times greater at 70°C than at 25°C: 

A/cso = 3(22- l)=63/za, 

A l c = S A I co = 21 x 63 = 1. 32 ma. 



Bias Circuits and Stability 



79 



Note that a more accurate calculation can be obtained by using (4.6). An example 
comparing the use of the fundamental bias equation with the simple approxima- 
tion above is provided in Prob. 4.14. 



PROBLEM 4.13 Figure 4.19a shows a very general configuration of a bias cir- 
cuit, in which the collector-base feedback is incorporated for improved stability. 
Show that this circuit can be reduced in special cases to a simpler configuration 
by the following procedure: 

(a) Draw the equivalent tee-circuit for Fig. 4. 19a. 

(b) Derive an expression for Ic including leakage current. 

(c) Derive expressions for 



Output 






N* = 



dl c 

da 




(a) 



(d) Develop simple approximations to the above expressions. 

Solution: (a) Figure 4.19b shows the equivalent tee-circuit sketched in accor- 
dance with the principles previously developed in Chaps. 1 and 3. The collector 
resistance r D is assumed to be infinite. 

(b) Write the basic circuit equations for Fig. 4.19b: 



Vcc = Ie Re » Vbe +I d Ri+ Ud + Ic) Rl, 
V B e+IeRe = (!d -I B )R i , 
Ic =/3/ B + (0 4 I) Icbo. 
Ic = Ie - Ib- 
Combining (4.2) and (4.20b), solve for I B : 



/ B = 



f. 



/8+1. 



-I 



CBO- 




(4.19) 
(4.20a) Rl S P'b( \ 

[4.2] 
(4.20b) 



(4.21) 



(/3+i)/ C bo 



Substitute (4.21) into (4.20a): 

1b Re + Vbe - Id Ri = [ - — - + Icbo ) 

Now substitute (4.21) into (4.20b) and simplify: 

Ic = Ie - Ib 



(4.22) 



(b) 

Fig. 4.19 (a) Generalized bias cir- 
cuit incorporating feedback from col- 
lector to base for increased stabi- 
lity . (b) Simp li fied equivalent circuit. 



= /. 



m 



+/, 



CBO- 



(4.23) 



Then solve (4.23) for l E , and (4.22) for l D R 2 : 



Ie = dc - Icbo) 







Id R 2 = Ib Ub + -^p-) + Vbe - Icbo R t 



(4.24) 



Substitute the expression for l D from (4.24) and for l c from (4.23) into (4.19) 
to obtain an equation in terms oi Ie- 



Kcc - Vbe = Ie Re + Ie Rl 



cbo^l 






-u VBE I 

R, 



}■ 



80. 



Transistor Circuit Analysis 



Simplify by separating out terms in I E : 
Vcc-VgE + IcBoRi-^— (R l + R L ) = I E 



[-fcH^-^)] 



Solve the above expression for l E and substitute in (4.23). This leads to an ex- j 
pression for I c : : 'M 



I 



C = 'CBO J 



up 



Vcc - V BE + I cbo R, - ^ CR, + R L ) 
r e U + X^) +Rl (JL.\_±\ + J± 



/8' 



(4.25) 



Combine terms (4.25) and simplify to obtain a final general expression for l c : 

This is the required expression for l c . 

(c) By partial differentiation of (4.26), S = dI c /dl CBO is obtained: 



26) 



5 - J!° 



Similarly, 



M = 



R..±Rl+ Re (l + ^tBA 

eicso ~ Re L r, + rA ' jg^; 
\ R, I 1 + /8 

_JL_( l+ R 1 + RA 
l + P\ R> I 



(4.27) 



\ R* J 1-/9 

Remembering that a = /3/(l + /S) and 1 + /9 = 1/(1 - a), substitute in (4.26) 

a[v cc -v BE {i^ R ^- R ^ + i Ci 

«■ (l^ & ^ 56 ) + Hl + (1 - a) J? x 
Differentiating with respect to a , 



(4.28) 



R 1 + Rl+Re (l + ^^\ 



(4.29) 



N* = ^Is. 



Vcc - V BE 



fl.^L. 
\ R2 



+ I CBO Ri 



R* 1- 






R, + R L 



By comparing (4.27) and (4.30), the following simplification is obtained: 



(4.30) 



N* 



M l+ ~Kf~) +/?r ' + * i(i ~ co 

+ lcBoRi j T . 

R F (i,x-,±XL.y._ Ri , Riil _ a) 



(4.31) 



(d) Examine the expression for l c in (4.29) for the case where l CBO at room 
temperature is small compared with I c . For this condition, 



Bias Circuits and Stability 81 



a 

h = - 



/ R. -t RA 
Vcc- V BE 



1+ - l *" 

A k,_..L (4 . 32) 

« E (i + -^-^Uk l + k 1 (1-cO 

Comparing this expression with the value of N* in (4.31) for Icbo = 0> 

N*=~1^-. (4.33) 

.-""' '',■' ■'. •:■/."' '■'.•'' '■.':■■','■ " -'"-' y ■.:■'' '-'''■ ^7.V:;jJ);iS^'^ -:- 

This last expression again demonstrates that S is a good measure of quiescent 
point stability, even with respect to changes in a. 
Further approximations may be introduced: 



Substituting in the expressions for 5, M, and N , 



S? 1 t 7 ^ r (4.34) 



R «( 1+51 lf) +R - 



,W^ - , (4.35) 

R E + ^ 

1 , R i + ^ 

N **S1SL. (4.36) 

Now let us apply the above formulae to a numerical example. 

PROBLEM 4.14 Solve the circuit of Fig. 4.20, for the following quantities: 

(a) The operating point (/ c , V C e\ 

(b) The sensitivity formulae S, M, and N*. 

(c) Using the results of (b), compute lc at 70° C. Assume /3 increases 1.5 
times, Icbo goes from 3/za to 66 /za, and Vbe changes from 0.22 v to 0.12 v. 

(d) Repeat (c) using the exact bias formula. 
Use the output characteristics of Fig. 4.21. 

Solution: (a) As a first approximation, assume I L and I E are equal (a perfectly 
realistic assumption), and draw a load line on the characteristics curve of Fig. 
4.21. Assume further that I B «/ D , I D «I C > and therefore, I c = Is- Then, 

(V CC -I E R L ) * 2 =/ E K E+ 0.22. 
i?j + R 2 

Substituting numerical values, 

(5 - 100 I E ) (0.455) = 50 l E + 0.22. 

Solve for I E : 

l E = 21.5 ma = lc- 

This operating point is shown as P^ on Fig. 4.21. Note l B = 0.12 ma and 
V CE = 1.8 v. 



82 



Transistor Circuit Analysis 



d± Vr.r. =5v 



Input 






R 1 =3200Q , . 

r— ^r^V f If O Output 



J? 2 = 2670n 




R, = 100Q 



2N1308 



R E =50Q 



Fig. 4.20 Bias circuit incorporating 
collector-base feedback. 




1.8 2 3 4 

V CE , volt-*- 

Fig. 4.21 Collector characteristics with superim- 
posed load line for Prob. 4.14. 



Hence, 



/3dc = d-c current gain = 



21.5 
0.12 



179. 



This preliminary calculation has given us an approximate result, in particular, an 
approximate value for /3 DC . This value, together with the circuit parameters of 
Fig. 4.20, permit a more accurate calculation of / c . For convenience, (4.26) is 
repeated here: 



A. 



lr.= 



1+/3 



Vcc-V B e 1 + 



Ri+Ri 



R, 



+/, 



CBO 



R^Rl+Re 1 + 



Ii+RlS 
R* I. 



\ R 



R l\ +r , + ^l. 



[4.26] 



-a / 1 + /3 

The numerical values to be substituted are 

/3 = 179, R, = 3200 fl, R 2 = 2670 Q, 



50 0, 



/ 



CBO 



3 x 10' 6 a, V BE = 0.22 v, 



cc 



= 100 fl, 

= 5 v. 



Now make the substitutions: 



179 
180 



5-0.22 1 + 



/ 1+ 3300\ 
\ 2670/ 



+ (3x 10- 6 )(3200+ 100+ 112) 



112 + 100 + 



3200 
180 



= 19.7 ma. 

This gives point P 2 on Fig. 4.21. Since this is in the close vicinity of P, in an 
essentially linear region, the value of /3 may be assumed as unchanged. At P 2 , 
V CE = 2.02 v. 

(b) The sensitivity formulae are 



1 + 



*i 



(-^) 



= 1 + 



+ Rr 



3200 
112 + 100 



= 16, 



[4.34] 



Bias Circuits and Stability 



83 



M* 



-1 



R E + 



Rr 



R, 



50 + 



100 



= - 0.0105. 



[4.35] 



1 + 



3300 
2670 



From (4.33), assuming low I C bo at room temperature, 



OV c 



N*=-I Q = 



16 



19.7 x 10" 3 = 0.316. 



a ' 0.9944 
(c) By definition, A/ c = SA/ CBO + MAV BE + N*Aa. The given data is 



A/ 



CBO 



= +63xl0' 6 , AV BE = -0.lv, Act =0.0019. 



Note that at /S = 1.5 x 179 = 269, a = 0.9963. For j6 = 179. a = 0.9944. Therefore 
A a = 0.0019. Now substituting numerical values, 

A/ c = 16 x 63 x 10- 6 + (-0.0105) (-0.1)+ 0.316 x 0.0019 

= 1.01 x 10- 3 + 1.05 x 10- 3 + 0.60 x 10- 3 

= 2.66 ma. 

At room temperature, I c was 19.7 ma. At 70° C, I c = 19.7 + 2.66 = 22.4 ma. . 
(d) The collector current is 




■O Output 



Input 



-V, 



EE 



M 



lr. = 



269 
270 



•\ 2670/ 



5-0.12 1 + 



+ (66 x 10- 6 )(3200+ 100+ 112) 



112+ 100 



3200 
270 



= 22.1 x 10- 3 a 

= 22. 1 ma. 

The excellent correlation between approximate and exact results demonstrates . — VS/V — —j| ° Ue 

the validity of the approximation. *■ » 



4.6 Emitter Bias Circuit 

: The emtper Mm, <dtanjit..af Pg. 422 is -«& esfeeietly 
useful configuration that may be analyzed by straight-forward circuit methods 
as illustrated in the following examples. 

P ROBLEM 4. 15 Referring to Fig. 4.22, determine the following: I c , S, M, and N*. 
Solution: Calculate / c , using the previously developed fundamental relations: 

V EE - V BE = I B R B * l B R, - lgR B + fefii - 'c ^i> 
/c = /8/s-/3fc+0 + l)'cso, 
Veb ~ Vbe + 'c^ 



V- 

i B " v BE 




\ H/3+i)i CB o 



-v EE 



(b) 



Fig. 4.22 (o) Bias circuit using a 
separate source of emitter bias 
voltage, (b) Simplified tee- 
equivalent circuit. 



[4.2] 



-*.*• 



Rk + &i \ 



84 



Transistor Circuit Analysis 



Combining equations and solving, 

/3/ c fi, + /3 V EE - /3 V BB + QS + l)/ CBO (R £ + «,) 



(/3 + l)/ c = 



*E + *l 



The last expression may be simplified and solved for I c : 



'c- 



7; — r (^ee ~ Vbe) + Icbo (Re + Ri) 
p + 1 



R* + 



*» 



(4.37) 



1 + /3 



Equation (4.37) for the emitter bias configuration is the same as (4.6) with 
R l R 2 /(R l + R 2 ) = R and V cc [R 2 /(R t + «,)] = P„. Therefore all formulae dealing 
with the circuit of Fig. 4.16 can be applied to Fig. 4.22 as shown below: 



s = Ml.1 



R E +Ri 



dl 



CO 



.**+...: 



*» 



M 



di 



c 



1 + /9 
£+1 B 



0! 



*?■ 



BE 



Re + 



,*>. 

i + 8 



K* (1 + /3) + R, 



Vvtr — Var _ 'CBO Ri 






R B + 



1 + 



X B + Ri 



(4.38) 



(4.39) 



(4.40) 



As before, if l CBO at the quiescent point is essentially negligible , 



a 



r, =100 n« 




K 



— o 

v cc = PROBLEM 4.16 For the circuit of Fig. 4.23, calculate the values of I c and S. 

Solution: Examine the collector characteristics of Fig. 4.18. Observe that 



v ee + Vcc = 5 v is applied to R E and R L in essentially a series circuit. As 
0u, P ut previously described (Prob. 4.12), we get an estimated I c = 23 ma, and a pre- 
2N1308 liminary value of /3 of 184. More accurately, using (4.37), 

J~ (Vbb - V BE )+l CBO (R E+ R 1 ) ' i|l (1.37 - 0.22) + 3 x 10" 6 (1050) 
^ + P 185 



Rp=50fl 



EE =-1.37v 



'o = 'c 



R* + 



1 + )S 



50 + 



1000 
185 



= 20.8 ma, 



Fig. 4.23 Emitter bias circuit for From (4.38), 

Prob. 4.16. 



S = 



R E +Rl 



R* + 



1 + 



1050 
55.4 



= 19. 



The emitter bias circuit is particularly advantageous when the base is driven 
by an input transformer. Bias is, of course, adjusted by choosing V BB and R El 
while the base is essentially at ground potential with respect to d-c. With R B = 0, 
the stability factor is unity, a theoretically optimum condition: 



Bias Circuits and Stability 



85 



This leads to a desirable low value of N*. There is no particular improvement 
inltf. 



4.7 Bias Compensation 

When a particular circuit configuration is selected, it is 
possible to improve stability by using the nonlinear and temperature-sensitive 
characteristics of auxiliary diodes and transistors. Some of these compensation 
methods are now illustrated in the following examples. 

PROBLEM 4.17 For a common-emitter circuit with an n-p-n transistor, show 
how to use a diode to compensate for the effects of temperature change on V BE . 

Solution: Figure 4.24 shows a circuit using diode compensation. The current / 
is adjusted so that V D (the forward diode drop) equals V BE (thus cancelling one 
another). The values of R l and R 2 are adjusted for the required bias. 

The cancellation occurs over a wide temperature range because the diode and 
transistor junctions follow identical laws. The circuit becomes equivalent to 
that of Fig. 4.16 but with V BE = over the whole temperature range. 

PROBLEM 4.18 The circuit of Fig. 4.25 shows a method of compensating for 
the effects of temperature on l CBO . Analyze the circuit's performance. 

Solution: Leakage current l CBO flows in transistors Q 1 and Q 2 . If the tran- Fig. 
sistors are matched, the leakage currents should be equal over the temperature 
range. The lc B o drawn from the base circuit of Q t by Q 3 results in a reduction 
of /S/ CBO in the collector current of Q,. As the component of / Ci corresponding to 
leakage current is /cbo(1 + fi)> the effective collector leakage is reduced from 
(£ + 1)/ C bo t0 IcBO* thereby providing the required compensation. 



Both compensation techniques described above can be used simultaneously, 
but are not required very often. Circuits are generally designed for good bias 
stability with passive elements, and relatively complex compensation methods 
are thus avoided. It is both difficult to match transistors and to hold junctions 
at equal temperatures. Compensation with diodes and transistors is used only 
in special cases. 

4.8 Self-Heating 

Transistor parameters must correspond to actual junc- 
tion temperatures for accurate analysis of transistor performance. The junction 
temperature is the sum of ambient temperature T a plus a temperature rise re- 
sulting from power dissipation at the junction. For small-signal amplifiers, 
junction dissipation is almost entirely due to bias currents. Since I c = l B , the 
total power dissipation at the two junctions of a transistor is essentially V CB l c . 
(Situations in which this is not the case will be discussed elsewhere.) 
The junction temperature is 




4.24 Circuit with diode bias 
compensation. 



CC 




-VL 



Fig. 4.25 Method of compensation 

for the effect of temperature 

on IqbO- 



T, = T. 



:+(0,-.)'c»W 



(4.41) 



where 6, a is the thermal resistance from the junctions to the ambient environ- 
ment expressed in °C/watt. Thermal resistance fy_« is normally given on tran- 
sistor data sheets for specific recommended mountings (heat sinks) in free air. 



86 



Transistor Circuit Analysis 



The problem of including temperature rise in transistor calculations results 
from the fact that l c must be evaluated at the final junction temperature, which 
is unknown at the start of calculations. Iterative procedures are suggested, but 
are rarely warranted. 

PROBLEM 4.19 For the circuit of Fig. 4.26 at an ambient temperature of 70°C, 
calculate I c . Include the effect of junction temperature rise due to power dis- 
sipation. Assume y _ a = 200°C/w, and that /3 is independent of temperature. 

Solution: The circuit is identical to that of Fig. 4.17 in Prob. 4.12. We there- 
fore use the results of that problem as an initial approximation: 

l c at 25°C = 20.8 ma, 

A/ Ci (due to change in I CBO ) = 1.32 ma (for 70°C), 
Af = —0.02 ma/mv. 
Since we are evaluating operation at 70°C, 
Ar = 70°C-25°C = 45°C, 
&Vbe =-45x2.2 = -99mv, 

M Cl =Mt± V BE = /-0.02 —\ (-99 mv) = 2 ma. 

The increased collector current at 70°C can be estimated as 

/ C(70°c) =/ C(25°c) + A/ C! + A/ c 2 = 20.8 + 1.3 + 2 2T24 ma. 




R, = 36500 



Input O If — !► 



f? 2 =1380fl 



OF cc =5v 

R L = 100Q, 

i » 1 C O Output 



2N1308 



R E =son 



icBO = 3/*a at 25°C 

Fig. 4.26 Circuit for self-heating 
calcu lotion. 



60 



50 



40 



30 



20 



10 



1 

70°C 






■^25 


tna 










— * •""" 


^r: 


_ — •■ 


0.20 m a 




tf «'" 
f / 










3.15 ma 




4/*'"' 


SC- 










a 










y 












bma 









. _ —j 


,_ 







|^^— - 












— 















3 4 

V CE , volt- 



Fig. 4.27 Collector characteristics of the 2N1308 
transistor with superimposed load line. 



From the load line (Fig. 4.27), the operating point P t is at I c = 24 ma, V CE = 1.4 v. 
Therefore, 

T, = T a + e,_ e <J c V CE ) = 70 + 200(0.024 x 1.4) = 76.7°C. 

Since it is assumed that /3 does not vary with temperature, a value which does 
not include an I CBO component is required. This is obtained, for all practical 



Bias Circuits and Stability 



87 



purposes, from the room temperature characteristics in which l CB o is a very small 
percentage of l c . From point P 2 on the characteristic curves, 

I c = 17.5 ma, 

I B = 0.1 ma, 

= ^=175. 
Is 

Using the high temperature value of Iqboi ^cbo^ 76.7°C) = 35 x/ CB0 at25°C 
(see Fig. 4.1). Now substituting the numerical values in (4.6), 

IZi fs x — - 0.12| + (3 x 35 x 10- 6 )(50 + 1000) 

/r _ 176 ^ 5030 / = 24.3 ma. 

50 + 5.7 

This value is close enough to the previously calculated 24 ma so as not to re- 
quire an improved approximation. 



PROBLEM 4.20 In the circuit of Fig. 4.28, calculate I c at an ambient tem- 
perature of 45°C. Assume that Iqbo = 3 //a at 25°C is the specified maximum 
leakage, and fy_ a = 100°C/w. Use the characteristic curves of Figs. 4.2-3. The 
diode is adjusted for the same voltage drop as V BE at its operating point. 

Solution: As a first approximation, the voltage at A is 

V A = 5 (— ) +V D = 0.108 + V D . 
\930j 

Since V D = V BE , the voltage across R E is 

V E = V A - V BE = 0.108 + V D - V BE = 0.108, 
, V E 0.108 



R* 



= 54 ma = I c . 




-OV cc =5v 



C Primary 

d-c resistor: 111 



2N1308 



:2fl 



Fig. 4.28 Amplifier circuit with bias compensation 
for temperature variation of V BE . 



60 



50 



40 



30 



20 



10 



1 

70°C 




_,. 


p.. 


oT2Sm a 










^ -* """ 


^ *■» m 


___ — 


~~ p > . 


3.20wa 




1 ^ 
f / 


»^— '" 


■^r 





- — 


0.15 ms 




f y 
/ 

/> — 

rX 

r s 










0.10m 


a 










/ 










0.05ti 


na 












r>- — 


.r-_=-— 


=="== 


==-- 










12 3 4 5 6 

V CE , volt—*- 

Fig. 4.29 Collector characteristics of the 2N1308 
transistor with superimposed load line. 



Transistor Circuit Analysis 



Now consider junction temperature effects. Power dissipation = 0.054 V CE . 
On Fig. 4.29, draw a load line for R L + R E = 3(2. At 54 ma or point P u V CB 
= 4.84 v (V CE = V cc -R L l c - R E l E ). This gives 

Power dissipation = P, = 0.054 x 4.84 = 0.262 w, 
Junction temperature = 7) = T B + fy_ a (/ c V CE ) = 45 + (0.262 x 100) = 71°C. 

Use this estimated operating temperature for a more accurate calculation of I c 
by means of (4.6). Since V BE and the diode forward voltage drops are always 
equal, they may both be ignored with no sacrifice of accuracy. 

In the region of interest, /3 can be obtained from Fig. 4.29. It is the d-c |6, 
excluding any l CBO component, which may therefore be taken from the 25°C 
curves (as before). At point P 2 , I c = 50.5 ma, l B = 0.25 ma, = 50.5/0.25 = 202. 
From Fig. 4.1, l CBO = 1 CB0 (25°C) x 22 = 66 ^a. Substituting in (4.6), 

202 / 20 \ 

^5x^+66 xl0-(2 + 19.6) 

'c = — — = 52 ma, 

2 + 0.097 

T, = 45 + (100 x 4.84 x 52 x 10~ 3 ) = 70.2°C. 

This is close enough to the first approximation so as not to warrant an additional 
computation. 

PROBLEM 4.21 If the diode D of Fig. 4.28 is omitted and R 2 is increased to 
65fi, calculate I c at an ambient temperature T B = 45°C. Assume l CBO is negli- 
gible at room temperature. Also assume, as before, a thermal resistance of 
100°C/w junction dissipation. 

Solution: Calculate V A : 

V A = — x 5 = 0.33 v 
975 

(approximately, neglecting base current drawn from the voltage divider). 
From Fig. 4.2, V BE = 0.22; l CB0 = 3/xa (assumed negligible). Hence, 



V B = V A - V BE = 0.33 - 0.22 = 0.11 v, 
= 55 ma. 



V E 0.11 



R E *■ 

For a more accurate value of / c , using /3 = 202, from Prob. 4.20, and sub- 
stituting in (4.6), 

|| (0.33- 0.22) + 
C " 2T0l 48m "- 

Using this value of collector current, estimate the junction temperature 7}. 
Let Pj = 7 C V CE = approximate junction dissipation. 
Then, 

48 
P i = 7 c V CE = 1555" [5 ~ 3 (°- 048 )] = 0.233 w. 

Tj = T a + d^Pj = 45 + 100(0.233) = 68.3°C. 

At this high junction temperature, leakage current increases markedly, and 
must be included in a more accurate temperature estimate. From Fig. 4.1, at 
68.3°C, l CBO = 63 x 10" 6 a. From Fig. 4.2, V BE = 0.12 v. Substituting in (4.6), 



Bias Circuits and Stability 



89 



la =■ 



202 
203 



(0.33 - 0.12) + 63 x 10" 6 (2 + 60.5) 



= 93 



Therefore, 



and 



60.5 
~203~ 



VcK = 5-^ = 4.72 



1000 



7} = 45 + 100 (^-1 (4.72) = 89°C. 



93 \ 
,1000/ 

The temperature at the junction has increased sufficiently above the previous 
estimates to warrent a third approximation. 

Assume now a junction temperature of 89°C. At this temperature, 

V BE = 0.12 - (19 x 2.2 x 10" 3 ) = 0.078 v. 

(Note that V BE = 0.12 at 70°C, and changes -2.2 mv/°C.) From Fig. 4.1, l CBO 
increases one hundred fold over the value at 25°C. Again using (4.6), it is found 
that / c = 117 ma and 



"CE 



5 -0.117(3) = 4.65 v. 



Hence, 

T, = 45 + (100 x 0.117 x 4.65) = 99.5°C. 

Note that once again the previous calculation was inaccurate, and a try at a 
closer approximation is indicated. 

At 99.5°C, V BE = 0.12 - (29.5 x 2.2 x 10~ 3 ) = 0.055 v; l CBO = 180 times the 
room temperature value, or 0.540 ma, and I c = 130 ma. 

This successive approximation process could be continued until the series 
of values of / c converges, if it ever does. Because a germanium transistor can- 
not operate above a junction temperature of about 100°C, the calculations be- 
come academic; the transistor will eventually be destroyed. This process, re- 
sulting from the reduction in V BE with increasing temperature, can be avoided 
by bias compensation. 



4.9 Thermal Runaway 

There is another type of thermal destruction generally 
called thermal runaway. This is caused by a regenerative increase in I C bo. 
Increasing temperature leads to increasing l CBO with its associated increase in 
dissipation, in turn leading to further heating, and a continuation of the process. 
Leakage current / CBO increases until it is limited by the external circuit, or 
until the transistor is destroyed. This section presents an approximate analysis 
of thermal runaway. 

There are three basic equations required for the analysis of thermal runaway 
in the circuit of Fig. 4.30: 

(4.42) 
(4.43) 

Vce= V CC -I C (R E +R L ). (4.44) 

These expressions may be combined and differentiated to arrive at the thermal 
runaway condition in which the increase in I CBO due to an increase in tempera- 



r i «r. + i _./» J>: 



'C r CE> 




A/W— O v cc 



Fig. 4.30 Simplified circuit for 
analysis of thermal runaway. 



90 Transistor Circuit Analysis 

ture leads in turn to a further increase in Icbo an ^ corresponding futher in- 
crease in temperature, etc., until runaway occurs. 

PROBLEM 4.22 Using the above equations and the circuit of Fig. 4.30 as a 
starting point, establish the condition for thermal runaway. 

Solution: Combining (4.42) and (4.43), 

T,-T a + 0,_ a V CB I c . [4.41] 

Differentiating (4.41) with respect to T t , 



dT L= \dlc_ 



V + dV " I 

VcE + ~dfT Ic 



e Ha = 1. (4.45) 



Also, 



From (4.44), 



dI c = d/ c ^ dlcBO 
dT) dl CBO dT, 



^CB fD , D \ dl c ., dlcBO 



= -(R E + R L ) -fi£- x 



dT, dl C BO $ T i 



Substituting in (4.45), 



1 dl c dI rBn r„ . ,„ „o ....._ ._. dlr- dl. 



e i-a dlcBO dT) dl CBO dT) 

Simplifying, and recalling that dl c /dl CB0 = S, 

1 = s d_l^± [Vcc _ 2 J iR + R) i (4-46) 

This expression represents an equilibrium condition, wherein the increased l CBO 
and dissipation at high temperature are compared to the associated temperature 
rise for the increased l C BO' Thermal runaway occurs when either S or 6> a is 
increased, upsetting the equality of (4.46). 
Thus, the condition for stability is 

1 > dJzzo_ [Vcc _ 2Ic (Re + RDl (4i47) 



e Ha .s dT, 

PROBLEM 4.23 Remembering that l CBO for germanium approximately doubles 
for every 10°C rise in temperature, modify (4.47) by substituting an appropriate 
expression for dI CBO /dT). 

Solution: Let Icbo = leakage current at a reference operating point and tem- 
perature. Let temperature increase from Tjq to 7). Then, 

T i- T iQ 

ICBO = 'CBOQ x 2 , 

In I CB0 = In l CBOQ + [ Tl ~ Tl9 ) In 2. 

Differentiating, 

dlcBO _ 1" 2 ,_ 
Icbo ~ 10 " 



Bias Circuits and Stability 91 



or 



dlcB0 = 0.0695 l CBO ~ 0.07 l CBO . (4-48) 

dT, 

Substitute (4.48) into (4.47): 

> 0.07 I CBO [V cc - 2/ c (Re + Rz.)] • (4-49) 



This expression applies to germanium transistors. Silicon transistors almost 
never exhibit thermal runaway due to their low leakage. The values of l c and 
l CB0 must correspond to the highest design value of junction temperature. Be- 
cause of the approximate nature of the analysis, large safety factors are sug- 
gested in design to avoid thermal runaway. 

PROBLEM 4.24 (a) For the circuit of Fig. 4.28, calculate the stability factor S 
at 70°C. (b) Determine whether thermal runaway occurs at 70°C. Use the col- 
lector characteristics of Fig. 4.3. For this particular transistor, 0,_ a is 100°C/w. 
Assume that l CBO = 200 ^ia at 70°C, the poorest case condition. At 70°C, V BE = 
0.12 v, but is compensated by diode D. Thus, variation of V BE with temperature 
does not aggravate the thermal stability problem. 

Solution: (a) The stability factor is given by the expression 

R E + 



s= R t + R 2 [ 4>16 ] 

K E 



R 1+ R 2 1 + j8 
Calculations are to be carried out at 70°C. First, calculate the approximate 



emitter current: 



V A = 5 x 2 ° = 0.108 v 
20 + 910 



(since V BE = V D ). 

Therefore, the drop across the 2Q emitter resistor equals the drop across 

the R 2 = 20 Q resistor: 

r _ YE. . 0O°l = 0.054 a. 
B R E 2 

Refer to Fig. 4.31. Draw the load line, locate point P, and determine /3 in 
this region. This has been done in Prob. 4.20, in which j8 = 202, so that we will 
use this value to determine S: 

20x910 

+ 930 mc 

S = = 10.3. 

20 x 910 1 



930 203 



From (4.49), 



J_ > 0.0695 (200 x 10- 6 ) [5 - (0.108) (3)] = 65 x 10"* , 



se,_ a 

970 xlO" 6 > 65x10"*. 



S6,_ a 10.3x100 



92 



Transistor Circuit Analysis 



sn 


-- 


--70^ 

25°C 




__„. 


---> 


oSs *a 




40 


f 


--- "" 




— * 


.--■ 


0.20 »a 




in 














O.lSma 






Y'' 












a 


?n 


¥' 












m 












0.05 


na 




Is 
















































1740Q 




©V cc =20v 



OV Q 



2N929 



260 



Fig. 4.32 Evaluating V by an ap- 
proximate analysis. 



12 3 4 5 6 7 

VcE< volt— *• 

Fig. 4.31 Collector characteristics of the 2N1308 transistor with 
superimposed load line. 

This represents a stable system and thermal runaway will not occur. Again, 
due to the approximate knowledge of l CBO , d t _ a , and therefore T,, it is important 
to calculate for the worst possible conditions using ample safety factors. 

Experimentally, 7} is determined from V BB . Either the manufacturers' data 
on V BB are used, or, if greater accuracy is required, V CB vs. temperature for a 
fixed value of I E may be determined experimentally. 



4.10 Approximation Techniques 

The analytical techniques developed above provide ac- 
curate circuit solutions. However, it is important to start out with approximate ! 
operating points, so that preliminary calculations can be accomplished quickly. 
The examples below illustrate methods for rapidly approximating the operating 
point of transistor circuits. These methods are also of value in setting up bias 
conditions in the initial stages of circuit design. The following simplifications 
apply: 



2N929 




Vbb " 1 0. 



'c 



2 for germanium 
6 v for silicon ' 



a = 0.996 — 



Fig. 4.33 Evaluating Iq by an ap- 
proximate analysis. 



r e = oa > fe =* Of and r b = in the equivalent tee-circuit. 
Except where specifically called out in the problem, I CBO is neglected. 

PROBLEM 4.25 In the circuit of Fig. 4.32, find V . 

Solution: The potential at point A is (260 x 20)/(1740 + 260) * 2.6 v. For a sili- 
con transistor, V BE = 0.6 v, so that the drop across the lKfi resistor is 2 v 
Since 1 E 2T2ma £7 C , 

V = V cc - I c R L =20 - 0.002(5000) = 10 v. 

PROBLEM 4.26 Referring to Fig. 4.33, estimate I c . 
Solution: Assume I rT , n = 0: 



Bias Circuits and Stability 



93 



V EE - 0.6 = (10,000 + 2,000) I E - 10,000 I c , 
I c =CLl E = 0.996 l E , 

3.4 = 12,000 I E - 9960 I E = 2040 l B , 
3.4 



/* 



= 1.67 ma, 



2040 
l c = 1.67 x 0.996= 1.66 ma. 

PROBLEM 4.27 (a) For the circuit of Fig. 4.34a, when switch Sw is open, find 
l c and V . (b) With Sw closed, find I c and V . 

Solution: (a) With the switch Sw open, 

lc = (1 + hFE )Icbo = ( 101 ) x 10 x 10 " 6 = X ma ' 
V = 20 v - l c (1000) = 19 v. 

(b) With switch Sw closed, refer to Fig. 4.34b. At first, disregard I cbo . This 

figure shows a simplified circuit for calculation. The equations for this circuit 
are 

2.6 - 0.6 = 10,300 l B + 300 I c , I c = h FE I B . 

Substituting for l c , 

2 v = 10,300 I B + 30,000 l B = 40,300 l B , I B = 50 pa, I c = 5 ma. 
Now include an additional l c component due to l CBO . Recall that 

Mc c 




lKfi 
P-VVAr-OVcc =20v 



ov 



= 100 



/ CBO = 10x10" 



2.6 v 



(a) 



0.6 v 



M 



CBO 




lKfi 

A/s/\, o 20v 



2.6v 



Approximately A/ c = S A/ C bo- 

The stability factor must be calculated: 

R F + R B 



10,300 



R„+ Rb 



300 + 



10,000 



■S25. 



(b) 

Fig. 4.34 Transistor bias circuit 
for Prob. 4.27. 



Thus, 

Therefore, 

and 



+ 1 """ ' ioo 
I c (due to lego) & 25 x (10 x 10" 6 ) = 0.25 ma. 
l c (total) = 5 ma + 0.25 ma = 5.25 ma 
F„ = 20 -(5.25) = 14.75v. 



90Kft 



PROBLEM 4.28 For the circuit of Fig. 4.35, l CBO = 10 /xa, h FE = 100. Estimate 
/c ^ 7 . 

Solution: Initially, neglect the leakage component. Replace the resistance di- 
vider bias circuit by its Thevenin's equivalent source: 45 kO 

45 



V.„ = 30 



eq 



135 



10 V, 




R E =5KQ 



R eq = 90 K 1 1 45 KO = 30 KQ = R B . 

This bias circuit feeds the input impedance R ln of the transistor. Using the 
approximate formula (see Table 5.1), K to is easily calculated: 



Fig. 4.35 Transistor bias circuit 
for Prob. 4.28. 



94 



Transistor Circuit Analysis 




0V 



= 200 



(a) 



R e<i =R B 

~ R t +R 2 



Km = Re (1 + /8dc ) = 5000 (1 + 100) £ 500,000 fi. 
At the base, the voltage is 



Since V BE =0.6 v, 



and 



in 500,000 „ „ r 

10 v x = 9.45 v. 

530,000 

V E = 9.45 - 0.6 = 8.85 v 



/ 885 177 ~, 

' e = = 1 . 77 ma = / r . 

5000 C 



Now calculate the current component due to l CB0 by setting R^ = R B and 
using the stability factor S derived in (4.38): 



S = 



R B +R, 



30 KQ + 5 KQ 



1 + /3 



R ° +Rw ^™ + sm 



i\, ~ 



DC 



101 



The current component due to leakage is 7 x 10 = 70 fia. Thus, the total col, 
lector current is 



O V cc = and 
20v 



1.77 + 0.07 = 1.84 ma 



F o = 30-(1.84)(5) = 20.8v. 



PROBLEM 4.29 Referring to Fig. 4.36, determine the values of the resistors 
such that 7 C = 5 ma, V CE = 8 v, V E = 6 v, and S = 10. 

Solution: Use the previously discussed approximation techniques: 

Ie-Ic =5 ma.., 

V E = 6 v, 

6 



0.005 
R in = 240 Kfl 



1,200 Q, 



V BE = 0.6v 
-0-±l|— 



Using (4.38) for S = 10, 
S = 



Rr +r, 



R* + 



-Vcc Rl 



1+A, 



1200 + R B 

1200 + R ^- 
201 



= 10. 



R,+J? 2 



=R E (\+h FE )^ Solving, R B = 11,400 Q. This must equal the equivalent source resistance of R l 
and R 2 in parallel: 



(b) 

Fig. 4.36 Analysis of the transistor 
bias circuit of Prob. 4.29. 



R eq = R B = -^- = 11,400. 
R, + R 2 

Refer to the Thevenin equivalent circuit, Fig. 4.36b. Note that V A = 6.6 v to 
account for the transistor base-emitter drop. Solving for V e , 

6 



240,000 



11,400 + 6.6^0.9 v. 



Bias Circuits and Stability 



95 



Equate this to the Thevenin expression for 7 eq : 

R, x 20 



V = 2 

"eq 



= 6.9 v. 



R, + R 2 

Combine with the previously developed expression for R eq : 



6.9 R, = 20 



R l R 2 

R, + R 2 



20 (11,400) =228,800; 



hence, 



228^800 = 33j000 fl 




OV cc =-20v 



/3 DC = ioo 



Substituting and solving for R 2 , 



6.9 



R 2 ^ 17,40011, 



(a) 



0.2 v 



For V CE = 8 v, V = 6 + 8 = 14 v. The drop across R L must equal 6 v at 
5 ma, for R L = 1200 0. 

PROBLEM 4.30 For the emitter-follower of Fig. 4.37a, what value resistors are 
required for a quiescent operating (Q) point of I c =1 ma, V CE = 10 v, and S = 5? 

Solution: If V CE = 10 v, then V E = R B I E = 10 v. Since l E = 1 ma, R E = 10,000 H. 
Determine / B from (4.2): 

/„ = — t/c - Q3 D c + 1) 'cuol =7^-7^ (0005) - ° 005 ma - 




j8 D < 



100 100 



(b) 

Fig. 4.37 Calculation of quiescent 
operating point by estimation. 



Refer to Fig. 4.37b. It is necessary to determine R B = R eq , which can be 
established from the approximate expression forS: 



S = 



R P +R r 



R* + 



imQ 



£ dc + 1 

Substitute R E = 10,000, DC = 100, S = 5, and solve for R B :R B = 42,000 0. 
Referring again to Fig. 4.37b, 

V ea = 10.2 + R B l B = 10.2 + (42,000) (5 x 10~ 6 ) = 10.4 v. 



This leads to the following relationships: 

-^- = ^1 = 0.52, -*^ 

R, + R 2 20 R, + R : 

Solving, R,, = 81,000 fl and R 2 = 87,500 0. 



lMfi 



= R B = 42,000 Q. 




OV rf: =20v 



OV 

Pdc= w0 
/ C BO = 5xl0 ~ 



PROBLEM 4.31 In the circuit of Fig. 4.38a, estimate the power dissipation in 

the transistor. 

Solution: Referring to Fig. 4.38b, the equivalent bias network, it is seen that 

9.4 v 



500 Kfl 



10v 



/* = 



18.8 /xa, 



0.5 x 10 6 n 

Ic = finch + (/3 D c + 1) 1 cbo, 
l c = 1.88 + 0.50= 2.38 ma, 
y o = v cc ~ r l lc = 20 - (5000) (0.00238) = 8.1 v, 
7 CE =8.1v. 




[4.2] 



(b) 

Fig. 4.38 Estimating power 
dissipation. 



96 



Transistor Circuit Analysis 



Therefore , 



Power dissipation = l c V CE 

= 0.00238 x 8.1 = 19.2 mw. 



a = 0.99 
10Kfl-££ 

-AW 



PROBLEM 4.32 In Fig. 4.39, estimate I c . 

Solution: Since 

10-0.6 




10,000 



= 0.94 ma, 



the collector current is 



l c = 0.99 I E + l CBO = 0.93 + 0.1 = 1.03 ma. 



4.1 1 Supplementary Problems 

Fig. 4.39 Estimating collector cur- 
rent in a common-base circuit. PROBLEM 4.33 If R B = 100 in Fig. 4.10, does the current increase with 

temperature? 

PROBLEM 4.34 Determine whether the stability factor should be large or small 
for best stability. 

PROBLEM 4.35 Define the factors S, M, and N. 

PROBLEM 4.36 In the circuit of Fig. 4.17, how can a reduction of gain at audio 
frequencies due to the resistor R E be avoided? 

PROBLEM 4.37 (a) Determine the effect on S of a large resistance in the base 
lead in the circuit of Fig. 4.17. (b) What is the effect of a large resistance on 
stability? 

PROBLEM 4.38 Does temperature effect V BE ? 

PROBLEM 4.39 Determine if the static characteristics of a transistor vary 
with temperature. 

PROBLEM 4.40 If R, = 1800 11, R 2 = 680 O, R L =56Q, and R E = 68 fl in 
Fig. 4.17, find (a) S, (b) I c at 25°C and 70°C when I CBO = 1 ^a at 25°C. 

PROBLEM 4.41 Describe thermal run-away and its mechanism. 

PROBLEM 4.42 In the circuit of Fig. 4.38a, estimate the power dissipation in 
the transistor when a 5-Kfl resistor is replaced with a 10-Kfi resistor. 



SINGLE-STAGE 
AMPLIFIERS 



5 



CHAPTER 






5.1 Introduction 

The performance of the single-stage audio amplifier will 
be calculated for small-signal conditions. It is assumed that bias voltages are 
set to establish a suitable operating point, and that the parameters corresponding 
to the operating point are known or available. The equivalent circuit techniques 
developed in Chap. 3 are directly applicable. Complete calculation procedures 
are presented for each of the basic transistor configurations, and a tabular sum- 
mary of formulae is provided in Table 5.1 on p. 113. 

The problem under investigation is defined in Fig. 5.1. A single-stage ampli- 
fier is energized by a small-signal a-c generator v t with an internal resistance 
R g . The load resistance is R L . The items to be calculated are input and output 
impedances, and voltage, current, and power gains, the calculation of which leads 
to methods of achieving desired circuit performance features. 

5.2 Common-Emitter Circuit 

Figure 5.2 illustrates the common-emitter circuit adapted 
to the analysis of small a-c signals. Bias resistors are not included, since their 
effect on a-c performance is taken into account by combining them with the equiva- 
lent generator and load resistors, using conventional network theory. Also block- 
ing capacitors are ignored, since it is assumed that their impedances are negligible 
at the a-c frequencies in question. Their effect on amplifier bandwidth will be 

considered later. 

The a-c amplifier is most conveniently analyzed using the hybrid equivalent 
circuit discussed in Chap. 3. Note that for the common-emitter connection, i,- -. i b , 

PROBLEM 5.1 The A-parameter equivalent circuit of the common-emitter ampli- 
fier of Fig. 5.2 is shown in Fig. 5.3. Derive the following: 

Z„ Input impedance,* 

Z OI Output impedance,* 

A lt Current gain , 

A v , Voltage gain , 

A Power gain. 

Solution: Set up the basic equations for the circuit of Fig. 5.3: 

* Since reactances are neglected at low- and mid-frequencies, we can also speak of input and output 
resistances. 




Fig. 5.1 Single-stage amplifier con- 
nected to input generator and output 
load resistance. 



Vcc 



v,f> 




O v o 



Fig. 5.2 Simplified common-emitter 
circuit for small-signal a-c analysis. 



97 



98 



Transistor Circuit Analysis 



v e = i t R e + i, h ie *■ v„ h re , 




h u i t = - v„ h c 
Solve (5.2) for output voltage, v ■ 



R, 



Substitute this expression in (5.1) and simplify: 



v* = ', 



(«,^ l .- f t !"*; l 



Since 



from (5.4), 



v t = i, R g + v„ 



\ i + fto. Rl) 

This expression gives Z, directly: 






(b) 

Fig. 5.3 The h-parameter equivalent 

circuit for the common-emitter 

connection. 



From Ohm's law, 



(5.1) 
(5.2) 

(5.3) 
(5.4) 



(5.5) 



(5.6) 



The current gain is easily determined by substituting in (5.3) and simplifying: 




(a) 




r\y)v 



(b) 

Fig. 5.4 Determining the small- 
signal output impedance of the 
common-emitter transistor 
circuit. 



h,e 



l + A oe RL 



(5.7) 



Voltage gain is determined by combining previous results with the following 
fundamental relationship: 



-ht. 



1 ± R Lh oe R L h te ft, 

1 ""i^.,Rl; 



-h{ 9 Rl 



h te (l + h . Rl)-Rl h fe h re ' 



(5.8) 



It remains only to calculate output impedance, Z . This is done by short-cir- 
cuiting v g , and applying a voltage v across the output terminals. The current 
flow in the output circuit equals the applied voltage times the output resistance. 

Refer to Fig. 5.4. The current i is determined from the equation 



while i, is determined from 



*o = ft/« *i + v a h oe , 



v oh r »--i, (fc, e -, R e ). 



Single-Stage Amplifiers 99 



Combine these two equations, and solve for Z„ - v /i : 



Z = ^ = 1 . (5.9) 

"oe 



h le + &i 



Power gain A p is simply the product of voltage gain A v and current gain A t . 

PROBLEM 5.2 Determine Z it Z ot A Y , and A t for a common-emitter amplifier using 
the 2N929 transistor, biased so that / c = 4 ma and V C b = 12 v. Assume R L = 
5000 fi and R g = 500 Q. Use the hybrid parameters for the above circuit derived 
in Chap. 3: 

fi ie = 2200 0, 

/. re = 2xl0-\ 

ft fe = 290, 

h oe = 30 x lO -6 mhos. 

Solution: Find Z i by substituting in (5.6): 

Rl fife fire 



Z i = fife - 



1+fioeKz, 



= 2200 - (5000) (290) (2 x 10~ 4 ) 
1 + (30 x 10- 6 ) (5000) 

= 1950 O. 

This impedance is not substantially different from h ie . 
Similarly, calculate Z by substituting in (5.9): 



U hfe fire 







^ie 


+ R g 












1 








30 x 10- 6 


(290) (2 x 
2200 + 


io- 4 ) 

500 








= 118,000 fi. 






Voltage 


gain 


is given by 
4 


-fife ^L 








" v h le a+h oe R L )-RL 


fife fire 




Substitute the given values: 










A v 




290 x 5000 








2200 (1 + 30 x 10- 6 


x 5000) - (5000) (290) 


2 x 10- 4 






-290 x 5000 
2200(1.15) -290 


-647. 






Current 


gain 


from (5.7) is 












A h <° 


290 




252. 



[5.8] 



l + h oe R L 1 + 30 x 10- 6 x 5000 

PROBLEM 5.3 Describe qualitatively the effect a varying R L has on the input 
impedance of a common-emitter circuit. 



100 Transistor Circuit Analysis 

Solution: Refer to (5.6): 

7 t, Rl hfe Ke 

1 = " " iTA^Rl • t5.6] 

For R L very small (output short-circuited), 

Z,^h ie (5.10) 

For R L very large, 

Zi=hie-~^. (5.11) 

The input impedance decreases between the limits of (5.10) and (5.11) as R L in- 
creases. 

PROBLEM 5.4 For the circuit conditions of Prob. 5.2, determine Z, as R L varies 
from to oo. 

Solution: Substitute numerical values in (5.6) to determine Z; vs. R L : 

580 x 10- 4 R L 



Z, = 2200 



1 + (30 x 10- 6 ) R L 



Values have already been found in Probs. 5.2-3 for R L = and 5000 Q. Now R L 
100,000 and 1 Mfi. Then for R L = 100,000, 

nn 580 x 10- x 10- 
1 + 3 

= 2200 - 1450 = 750 fl. 
For R L = 1,000,000, 



Z t = 2200 



580 x 10-" x 10 6 



1 + 30 

= 2200 - 1870 = 330 12. 

At R L = oo, substitute in (5.11): 

7 99m 290 x 2 x 10-" ^ £r n 

Z t = 2200 _ — — __ = 265 fi . 

30 x 10 -6 

The values of input impedance vs. R L determined thus far are tabulated below: 

r l ,q Zi.Q 






2200 


5000 


1950 


100,000 


750 


1,000,000 


330 



265 

Figure 5.5 shows Z t vs. R L plotted on semi- logarithmic coordinates, since this 
method provides the most convenient presentation over the complete wide range. 
For high £ transistors, R L is rarely above 10,000 Q. Thus, for all practical pur- 
poses, Z t will not vary significantly with R L . 

PROBLEM 5.5 For the circuit conditions of Prob. 5.2, determine Z for R 6 = 
0, 500 fi, 10,000 fi, and «.. 



Single-Stage Amplifiers 



101 



2500 



2000 



1500 






1000 



500 





1 

Asymptote 
^J*at 2200 fl 












^v. 


950 fl 






























,750 fl 












Asym 


ptote^i 


,330(1 






at 261 


)fl 

1 









300,000 



250,000 



200,000 



. 150,000 



N 



— 100,000 



50,000 



10 2 10 3 10 4 



10 5 10° 

R L . ft — 



10 7 10° 10' 



— *^- 


1 1 

Asymptote 
"~ atZ = 275, 000 fl 








































\ 118,000 fl 














,39,600 


n 










u 




c 


Jt z = 


33,300 fl 

1 







Fig. 5.5 Variation of input impedance with load re- 
sistance for a common -emitter circuit. 



10° 10 1 10 2 



10 3 10 4 

R g ,fl-^ 



10 5 10° 10' 



Fig. 5.6 Variation of output impedance with generator 
resistance for a common-emitter circuit. 



Solution: Use (5.9) which was previously derived for output impedance: 

1 1 



h oe - hfe hre 30xl0- 6 - 



290 x 2 x 10~" 
2200 + R„ 



It is easy to determine Z for the extreme values of R g = and oo. At R g = 0, 

1 



30 x 10- 6 - — x 10- 
22 



= 275,000 fl. 



At R g = oo, 



Z„ = 



30 x 10- 6 



= 33,300 fl. 



Now substitute R e = 500 fl: 



30 x 10- 6 - 



580 x IP" 4 
2700 



= 118,000 fl. 



For R. = 10,000 fl, 



30 x 10- 6 - 



580 x 10" 



= 39,600 fl. 



12,200 
Tabulate the values determined thus far: 

Rg , fl Z , fl 



275,000 

500 118,000 

10,000 39,600 

33,300 



Output impedance Z vs. R g is sketched on Fig. 5.6. 



102 



Transistor Circuit Analysis 



PROBLEM 5.6 For the circuit conditions of Prob. 5.2, determine A t and A v for 
R L = 0, 100 fi, 1000 O, 10 4 O, 10 s fl, 10 6 Q, and «, . 

Solution: Substitute the hybrid parameters of Prob. 5.2 in (5.7) and (5.8): 



A i = 



1 +K*Rl 

290 
1 + 30 x 10- 6 R L ' 

-h te Rl 



fc/e (l + h oe R L )-R L h i6 h te 
-290 R L 



2200 (1 + 30 x 10- 6 R L ) - 290 x 2 x 10~ 4 R*. 
-290 R L 



2200+ 0.008 fl L 

-0.132 R L 
1 + 3.64 x 10- 6 R L ' 

The values of gain, as determined by direct numerical substitution of values of 
R L , are listed below. Although not indicated, A v is negative in all cases. 



R L ,n 



A, 






290 





100 


289 


13.2 


1000 


282 


131 


10,000 


223 


1272 


100,000 


72.5 


9670 


1,000,000 


9.36 


28,400 


oo 





36,200 



For the normally used values of R L (under around 10,000 0), current gain is 
relatively constant, while voltage gain is about proportional to R L . The change 
in voltage gain is largely due to the changing impedance of R L for a constant 
input current. The circuit is best described as a current amplifier, rather than 
a tallage amplifier. 

If a resistance R s is added to the emitter circuit (see Fig. 5. 7a), input im- 
pedance is increased substantially, but the resistor is not by-passed. This cir- 
cuit is most conveniently studied using the tee-equivalent circuit of Fig. 5.7b. 




1 + /3 



" 1 + /S 
A^V — • — — VW- 






'L Vn 



(a) 



(b) 



Fig. 5.7 (a) Common-emitter circuit with feedback resistor in the 
emitter circuit, (b) Tee-equivalent circuit of (a). 



Fig. 5.8 Common-emitter circuit with total re- 
sistance r E in the emitter circuit. The usual 
parallel current source in the collector circuit 
is replaced by a series voltage source to sim- 
plify calculations. [See Fig. 5.7(b).] 



Single-Stage Amplifiers 



103 



PROBLEM 5.7 A resistor R E is inserted in the emitter circuit of the common- 
emitter amplifier analyzed in the previous problems. Calculate, for this modified 
common-emitter circuit, the following performance parameters: 

Z,, Input impedance , 
Z ot Output impedance, 

A t , Current gain, 

A v , Voltage gain. 

Solution: The tee-equivalent circuit is shown in Figs. 5.7b and 5.8. In Fig. 5.8, 
set r% = «" a + Rb, and replace the parallel current source in the collector circuit of 
Fig. 5.7b with a more convenient series voltage source. The use of the tee-equiva- 
lent circuit provides convenient formulae in terms of tee-parameters, which are 
then available for other applications. 

The basic circuit equations applicable to Fig. 5.8 are 



v e = (Rg + r b + r E ) i, + t% i ol 
01 r c i, = t% »i + [Rl + . ° + t% ) 



Rearranging these equations and letting 1/(1 + /3) = 1 - <X , 
v e = (Rg + r b + r|) »i + te »o' 
= (r E - a r c ) i, + [R L + r e (1 - <X) + r* E ] i . 
Solving these equations for i, and i , using determinants, 



(5.12) 
(5.13) 



'< = A 



1 



* 
r E 



[R, +r q (l-a) + r*J 



v. [R L + r c (1 - a) + r B ] 

: — _» .. ___ , t ; 

A 



{R a + r b +r B ) 
r| - a r c 



- v a (fl - CX r e ) 



where 



A = determinant of system 



R g + r b + T E 



* 

tE 



t e -<Xt c R l + r c (1 - a) + r E 



- (Rg - r b - r* E ) \R l • r. : (1 - a) . rll - t% (r* - -»r c ). (5.14) 



Current gain is immediately determined from the ratio of i to i t : 



A -° 

A, = — : 



- (r| - «r e ) 



a r c - rs 



(5.15) 



», " Rl + f c (! + a) + rl R L + r c (1 - a) + r| 

This last expression can be simplified, recalling that r d = r c /(l + /S) = r c (l-ot) 
is much greater than r E . Thus, 



A,= 



1-a 



Rl + i i + *l 

r c C 1 - a) r d 



(5.16) 



To find the input impedance Z,, for the moment substitute v t for v e and let 
/?, = in (5.12). Then solve for /',, using (5.14) for the system determinant A: 



v, [R L + r c (1 - a) + r* E ] 



104 



Transistor Circuit Analysis 



V( (r b + r E ) [Rl + r c (1 - a) +■ t E \ - r E (r E -Of c ) 



= r b + r E - 



Rl + r c (1 - a). 
r| (r| - a r c ) 



— r - 

+ f E 



= 


* 

Tb + TE 


= 


* 
*b + IE 


= 


fb + *"E 




. 



Rl + r e (1 - a) r r| 
! _ rl - a r c 




Rl + r c (1 - a) + rl 

Rl + r c - a r c t- te - 'e 


+ a r c 



R L + r e (1 - a) + r| 
7?l + r e 



«l +r c (l-a)+rS. 
, . Rl 



1 + ^ L + f E 



(5.17a) 



(5.17b) 



Since R L + t * E « r c (1 - a), and 1/(1 - a) = 1 + /3 

Z,=r b + r| (1 + Pi. 
It is now easy to find voltage gain, A v : 



(5.18) 



A. = . 



-»o ^L . Rl_ 

■ v, i t Z, ' Z, 

Substitute (5.15) and (5.17) for A { and Z„ respectively: 



A r 



OC r c - te 



r l + r c (1 - a) + te 







-Rl 




* 

+ TE 


Rl + r c 


l b 


Rl + r c (l-a)+r|. 



-(ar c -r|)ft L 

r b [Rl tr c (l-a)+ r|l (- r| (/?/. + r,) 



re 



H) 



r. -* 



r E L 



(1 - a) 



(W 



(5.19a) 



In terms of the appropriate equivalent tee-parameters, 





Rl 

TE 


r /s 


* 1 
te 




A 


J3+1 r„Q3+l}J 






r b f 1 
rl [P - 1 + 


1"E I" R t 


+ 1 + 


«£, 




r d (j8 + 1) 


'- Q3 + 1) 



(5.19b) 



Using the usual approximations in (5.19), 

K = -*±. (5.19c) 

The error in this approximation is estimated in Prob. 5.8. 

The last formula to be derived is an expression for output impedance. Set up 
the original equations (5.12) and (5.13) with v g = 0, and R L replaced by a voltage 
v B applied to the output terminals: 

= (R* + r b f r|) i, + T % i , (5.20) 



Single-Stage Amplifiers 



105 



v = (r| - a r c ) i , + [r c (1 - a) + f|] i c 
Solve (5.20) for i,i 

. !j *> — i «— j- 

«$ + ft + t e 
Substitute (5.22) in (5.21), and solve for Z a • v /i : 



(5.21) 



(5.22) 



Fot r|/r d « 1, 



'"o ^a + 'b + «"b 



Aj + fb + TB 



**** 



1-+4*. 



# 



: 1 + R < t r " 



*• - «"*: 



P 



l + R£ + *b 



r* J 



(5.23) 



PROBLEM 5.8 Check the approximate formula (5.19c) against the exact formula 
(5.19a) for the voltage gain of the common-emitter amplifier with resistance R E 
in the emitter circuit. Use the 2N929 transistor at the previously defined operat- 
ing point, with the following parameters: 

r e =6.60, 

r b = 260 Q, 

r d = 34.5 kfi, 

j8 = 290 for Rt . = 5000 fi, 

r| = ioo n, 

a = 0.9966 , 

r c = 10 7 . 

Solution: In the exact formula, -R L /r* E is multiplied by the following factor: 

100 



Bias 
current 



v cc 



0.966 - 



5000 



10 7 



. 5000 260 

1 +^T+777 



10 7 



5100\ 



0.986. 



+ 100 \291 + 10 7 / 



The approximate formula, A v = -R^/r E , is inaccurate by only 1.4%. Thus, an 
unby-passed emitter resistor provides excellent stabilization of voltage gain. This 
is a special type of feedback which will be described in more detail in Chap. 8. 

PROBLEM 5.9 Calculate Z„ Z ot A v , and A, for the circuit of Fig. 5.9. Assume 
that bias is set so that l c = 4 ma and V C e = 12 v, corresponding to the operating 
point of the previous problem. 

Solution: For the operating point of this circuit, the 2N929 transistor has the 
following tee-parameters: 




Ht- 




R L = 5000fl 
O Output 



2N929 



R E = 93.30 



Fig. 5.9 Single-stage transistor am- 
plifier with an emitter resistor for 
stabi lization. 



106 Transistor Circuit Analysis 

r e = 6.6 fl , 
R E = 93.4 Q , 

r c = 10 meg, 

r b = 260 fi , 

a= 0.9966, 

j8 = 290. 

These parameters are substituted directly in the appropriate formulae to calculate 
the required performance characteristics: 

-Rl 



1 r E + R L 



* 



rb \r~-^~ ]+rB 



-5000 



260 ( J_ + ±^±) + 100 
\29C *"" ' 



5100 \ 
,290 ' 10 7 ) 



-49. 



This is just 2% less than the approximate value of /? L /r| = 50. 
Calculate input impedance: 



1 Rl + r E 



= 260 + 100 (291) 1 + 5x 10 " 4 = 25,660 0. 
1 5100 

+ 3.45 x 10 4 

Note that the significant component of input impedance is the r% (1 + /S) term, 
which in itself gives a fair approximation. Compare the input impedance with the 
much lower value of 1950 O in Prob. 5.2 for the same circuit, but with R E = 0. 
Now determine output impedance: 

/3 



1 | R 6 + r b 



34,500 /1 + _?*L\ = 1.2 MO. 

1 + Z^ 
100/ 



It remains only to calculate current gain: 

A P 

I , Rl + r E 



+ 



i?°_.251. 
5100 

34,500 



Single-Stage Amplifiers 107 

PROBLEM 5.10 By comparing the results of calculations on the circuits of Fig. 
5.9 (Prob. 5.8) and Fig. 5.2 (Prob. 5.2) differing only in the presence of R E in 
Fig. 5.9, comment on the effect of R E on the principal amplifier characteristics. 

Solution: The amplifier characteristics are summarized in the following tabulation: 





Fig. 5.2 


Fig. 5.9 


z, 


1950 n 


25,660 Q 


Zo 


118,000 Q 


1.2xl0 6 S2 


A, 


252 


251 


A v 


-647 


-49 



The addition of R E increases the input impedance to nearly te (jS + 1). re- 
duces voltage gain to about Rl/te, and increases output impedance substantially. 
Current gain is essentially unchanged. The performance of the amplifier is sta- 
bilized since voltage gain becomes nearly independent of /3. 

5.3 Common-Base Circuit 

The performance parameters of the common-base circuit, 
namely input and output impedances, and current and voltage gains, are derived in 
a similar manner to the derivation of the common-emitter parameters of the pre- 
ceding section. Using the hybrid equivalent circuit, Figs. 5.1 and 5.3 apply ex- 
actly, except that the subscript b (common-base) is used instead of the subscript e 
(common-emitter). 

PROBLEM 5.11 Derive formulas for Z,, Z , A,, and A v for the common-base am- 
plifier circuit. 

Solution: Modifying the previously derived common-emitter equations (5.6), (5.9;. 
(5.7), and (5.8) where the subscript b is used instead of e. 



I O 



h lb (1 + h b Rl) - Rl t*tb hrb 

PROBLEM 5. 12 A 2N929 transistor is operated in the common-base configuration 
at a bias point where V CB = 12 v and / c = 4 ma. For R 6 = 10 Q and R L = 5 KQ, 
calculate (a) Z„ (b) Z OI (c) A v , and (d) A,. The /i-parameters for this operating 
point have already been derived in Chap. 3: 

h ib = 7.57 SI, 

h fb = 0.27 x 10-\ 

h lb = -0.996, 

h ob = 0.103 x 10 -6 mhos. 



10° 



10= 



10" 



10' 



10" 



10 



Zi.il- 



108 



Transistor Circuit Analysis 









/ ^ 


1 




0*/ 




~V^=9.7Mfi 

as R L = oo 






C-E 


as 


267 n 

R L =<*> 




3 












1 iv 

*L = '</ 
= 33.3KQ 




















— 




C-B 




= 267fl 
as Rl = oo 

1 



Solution: (a) To determine input impedance, substitute the above parameters 
in (5.24): 



z i = h ib - 



h ob + =- 



7.57 + 0-996x0.27x10- = 7J Q 
2 x 10- 4 + 0.001 x 10- 4 



(b) Similarly, calculate Z by substituting in (5.25): 
1 1 



Z„ = 



htb A, 



10" 

io 5 

10 4 
10 3 
10 2 
10 



1 10 10 2 10 3 10 4 10 s 

r l , n-*> 

\a)Zj vs. load resistance 

z„,n— *■ 



c£* 








= r c = 9.7MQ 


= r d as 
Rg =0 

1 








S? S 


= r d = ^ 


3.3 K$2 

i = <*> — 






















C-B 




«*^ 3 


= 'd = 
3.3 KQ 


= h/b as 
R t =0 






as 


R« = » 



A ob - ""> "* ntw..^, (0.996) (0.27 X 10- 4 ) 
An, + K fi 7.57 + 10 

= 614,000 0. 

(c) Substituting in (5.27), 

A v = 639 (voltage gain). 

(d) Substituting in (5.26), 

At = -0.996 (current gain). 

PROBLEM 5.13 For the 2N929 transistor of Prob. 5.12 with the same operating 
point and parameters, calculate and plot Z, as R L varies from to oo. 

Solution: Use (5.24): 



z i = A/6 - 



A/b h rb 



,b + 



The general nature of the input impedance variation is self-evident from this 
equation. Letting R L = 0, 1/R L becomes infinite, so that the second term in (5.24) 
vanishes, and 



10 



10* 



10' 



10 



1 1Q 10 2 10 3 10" 10 s 

(b) Z vs.R g 

a A v , Aj- 



io- 



10 ' 









4 V = 36,000 V 
as Rl = °°^^ 




C-E an 


i C-C 
















d 




as 1 


Ay =0 

asR L = 



/ C-B 




/ 
as 


1,=0 

R L = •»■ 


# 


c 



















Similarly, when /?£, 



and when 1/R^ = /, 6 , 



Z i = Aib- 

Zy = h, b - 



A/b A rb 



•^i = Ayb - 



A/b A ffc 
2h nh 



1 10 10 2 10 3 10 4 10 5 

(c) /4i and A v vs. Rj, 

Fig. 5.10 Typical performance char- 
acteristics of single-stage audio 
amplifier. 



This last impedance value is the average of the values for R L = and R L = «.. 
The R L = and R L = <x conditions define asymptotes, which make it an easy mat- 
ter to sketch curves showing how Z t varies with R L . 

Substituting numerical values of the common-base A-parameters , 

Z = 7.57 + 0-996 (0.27 x 10~ 4 ) 
1.03 x 10- 7 + JL 

Figure 5.10 shows a plot on logarithmic coordinates of Z t vs. R L . Note that R L 
has minor influence on Z it until it exceeds about 100 Kfi. Since such high values 
are usually not practical, Z f s h lb is a constant value in this common-base con- 
nection. For the tee-equivalent circuit, Z, = r e + r b (1 - a). 

PROBLEM 5.14 For the common-base connection and the operating point of Prob. 
5.12, determine the variation of Z vs. R t . 



Single-stage Amplifiers 109 



Solution: Use the common-base A-parameters of Prob. 5.12: 



Zo = - . [5.25] 



K b 



h ib + Rg 



As an aid to plotting, determine the limiting values where R e = and R g = 

1 



At R e = 



Z„ = 



htb h rt 



h "lb "rb 

"ob - 



*« 



AtR g = 



00, 



^ 



ob 



Substitute numerical values: 
Z„ = 



0.103x 10- _/ -0.996 x 0.27x10- 



7.57 + R e 

and Z is plotted vs. R 6 on Fig. 5.10. (Note that at R g = oo, Z = r c of the tee- 
equivalent circuit.) 

Although Z varies sharply with R e in the useful region where R e is of the 
same order as h lb , Z generally is not critical in circuit calculations. Thus the 
variation shown typically in Fig. 5.10 is not too troublesome. 

PROBLEM 5.15 For the common-base connection and the operating point of 
Prob. 5.12, determine the variations in A v and A, vs. R L . 

Solution: Use the same common-base h-parameters of Prob. 5.12: 



A l = ilJb 



A r 



hi 

1 + h ob Rl 

-0.996 
1 + 1.03 x 10- 7 R L ' 

-htb 

— — + h ib h ob - h tb h rb 



0.996 



— + 7.57 (1.03 x 10- 7 ) + 0.996 (0.27 x lO" 4 ) 

R L 

Current and voltage gains are plotted in Fig. 5.10. Note that current gain is 
almost independent of R L . Voltage gain, on the other hand, is very much a func- 
tion of load, as might be expected. 



5.4 Common-Collector Circuit 
(Emitter-Follower) 

Proceeding as in the previous section, formulae for the 
common-collector single-stage amplifier configuration (emitter-follower) are de- 
rived simply by applying suitable subscripts to the hybrid parameters. 



110 Transistor Circuit Analysis 



PROBLEM 5.16 Using the methods of Prob. 5.11, develop formulas for Z ol Z„ 
A,, and A r for the common-collector configuration. 

Solution: It is only necessary to change the subscripts of the A-parameters as 
indicated below: 

(5.28) 



(5.29) 



(5.30) 



z, 


= 


fl le 




Jtfur 
I 


z 






■■i- 






K* 


»f. 


Kt 






?\ 


+ R e 


A 






A# e 





1 + Kc Rl 



A r = - zh°*i . (5.31) 

"(e (1 + Aoe Rl.) - Rl ft/e A, c 



PROBLEM 5.17 Using the A-parameter formulae for the common-collector con- 
nection, determine Z, as a function of R L . Use the same operating point as in 
Prob. 5.12, and the corresponding numerical value of the A-parameters developed 
in Chap. 3: 

A )c = 2200 Q, 

A rc = 0.9999, 

A, c = -291, 

A oc = 30 x 10 -6 mhos. 

Solution: Substituting the given values in (5.28), 



Z, = 2200- ( - 291)(0 -" 99 > . 



30 x 10- 6 + — 
Rl 

Note that the asymptotes for R L = and R L = oo described in Prob. 5.13 apply 
here, and are important plotting aids. 
At R L = 0, 

Z, = 2200 = A ic . 

At R L = oo, 

Z - 22 ° + 3bW= 9 - 7Mn - 

Substituting additional values for R L and calculating Z lt the required variation of 
Z { with R L is derived (see Fig. 5.10). 

For the practical range of R L , the expression for Z t may be simplified: 

Z t = h le - h tc R L . 

In terms of other familiar units, 

Z,sh„ + (fi+l)R L , 

since h ic = h le and h tc = - (1 + ft). 



Single-Stage Amplifiers 111 

Input impedance obviously depends almost directly on R L in the useful range 
of operation. From the tee-equivalent circuit, Z t = h ic - h tc /h oc and Z, = r c as 
R L = «,. Therefore, r c constitutes a theoretical upper limit to input impedance. 

PROBLEM 5.18 Proceeding as in Prob. 5.17, and using the same operating point 
and equivalent h-parameters, determine Z as a function of R t . 

Solution: The applicable formula is 



*.«r 



A,« + R t 



Substituting numerical values and locating the R e = ~ asymptote, Z is conven- 
iently plotted in Fig. 5.10. A good practical approximation to Z is 

•r _ Rg + *ic . 

Z can never exceed r d of the tee-equivalent circuit and depends strongly on R a 
in the normal range of application. 

PROBLEM 5.19 Proceeding as in Prob. 5.17, and using the same operating point 
and equivalent A- parameters, determine A v as a function of Rl- 

Solution: The applicable formula is 

A r = -h, c RL ^ [5-31] 

h lc (1 + h oc Rl) - Rl h tc h rc 

Rewrite this expression: 

Since h re is the major term of the denominator, its more accurate value is required : 



(see Fig. 3.26c). Substituting, 

A 


1 




n v - 




h lc 
htcRL 



Using the /i-parameters for the common-collector circuit, and h re = 2 x 10~\ 
A 1 1 

V " 1 - 2 x 10- + (3 ° * 10 " 6) (2200) + -g°°- 1.00002 + Z^I' 

291 291 R L R l 

Observe that for R L » h le /h te = h ib , A Y si. As a matter of fact, the gain is 
very nearly unity over a wide and practical range of values of R L . It is therefore 
convenient to calculate the percent deviation from unity for values of gain ap- 

Percent deviation - (1 - A r ) x 100. 



112 



Transistor Circuit Analysis 



Percent deviation from unity is plotted in Pig. 5.11 as R^ varies from to ». Note- 
that when R L exceeds 100 /j Jtr , the deviation is less than 1%. This uniformity of 
gain of the common-collector or emitter-follower circuit is of great practical value. 
More will be said of this later. 

PROBLEM 5.20 Proceeding as in Prob. 5.17, and using the same operating point 
and equivalent /i-parameters, determine A, asa function of Rl,. 

Solution: The applicable formula is 



A, 



ifc 



l + fc oc /f L 



Substituting numerical values, 



i/c 



-291 



1 + Aoc Rl 1 + 30 x 10- 6 R L 
Figure 5.12 shows A t vs. R L , as required. 



[5.30] 



10.0 




0.001 



















250 
200 
150 
100 


















































50 

n 































10° 10 1 10 2 10 3 10 4 10 s 10 6 

R L ,Q.— +■ 

Fig. 5.12 Variation of Aj with R^ in common- 
collector amplifier. 



10' 



Fig. 5. 1 1 Deviation from unity of voltage gain of 
common-collector amplifier with load resistorR^. 



As a convenience in carrying out analyses similar to the ones in this chapter, 
Table 5.1 summarizes the formulae for the performance factors of the single-stage 
audio amplifier. 



Single-Stage Amplifiers 



113 



Table 5.1 Single-Stage Amplifier Formulae 



A-parameters 

(Second subscript 
omitted) 



Common- base 
tee-equivalent 

circuit 
(see Fig. 2.31) 



Common-emitter 
tee-equivalent 

circuit 

(see Fig. 2.31) 

Note: rj = r. + R B ; 

R B = circuit resistance 

in emitter 



Common-collector 
tee-equivalent 

circuit 
(see Fig. 2.31) 



*,-■? 



V 






a*i.+(i-o)I» 



r . + '(> (l-«) + r t 



Rr. + f» 



= r. + r 6 (l-a), 

1* « R *£ « 1 
<•« r <f 



li 



r t + r;(l + /3) 



r,(l + /3) 
1 + «£±£S 



ST 6+ r:(l + /3), 
R L + r; « r„ 



<■» + - 



(R;.+r.)(<3 + l) 
(R!.+r.)(/3+l) 



2rr b + (R I .+r.)(/3 + l), 
r c »(R L +r.)(/3 + 1) 



K- 


h,h, 

h, + R t 






ar c + 


rt 


- 'b " 


1 + r ' + 


R, 



r, r<j 



r« ^ R,+ r b 
rl - 

j + RgJ_Tb 






'.+ ^ 



1 



1+/3 1; R, + r t 



r„(l + /3) 
R t + r b 

up ' 






l + A R t 



<-i. + Rl 



't + Ri. 



«1 



>-t 



1 + 



r « 
/3 



<•: « r rf 



(1+0)- 



r. + Ri 



= 1 + /3, 

% + Rt « 'd 



A T = Z± 



Rl*i 



fti 



-(•-^): 



(«*?)' 



«R L rt + R L <<c 1 

r c + r 6 (l-a + ^)' " 



/3 + 1 r/(/3 + 1) 



r„(/3+l) r;(l + ) 8)V r„ / 

~ Rl 



rl«r dl j3»l, Ri«fd 



1 + 



H-H)*^ 



"('•-i^k l *Tf 



r t « 'c 



5.5 High-Frequency Performance 

In this section, we will consider the behavior of the 
transistor at high frequencies, at which point transistor parameters become com- 
plex. In the border-line region where frequency effects just begin to appear, it is 
sufficient to use a complex forward current gain. For a useful representation sat- 
isfactory over a very wide frequency range, the hybrid-n- circuit is easily the most 
convenient. 

Consider the ft-parameter common-base equivalent circuit with complex forward 
current gain. Let h tbo be the low-frequency value of h tb . The following approxi- 
mate relationship based on intrinsic solid-state properties of the transistor holds 
at intermediate frequencies'. 

ft /bo 



h tb = 



(5.32) 



1 + 



h 



lb 



in which t htb is the a (or h, b ) cut-off frequency where the absolute value of cur- 
rent gain declines to 0.707 of its low-frequency value. 

Now determine the complex forward current gain for the common-emitter con- 
figuration: 



h le = 



-h 
1 + h 



tb 



(5.33) 



tb 



114 



Transistor Circuit Analysis 



BO 




O C 



Fig. 5.13 Single common -emi tter 
circuit. 



Substituting the complex expression for h lb in (5.33) and simplifying, 



'/bo 



A, 8 = 



l + /i 



/bo 



1 + 



■jt 



(5.34) 



{ hfb (1 + h fbo ) 



If we let f htb (1 + h, bo ) = //,/e , the frequency where h te (or /S) is down to 0.707 of 
its low-frequency value (the /3 cut-off frequency), then 



h tB = 



Af.c 



(5.35) 



l+j 



'*■ 



/a 




Fig. 5.14 Hybrid-77 equivalent cir- 
cui t for common-emi tter connection. 



where h, eo is the low-frequency value of h t9 . 

The cut-off frequencies give a reasonably good idea where frequency effects 
start to become important. However, they are only a very approximate indication 
of a transistor's high-frequency capability. From (5.34), we see that the common- 
emitter configuration has a bandwidth smaller by a factor of 1 + h tbo than the 
common-base configuration. (Recall that h tbo is negative and nearly unity, so 
that 1 + h !bo is a very small number.) 

5.6 Hybrid-7T Circuit 

The hybrid-77 circuit is superior to other high-frequency 
equivalent circuits, in that its parameters are relatively independent of frequency 
over a very wide range. Furthermore, we can measure all parameters directly at 
high frequencies. 

Figure 5.13 is the simple common-emitter circuit, represented for small signals 
by the hybrid-77 model of Fig. 5.14. The low-frequency conversion formulae from 
A-parameters are given by Table 3.1, with r b6 » arbitrarily chosen. Table 5.2 pre- 
sents a concise procedure for direct measurement of the hybrid-77 parameters. 

We now proceed to applications of the hybrid-?? model, calculating input im- 
pedance Z„ current gain A„ and voltage gain A v for given load conditions. Al- 
though the derived results are general, only a few simple cases will be investigated 
numerically, because of the extreme complexity of the computations. 



C b 'r. 




; 1 






h 





B' 


z s 












c ] 
















JL 


zl-+- 


Z P 




z'l 








— I 


1 — 








( 


>— 


I 



\ )6 m V b ' 



(b) 

Fig. 5.15 (a) Hybrid-77 equivalent circuit set-up for calculating input impedance, (b) Substitution of complex 

impedances. 



Refer to Fig. 5.15a, and the somewhat simplified representation of Fig. 5.15b. 
For convenience, we replace the resistance-capacitance combinations with com- 
plex impedances. The base-spreading resistance r 6b / is initially neglected. The 
current source is replaced by a more familiar equivalent voltage source in Fig. 
5.16a. The mesh equations are* 



♦Note that in the remainder of this Chapter, rms values are used rather than instantaneous values. 



Single-Stage Amplifiers 



115 



v b , m = z p /, - Z p I 2 = Z p (/, - / 2 ), 

&* JV. Zl = - Zp h + &p + z . J z ^ f, - g m z p zi. a, - ij. 

z. 







'l t 








z. 


'i t 


- 


1 






A 










An 


v b ;2 


•iH 


v b 


'. 




Z P 




|+ 




»— 




zL 






— 1 


1 — 




t 













, i+fi»z 


L f* 


— - 
































Z P 




zL 




z't—- 


1+Sn.Zi. 


o 


— 1»— 













z. 



B r "' 


b' 


l+SmZ L , 


y w . 






_^y 6e VVe 

"zT 




Zp 

— 1 1 — 


zi 



(a) (b) 

Rearranging the second equation, 

- - Z p [1 + *„ Z£] / t + [Z p (1 + i„ Zl) + (Z£ + Z,)] /,. 
Dividing the above equation by 1 + g m Z£, the set of equations becomes 

V, - V*' 
0— Z,/, 



«V. 



^ + ^)' 



(5.36) 
(5.37) 



g m V b > e = 10- 1 x 10- 2 = 10- 
Th e currents may be summed at the node: 



a 



1 ma. 



/ 2 + / c 



•6 m V b 



(c) 



Vc 
A 



B r bb' 

o — VA — f 



c b '.; 



Figure 5.16b shows the equivalent circuit representation of these equations. The 
validity of the equivalent circuit may be demonstrated by writing its mesh equa- 
tions and comparing with those derived above. 

An obvious extension of Fig. 5.16b, in which r bb i is added to give an exact 
value of Z t without dependent sources, is shown in Fig. 5.16c. In Fig. 5.16d, 
the generalized complex impedances are separated into resistive and capacitive 
components. The real number A is introduced to simplify calculations. This cir- 
cuit can be used to compute Vb'* and /,, which are required to determine perform- 
ance characteristics of the amplifier stage* To determine l c and V c » , use the out- 
put circuit of Fig. 5.17b. which is derived from Fig. 5.15a. 

PROBLEM 5.21 Referring to the output circuit of Fig. 5.17b, where 

7 2 = ;10- 4 a, 
V b ; = 10- 2 v, 
r ce =10 5 O, 
Z L = 5 x 10 5 Q, 
g m = 0.1 mho, 
calculate / c and V ce . 
Solution: Establish the current source: 



He 



real number 
(d) 



1 T em ~ , 



Fig. 5.16 (a) Replacing the current 
source of Fig. 5.15(b) by an equiv- 
alent voltage source, (b) Further 
simplification of input impedance 
circuit with only passive elements. 

(c) Extension of (b) to include r bb >. 

(d) Circuit of (c) in which complex 
impedances are replaced by resis- 
tance-capacitance equivalents. 



CO 



EO 




6m*Ve( I 



(a) 



CO- 



6 m Vf 



m * o e < 



t) t: 



EO- 



where the current through r ce has the direction shown in Fig. 5.17b. Since l c = 
-V ce /R L ' v ce is the only unknown in the above expression. Substituting numeri- 
cal values and solving, 



V ce =-4.76(1- 0.1;) v, 



I fee 



4.8 v. 



(b) 

Fig. 5.17 (a) Output portion of 

hybrid-TT equivalent circuit. 

(b) Expansion of (a). 



116 



Transistor Circuit Analysis 



TABLE 5.2 Direct measurement of Hybrid-77 parameters. (Refer to the hybrid-ff equivalent circuit of Fig. 5.14.) 



1. Refer to Fig. (a). Capacitors C, and C 2 are effective short-circuits to a-c test signals. Set 
Rj_ and Rg for the desired operating (Q) point. The value of Rg ~S> Zj, so that bias current 
to the base is essentially constant. With the short-circuit from the collector to the emitter 
(due to C 2 ), C b ' e and C b ' c are essentially in parallel with r b ' e . Apply a sufficiently high 
frequency (say 5 times f b ( e ) from base to emitter, so that B is effectively short-circuited to 
ground. Measure /,- and v be to determine r bb '. More accurately, we can measure the resistive 
component of Z,- with a suitable impedance bridge. (Note that since r b ' c ^> r b ' e , there is 
negligible error in neglecting t b > c at the frequency in question.) 

2. Compute the remaining low -frequency hybrid-'"' parameters from the previously derived formulae: 

h ie - T bb' 




*TsC 3 



Ve 



1 



= h 



Ie — r bb' 



r bb' 



h oe 



u 1 + ftfeo -ftfe 
- n re — 

"ie - rbb' 



r\j 



"oe • 



[3.61] 
[3.60] 
[3.63] 
[3. 56] 




h ie -rbb 1 

The circuit of Fig. (b) is used for measuring C b ' c . The emitter impedance is sufficiently 

large so as to present an essentially open emitter to a-c. Resistance R L is high enough 

so as not to shunt the collector-base capacitance too heavily. Using a capacitance 

bridge between points B and C, measure C ob , the output capacity for the common-base 

configuration with emitter open. The measurement is to be made at a frequency such that 

the reactance of C b ' c is much greater than r bb < and much less than r b ' c . In performing in 

the capacitance measurement, note that the dissipation factor is small, confirming that the test frequency has been 

properly selected. Output capacity C ob , thus measured, approximately equals C b < c . 

The measurement outlined here establishes the value of C ob = C b ' c , plus lead capacities, and the so-called overlap- 
diode capacity, which is the capacity between electrodes outside the active transistor region. These must be sub- 
tracted from the measured capacitance. Unfortunately, an accurate determination of C b ' c is not easy. Conveniently, 
however, C ob is usually specified by the manufacturer for high-frequency transistors. 

To measure C b ' e , refer to Fig. (c). Capacitance C is a short-circuit at the 
test frequency. Resistance R is a small resistor, chosen to measure current 
i c by its drop v R = i c R. The value Rg » hj e , so that i b is essentially a con- 
stant base current, i b = Vg/Rg. Since R is a very small resistance value, 
v ce = 0, so that from the point of view of input impedance, C b ' c is effectively 
in parallel with C b > e . Also r b ' c 3> r b > e . 

For these conditions, the hybrid-^ circuit corresponding to Fig. (c) is ap- 
proximately as shown in Fig. (d). The following expressions apply to the 
circuit of this figure,* 



Vr 



RUmVb'e, 



= R6n 



R 6 Ve + h/i*>(C b > e + C b ' c )] 




6m v b'e 



By measuring Vr at low frequency, say 1000 cps, and at the much higher frequency where V^has dropped to 0.707 
of V R at low frequency, we determine t b i e where 

V-= * • 



Thus, since C b ' c 



2n-'h/e(<V e + C b ' c ) 
is known from the preceding step, 
1 



C b ' e + C b ' c =• 



2"fhWb'e 



<V 



2^fht B r b 'e 



C b > 



Manufacturer specification sheets usually give l h f e . Sometimes the transistor manufacturer gives ir~ h teoihte< a 
gain bandwidth product. In this instance, the a cut-off frequency is 



{ T = flfeo l hfe = (\ + n feo> { hte = l h 



fb- 



* Note the use of rms vectors rather than instantaneous values in the following equations. 



Single-Stage Amplifiers 



117 



Solving for l c = -V ce /R L , 

I c = 0.95 x 10-' (1 - 0.1;) a; |/ c | = 0.96 ma. 



To complete the representation of the hybrid-;? by separate passive input and 
output circuits, we now derive an equivalent output circuit containing no depend- 
ent sources. Figure 5.18a shows the output circuit with the input terminated in a 
generator impedance, Z a . For convenience, complex impedances are used to rep- 
resent capacitor-resistor combinations. Impedances Z' p and Z' are defined on the 
figure. Referring to the simplified configuration of Fig. 5.18b, the circuit equa- 
tions are 



Combining, 

Solving for \ v 

Since V ea = - /, (Z. + Zp, 






2' Eel -4(2. + gp z* + z' m 

Adding r ce , we derive the simple form for the output circuit of Fig. 5.18c. 



(5.38) 



<W B < 



I — W^ — •■ 



VI 



&mV b >J | 




4 



(a) 



b' 




z s 


'i t 


Ji_ 


C 








v 

— i 


I 














4 


AntV.M J 


ce 










1 


» 


i 



,i _ Obb'+ z g) z p 

'" 'bb'+Zg + Zp 



l + 6mZp 



(b) 



T 



z a 



l+g m Zr 



-oc 



-OE 



(c) 



Fig. 5.18 (a) Hybrid-77 equivalent output circuit, (b) Simplified equivalent of (a), 
(c) Final simplified representation. 

PROBLEM 5.22 Develop the input impedance network representation of the com- 
mon-emitter amplifier circuit of Fig. 5.19. 

Solution: The model of Fig. 5.16d is applicable and will be used for the solution 
to this problem. Direct substitution is all that is required: 



118 



Transistor Circuit Analysis 



= 20mv 




R g =2KQ, /u^\ 



Transistor hybrid-TV parameters 

r bb ' = 100 fi 
g m = 0.138 mho 

r b ' c = 10 7 fi 

r b ' e = 2100fi 
r ce = 435Kfi 



C,'„ 



5/t/tf 



C b i e = 250/t/tf 

Fig. 5.19 Common-emitter circuit 

with parameters corresponding to 

Prob. 5.22. 



A = 1 + g n 



Rl r c 



R L + T ce 

Substituting numerical values from Fig. 5.19, A = 685. Continuing, 

Z L 5000 



685 



= 7.3 n, 



435,000 
685 



= 635 n, 



***-=—= 14,600 Q, 
A 685 



ACy c = 685x5 = 3425ft /if. 



These calculated results are shown on the hybrid-n- circuit of Fig. 5.20. Sev- 
eral interesting results are evident. The 7.3 fi effective resistance from collector 
to base is so low that it acts as an effective short-circuit. Point C is therefore 
substantially at ground potential. Thus, as far as input impedance is concerned, 
AC b f e is in parallel with C b ' e . This multiplication of capacitance, leading to a 
comparatively very large capacitance in shunt across the input, is known as the 
Miller effect. It is an example of the effective amplification of an impedance in 
an active network. Although r b > c is also "transformed", it is relatively so large 
that its effect is usually ignored. 



= 2Kfi 



= ioo £2 



v 6 
= 20mv 




V h i 



^=14.6Kfl 
A 



AC h i 



i(r 



h'c 



= 3425 /i/tf 



C b ' e 

= 250///tf 



'^- e = 635fi 

' A 



> A 
= 7.3 Jl 



Fig. 5.20 Hybrid-77 equivalent input circuit corresponding to the 
configuration of Fig. 5.19. 




PROBLEM 5.23 For the amplifier circuit of Fig. 5.19, determine the frequenc, 
where voltage gain falls to 0.707 of its low-frequency value. 



Ri ^kd Solution: The circuit of Fig. 5.20, developed in the preceding problem, still ap- 
plies. Simplify as shown in Fig. 5.21 and calculate V b ' e : 



R,= 



r b'e r b'c/ A 



18350 



R, 



r b'e + r b ' c /A 
Ri = R 6 + r bb ' = 2100fi 
c » = c h' e + A Cb'c = 3675^/j.f 

Fig. 5.21 Simplified form of the in- 
put ci rcui t of Fi g. 5.20. 



JaCJ 



R 1 + - 



'b'e 



JCO C, 



^1 



R,+ 



■V* = 



R, 



jco c t 



R 2 (1 + ; co C,/?,) + R t 



R l + 



jco C, 



(5.39) 



Single-Stage Amplifiers 



119 



Now calculate I 2 , assuming that the collector is essentially at ground potential, 
and that r b ' c » l/(;'a)C b ' c ) in the significant frequency range. Thus, directly from 
Fig. 5.20, 

V b ' e 



h = 



1 



(5.40) 



," eu C b > c A 



Referring to Fig. 5.17b, with V b < e and I 2 known from (5.39) and (5.40), and recog- 
nizing that r c e » Z L , 



4m Vb'e =h+h 



(5.41) 



Substituting numerical values, V b ' e and I 2 are calculated, from which l c is directly 
obtained: 



1835 



1835 + 2100 (1 + jco 6.75 x lO" 6 ) 



V t , 



I t =jco 3425 x 10- 12 V b > e . 



Substituting in (5.41) and simplifying, 

253 (1-0.0248 j <o x 10~ 6 ) 
c " 3935 (1 + 0.362 j co x 10" 6 ) * ' 

The frequency of interest, where the output falls to 0.707 of its low-frequency 
value, coincides with the 0.707 point of l c . This frequency is where the phase 
shift is approximately 45°. For simplicity, and because it is justified by the 
general accuracy of this type of calculation, we neglect the imaginary term in the 
numerator of the above expression for /«. . The required frequency occurs where 



corresponding to 



0.362 wxl0-*= 1, 



/ = 440 K Hz. 



v C c 




Fig. 5.22 Common-emitter amplifier 
circuit applicable to Prob. 5.23. 



Z„ -j 2 x10 s 
A ,690 

Z' L j 5000 



(at co = 10 6 ) = - ; 2 x 10 s , 
= - 290 fl, 



,690 



= 7.2 Q. 



O VNAr- 



PROBLEM 5.24 Calculate the input impedance Z { for the amplifier circuit of 
Fig. 5.22 at co = 10 6 radian/sec. Neglect r ce and t b ' c . 

Solution: Use the model of Fig. 5.16. Now, 

A=l + g m ZL = l + g m Z L . 
Since Z L = j <y L, 

A=l+g m QcoL). 
Substituting numerical values, 

A = 1 + (0.138) (y 5 x 10- 3 x 10 6 ) = j 690, 
1 



=2iooQ! 



— = -290Q 
A 

— vw, — 



c b > e 

= 250/i/if 



(a) 



100 fi 

O Wr 



-327 Q« 



A 
= 7.2J2 



(b) 



Cfc'e 

- = 250^1 

i'b'e 

= j4000fi 

at W = 10 6 



Fig. 5.23 (a) Equivalent input im- 
_,, . , , . , T-i- r r>-> m pedance circuit corresponding to 

The equivalent circuit representing input impedance is shown in Fig. 5.23. The the amp |jfj ero f Fig 5.22. (b) Sim- 
series resistances may be added and combined with t b ' e for an equivalent shunt plified equivalent of (a). 



120 Transistor Circuit Analysis 

resistance of - 327 ft. Input impedance is then readily calculated as 

Z, = ~ 3980-/32.5. 

The input impedance is negative, which occasionally occurs when amplified im- 
pedance is reflected back to the primary. For this condition, the amplifier will 
behave as an oscillator. 



5.7 Supplementary Problems 

PROBLEM 5.25 If h„ = 3001), h oe = 10- 5 ft, h re = 10~ 4 ft, and h ie = 2000ft in 
the common-emitter circuit of Fig. 5.2, calculate (a) Z, and Z Q for R L = R g = 
10,000 ft, (b) the current and voltage gain for R L = R e = 10,000 ft, and (c) the 
value of R L which yields the maximum power gain. 

PROBLEM 5.26 Determine the effect of a change in R L on the input impedance 
Z j for a common-emitter circuit. 

PROBLEM 5.27 Calculate the common-emitter tee-equivalent circuit for the 
transistor of Prob. 5.25. 

PROBLEM 5.28 Find the effect on the tee-equivalent resistor of Prob. 5.27 
when a resistor R E is added in series to the emitter. 

PROBLEM 5.29 A resistor R = 100 ft is added in series to the common-emitter 
circuit of Prob. 5.2. Calculate (a) Z it Z o! and the current and voltage gains when 
R l = Rg = 10, 000 ft, and (b) the value of R that yields the maximum power 
gain. 

PROBLEM 5.30 Discuss the advantages and disadvantages of the tee-equivalent 
circuit. 

PROBLEM 5.31 Derive the formulae for Z it Z o! A,, and A v for the common- 
emitter circuit using (a) A-parameters and (b) tee-parameters. 

PROBLEM 5.32 Why is the common-collector circuit useful? What are its main 
characteristics? 

PROBLEM 5.33 Define /3 cut-off frequency. 

PROBLEM 5.34 Find the gain change from to 1 MHz when a transistor with a 
/3 of 300 and a /3 cut-off of 10 MHz is used (a) in a common-emitter configuration 
and (b) in a common-base configuration. 

PROBLEM 5.35 In the circuit of Fig. 5.22, use a transistor whose hybrid-77 
parameters are given in Fig. 5.19. (a) Calculate the input impedance and volt- 
age gain without neglecting r ce and iv c . (b) Compare the results of part (a) to 
those of Prob. 5.24. 



MULTI-STAGE 
AMPLIFIERS 



6 

CHAPTER 



6.1 Introduction 

The techniques developed in previous chapters, particu- 
larly Chap. 5, may be applied to the analysis of multi-stage amplifiers. There 
are two basic analytical approaches: 

1. We can replace each transistor by its equivalent circuit or model, and 
analyze the resulting multi-mesh network. 

2. Or we can apply the formulae developed in Chap. 5 to each stage in turn, 
and account for the interaction between stages by using suitable input and 
output resistances. The effects of coupling networks can also be included 
in this approach. 

The first of these methods is extremely tedious, except in the simplest of cases, 
and is generally useful only for elementary multi-stage circuits with two or three 
transistors. The second method, on the other hand, is practical and easy to apply 
to all configurations. 

Consider, for example, the block diagram of a multi-stage circuit in Fig. 6. 1. 
For each stage, the output impedance of the preceding stage is its input or driv- 
ing impedance, while the input impedance of the succeeding stage is its output 
or load impedance. 



Stage 
1 




Coupling 

network 

1 




Stage 
2 




Coupling 

network 

2 




Stage 
3 




Coupling 

network 

3 













Fig. 6.1 Block diagram representation of a multi-stage amplifier. 

By means of the formulae of Chap. 5, the input impedance Z t of a stage can 
be calculated if the load impedance is known. As load impedance is generally 
specified only at the output stage, it is customary to start here. The input im- 
pedance obtained then becomes the load impedance of the preceding stage, and 
so forth. 

Similarly, the output impedance Z of a stage depends on its driving im- 
pedance. As driving impedance is generally specified only at the input stage, 
calculations start here. In turn its output impedance becomes the driving im- 
pedance of the succeeding stage, and so forth. 

PROBLEM 6.1 For the two-stage amplifier of Fig. 6.2, calculate the small- 
signal a-c quantities R it R ol and A v . Use the parameters for the 2N930 transis- 
tor given in Tables 6.1-2 and Appendix A. 

Solution: Figure 6.2 shows an emitter-follower stage feeding an output emitter- 
follower stage. Our first step is to estimate the bias voltages. 



121 



122 



Transistor Circuit Analysis 







-°v cc 

= 20v 



2N930 



'fli 




-»v„ 



■R„ 



TT 



Rj, R = input, output resistance, respectively, 
of two-stage amplifier 
^i'i> "o! = input, output resistance, respectively, 

of first stage 
Rt 2 , R 0l = input, output resistance, respectively, 
of second stage 
C= coupling capacitor, assumed infinite 
R L = 2500(1 
R g = 2000 ft 





Table 6.1 Type 


Mo. 2N930. 




Electrical 








Parameters 


l c = 13/ia 


/ c = 4 ma 


Unit 


bib 


2100 


17 


ohm 


Kb* 


0.045 x 10" 6 


0.056 x 10' 6 


mho 


K e * 


200 


370 




Kb* 


1.5 x 10" 4 


2.3 x lO" 4 




u ** 
"Ic 


420,000 


6300 


ohm 


U ** 


9x10^ 


20.8 x 10" 6 


mho 


h tc 


-201 


-371 




U ** 
h rc 


1 


1 





* Published data 
** Derived data using conversion formulae of Chap. 3 



R,= 1.78Mft 
R 2 = 2.27 Mft 

Fig. 6.2 Two-stage direct-coupled emitter-follower 
amplifier. 

Table 6.2 Type No. 2N930. 



Electrical 


/c = 


1 ma 


'c = 


2 ma 


h- 


= ■3 ma 




Parameters 


25° C 


100° C 


25° C 


100° C 


25°C 


100° C 


Unit 


h ie 


320 


460 


340 


480 


360 


500 




Kb 


30 


36 


20 


24 


16 


20 


ohm 


Kb 


0.076 x 10' 6 


0.086 x lO" 6 


0.11 x 10" 6 


0.13 x 10" 6 


0.15 x 10"' 


0.18 x 10" 6 


mho 


Kb 


1.8 x 10" 4 


2.5 x 10' 4 


2.0 x 10" 4 


2.8 xlO" 4 


2.2 x 10" 4 


3.0 x lO" 4 




r c = l/h ob 


13.2 x 10 6 


11.6 x IP 


9.1 x 10 6 


7.7 x 10 6 


6.7 x 10 6 


5.57 x 10 6 


ohm 


h ic =KbQ- + Af.) 


9630 


16,650 


6820 


11,600 


5780 


10,000 


ohm 


A oc = A ob (l + h le ) 


24.4 x 10" 6 


39.6 x lO" 6 


37.4 x 10" 6 


62.5 x lO" 6 


54 x 10" 6 


90.5 x 10" 6 


mho 


Ke =/i ib /i ob (l +h {e )-h rb 


5.5 x 10" 4 


11.7 x lO' 4 


5.5x10^ 


12.2 x 10" 4 


6.4 x 10" 4 


15 x 10" 4 




T b = K-e ~ T e (l+h le ) 


2230 


2750 


1710 


2450 


1330 


1500 


ohm 


r e = h re /h oe 


23 

1 


30 


15 


19 


12 


17 


ohm 



To determine the d-c bias at the base of the first transistor, point A, apply 
Thevenin's theorem to the voltage divider consisting of /?, and R 2 . The equiva- 
lent source voltage and resistance are 



V - R i V cc 



R e q 



R t + R 2 



2.27 x 20 
1.78 + 2.27 

1.78 x 2.27 



11.2v, 



1MQ. 



R t + R 2 1.78 + 2.27 

If base current is neglected, the potential at point A is 11.2 v. 

Between point A and the output V , there are two base-emitter drops in 
series. These are approximately 0.6 v each for silicon transistors at room tern- 



Multi-Stage Amplifiers 123 



perature. Thus the potential at R L becomes 11.2 - 2(0.6) = 10 v. For R L = 
2500 fi, the d-c bias current is 10/2500 = 4 ma. 

From Appendix A, h FE at 4 ma is 300. The base current I Bi is 

, 4 x 1Q- 3 

l B , = = 13.3 ua. 

1 300 

Base current l B is, of course, the emitter current I E of the first transistor. For 
this current, h FE is approximately 150, so that 

13.3 x 10" 6 „ - „„ 

This base current (previously assumed negligible) somewhat reduces the po- 
tential at point A. Since the Thevenin equivalent source impedance at A was 
calculated to be 1 Mil, the additional drop due to I Bl is about 0.09 v. The po- 
tential at A is more accurately 11.2 - 0.09 = 11.11 v. 

Again referring to Appendix A for base emitter drop, and assuming collector 
and emitter currents to be essentially equal, 

V BEl ~0.5v at / Cl = 13 pa, 

V BE2 = 0.61 v at I Cl = 4 ma, 
so that 

V Ei = 11.11-0.5-0.61 = 10 v. 

The first estimate of V E = 10 v is valid, so the above calculations need not 
be repeated. 

What we have accomplished thus far is a necessary first step in all amplifier 
calculations, namely, the establishment of d-c operating (quiescent) levels. We 
now have to determine from the transistor curves the small-signal fi-parameters 
corresponding to these levels. For the present problem, these parameters may be 
obtained from Table 6. 1. 

Now we calculate input impedance R; 2 of the second stage, which is easy 
since the load impedance R L is given: 

Ri, = &ic- hlch " • [5-28] 

Substituting numerical values from Table 6.1 and Fig. 6.2: 

R, = 6300 (-&V0-) = sge 300 Q , 

20.8 x 10~ 6 + 0.4 x 10~ 3 

which becomes the load impedance of the first stage, thus making it possible to 
calculate its input impedance: 

R. = 420,000 ( ~ 2 ° 1)(1) = 20 MO . 

~ .— 1 



9 x 10 -6 + 



886,300 



This is the basic a-c input resistance of the first stage. It is shunted by the 
bias resistors, R l and R 2 , which constitute an equivalent 1 MH shunt. The net 
input resistance of the first stage is 

Ri= ^p Mil =950,000 11. 

Now calculate A v , the gain from point A to R L . We obtain this by calculating 
separately the first and second stage gains, A Vl and A Vj , and multiplying: 



124 Transistor Circuit Analysis 

A v = A Vl X A v ^. 

Again, using the formulae from Chap. 5 (after some simplification), 

1 1 



1+5" 1+ 2100 



= 0.9976, [5.31] 



R L 886,300 

A V2 = L— = 0.993, 

2500 

A r = A Vl x A Vi = 0.9976 x 0.993 = 0.9906. 

This figure is modified by the loading effect of R, on the generator source im- 
pedance R g . The loss in gain is 2000/950,000 = 0.00210. Including this attenua- 
tion component, the overall gain becomes 0.9885. 

To calculate the output impedance, proceed from the input to the output: 

*»!= TIT- [5 - 29] 

Substituting numerical values applicable to the first stage, 

R Ql = = 2060 0. 

9 x 10~ 6 + ?2I 

0.42 xl0 6 + 2000 

The output resistance of the first stage R 0i becomes the equivalent source im- 
pedance for the second stage: 

*o 2 = — = 24.8 Q. 

21 x 10" 6 + _ 

6.3 x 10 3 + 2.06x 10 3 

This is a very useful amplifier circuit, with an input impedance of about 
1MO, and a 25 output impedance. Voltage gain is approximately 1.2% less 
than unity, making this two-stage device well suited for good isolation of source 
and load. 



6.2 Capacitor Coupling 

In previous chapters, coupling methods were essentially 
ignored. Coupling and by-pass capacitors were assumed to be infinite, thereby 
providing zero impedance to a-c signals. In actual practice, however, coupling 
and by-pass capacitors introduce limits to the low-frequency amplifier response. 
These limits are now considered. 

Refer to Fig. 6.3, which shows a two-stage common-emitter amplifier using 
both capacitors for interstage coupling (C, and C 2 ), and by-pass capacitors (C E 
and C Ej ). The coupling or blocking capacitors prevent undesired d-c coupling 
between the bias circuits of the separate stages. The by-pass capacitors allow 
separate adjustment of d-c and a-c circuit parameters. As an introduction to the 
design characteristics of coupling circuits, it will be assumed in Fig. 6.3 that 
all capacitors, except the interstage coupling capacitor C„ are infinite. 

PROBLEM 6.2 In Fig. 6.3, with C El , C Ej , and C, infinite, analyze the effect 
of C, on the low-frequency response of the amplifier. 



Multi-Stage Amplifiers 



125 



■OVr 




VAO[f\j 




z„ c 2 

01 v A 



l(-t" 



Fig. 6.4 Equivalent circuit for in- 
terstage coupling of amplifier 
stages of Fig. 6.3. 



Fig. 6.3 Two-stage amplifier with coupling capacitors. 



Solution: First calculate the output impedance Z 0l of the first stage, and then 
obtain the input impedance Z« a of the second stage. With this information, the 
effect of a finite C, is easily found using simple circuit theory. The values of 
Z„ and Zj are readily determined by the formulae of Chap. 5, following exactly 
the procedures set forth. In Fig. 6.3, Z is the output impedance seen at point 
A , and Z t is the input impedance at point B. 

The equivalent circuit based on the above impedances is shown in Fig. 6.4. 
The following relationships are evident: 



V B 


= 






z>> 




v AO 


z, 


2 + 


z 0l + 


1 

jcoC 2 










Ztja 


c 2 



(Z, 1 + Z 0l )iaC 2 +l 
Since Z l% and Z are resistive, let Z, a = R l} and Z 0l = R 0l . The time constant 



is 



r 2 = (K,- a + K 0l )C 2 



(6.1) 



Letting <u 2 



T, 



'B _ 



V AO 



R h + R 0l oj a 

1 + ; — 



This expression points up the effect of frequency variation in a particularly con- 
venient manner. At a « o) 2 (low frequency), 



V a 



O «2 \ R I 2 + R oJ 



Recalling that w 2 = l.'[(R, 2 + R 0l )C 2 ], 



"ao 



126 



Transistor Circuit Analysis 



At the intermediate frequency where <u = <y, , 

Vao i + ; 

At higher frequencies, co » (o t , 



*>> 



2 R, a + R 0l 



Z45° 



Vao 



Asymptotes 




&) 2 (corner frequency) 

Fig. 6.5 Gain characteristic of in- 
terstage coupling network plotted 
very conveniently on log-log 
coordinates. 



R lt + R 0l 

The higher frequency characteristic corresponds to the condition where the re- 
actance of C a is negligible. 

Figure 6.5 shows the frequency characteristic on conventional logarithmic 
coordinates. This universal curve is applicable to any coupling circuit of the 
configuration considered here. The corner frequency corresponds to <u a in the 
above problem. 

The above analytical techniques are equally applicable in considering the 
effects of C„ assuming C 2 infinite. In place of R 0i and R ti , we use R e and R t , 
respectively. The voltage V 6 becomes attenuated and shifted in phase at the 
base of Q l in Fig. 6.3. The effect of C, would be plotted as in Fig. 6.5. 

However, there is a secondary effect, since a finite C, (acting like part of 
R e ) must introduce a complex component into Z 0l , the complex output impedance 
of the first stage. This complex component must affect the behavior of the inter- 
stage coupling network, and, in effect, it propagates through the entire circuit. 
This inconvenient feature is unfortunately common in transistor circuits. An 
exact analysis of the low-frequency response of such circuits becomes extremely 
tedious. Thus, notwithstanding inaccuracies at frequencies in the vicinity of 
and lower than the corner frequency, it is most practical to consider the effects 
of each coupling capacitor separately, and add the separate attenuations and 
phase shifts as though each were independent. In the higher frequency regions 
(w » &>,) where the amplifier is normally used and phase angles are small, the 
approximation approach is very satisfactory. The exact alternative, which is ex- 
tremely tedious, must be used if greater accuracy at very low frequencies is 
essential. 

PROBLEM 6.3 Refer to Fig. 6.3 and assume the following circuit parameters: 
R tl in parallel with R l2 = 1 MO, h le = 2200 0, 
Rt = lKQ, A/ e =290, 

C Bi'C Bi = C^oc, ft,e = 2xl0 -4 , 

r l, = R Ll = 5 K(2, h oe = 30 x 10" 6 mhos. 

What is the value of C 2 if gain is to be 3 db down at co = 500 radians/sec? 

Solution: Calculate R, t and R 0l , using the formulae from Table 5.1: 



R,-h lm - h " h » =2200 29 °( 2 * 10 ~ 4 > 

1 30 x 10 -6 + 200 x 10" 



1950 fi . 



hoe + r L 



Now find R n 



S-t- 



h oe - b " b " 3Q xl0 -«_ (290)2x10 
fi, e + R 8 2200 + 1000 



- = 84,400 0. 



Multi-Stage Amplifiers 127 



This is in parallel with R Ll = 5 KQ, so that 

, = 5x84.4 g47Kfl 
1 5 + 84.4 

Now examine the universal curve (Fig. 6.5), noting that the gain is down by 
3 db at the corner frequency where co = co 2 . The expression for co 2 is 

1 [6.1] 



C 2 (R, 2 + R 0l ) 
Substituting numerical values and solving for C 2 , 

1 
o> 2 ( R i 2 + RoJ 
1 



C 2 = 



-v. 



-VW, o 



500(1950 + 4700) 

= 0.3/itf. 

This is a typical coupling capacitor value in a common-emitter circuit. If R Ej 
were not by-passed, R, a would be larger and C 2 smaller, but this also results in 
a loss of gain. 

PROBLEM 6.4 For the circuit of Fig. 6.6, find C 2 , such that the low-frequency 
3 db attenuation point is located at co = 500 radians/sec. Use the transistor 
parameters given in Fig. 6.6. 

Solution- Refer to Table 5.1 for the formula for input impedance of a common- 

, . ... h ib = 7.57fl - 

base circuit: h fb =-0.996 

D h hfbhrb h. = 0.103 X 10" 6 mho 

R, = Aib -• h ° r b b = 27 x 10 - 4 

ob+ R~ 

t> Fig. 6.6 Common -base transistor 

circuit fed with a constant cur- 

Substituting numerical values, rent emjner bias 

0.996x0.27 x 10" 




R ,„, U.WQXU.Z/X w = 7>70 Qi 

,_ 0.103 xl0- 6 + 200 xlO" 6 



1 

Since co, = , 

7.70 C 2 

C 2 = = 260 iii. 

2 500 x 7.70 

The low input impedance of the common-base circuit leads to an inconveniently 
high value of input coupling capacitor. 

PROBLEM 6.5 Referring to Prob. 6.3, determine C 2 for a 3 db low-frequency 
attenuation at co = 500 radians /sec, omitting by-pass capacitor, C Ej . Use the 
tee-equivalent circuit with the following parameters: 

= 290, R Ll =R L2 = 5KO, 

r e = 6.67fi, Rj|Ria = Kail|K M = 1Mil > 

r c =9.7MSi, R e = lKQ, 

f b = 26011, R Ea = 1KQ. 

Solution: Again use Table 5.1 to determine R h : 



-*28 Transistor Circuit Analysis 



1 + 



Rl 



*i a = r b + tf(l +J 8) rd(1+ ^. 

l + 5t±£? 

Substituting numerical values, 

R, 2 =-265KQ, 

which in parallel with the equivalent bias network resistance of 1 MQ leads to a 
net Rj = 209 KO. From Prob. 6.3, 

/?o\ = 4.7KQ. 
Therefore , 

500 [6.1] 



C 2 (209,000 + 4700) 
C 2 =- 0.0094 ni. 



With R E2 unby-passed, C 2 is conveniently small. However the second-stage gain 
is considerably reduced. 

PROBLEM 6.6 Refer to the two-stage common-emitter amplifier of Fig. 6.7. 
Calculate C 2 so that low-frequency gain is 3 db down at co = 500 radians/sec." 
Also calculate the voltage gain from point A to V . Use approximate methods 
where applicable in order to simplify calculations. 

Solution: The starting point is the calculation of R 0l and R h . We may make 
some simple approximations without significant loss of accuracy. Generally, for 
R L - 5KO, 

Ri 2 ~r b + (r e + R E )(l + /S). 
Estimate the value of r e from the d-c emitter current, l Ej . The bias at point 
B is estimated by considering R t and R 2 as components of a voltage divider 
across V cc : 

Bias at B = — ^— V cc = -JP_ x 25 = 5 v. 
R t + R 2 80 + 20 

(This neglects base current in Q 2 .) Assuming a 0.6 v base-to-emitter voltage 
drop in Q 2 <a value characteristic of silicon transistors at room temperature), 

Ve 2 = 5- 0.6= 4.4 v. 
Emitter current is readily found: 



From (1.11), 



/ 4.4 

Ie 2 = TTtz ~ 2.9 ma. 

500 + 1000 



°-° 26 = 26*9 0. 



Ir 2.9 



This value may indeed be neglected when added in series with the unby- 
passed component of emitter resistance R E2g . Also, r 6 is a negligible portion 
of R^. Hence, 

R> 2 = R E2a (1 + ft = (500) (101) = 50,500 . 

For the output impedance of the first stage, it is usually safe to ignore the 
output impedance of the transistor entirely and let R = R L = 5KO • 



Multi-Stage Amplifiers 



129 




© V r 



0V 



V cc =25v R B = 680KQ 

C 1 = C Bl = <*> R g = lKQ 

C 2 (to be determined) Re 1 = 1.5 Kfl 

j8 1 = /3 2 = 100 R E2a =500Q 



R, =20Kfi 



r'l^Rl^SKQ 



Fig. 6.7 Two-stage common-emitter amplifier with emitter bias 
resistors only partially by-passed. 




5Kfl 

AAAr 



Hf 



50.5KQ 

-vs* — i 



^JVxo 



Fig. 6.8 Simplified Thevenin's equivalent 

of interstage coupling circuit. 

(See Fig. 6.7.) 



The interstage equivalent circuit takes the form shown in Fig. 6.8. Note 
that resistor R p represents the bias resistors /?! and R 2 in parallel: 



Rp= 20x80 K = 16Kfl 
P 100 



This must be added in parallel with R l% : 

16 x 50.5 „ 
66.5 



12 KQ. 



To find the 3 db point on the low-frequency gain characteristic, 

1 



C 2 = 



C,(12,000 + 5000) 
1 



500, 



17,000 x 500 



= 0.12 /if. 



Returning to Fig. 6.7, the next step is to calculate the voltage gain from 
point A to V . The gain from the base of Q 2 to V is given approximately as 



5000 



= 10. 



[3.52] 



R E 500 

(Note that if the second stage emitter by-pass capacitor were not "infinite" at 
this frequency, the input impedance would be complex, and even approximate 
calculations would be difficult.) _ 

At the corner frequency co 2 , the network attenuation is v2/2 = 0.707, so that 
voltage gain from A to V is 0.707 x 10 = 7, at a leading phase angle of 45°. 



PROBLEM 6.7 For the two-stage common-emitter amplifier of Fig. 6.7, let 
C 2 = oo and C Ej = 5 fii. All other parameters are as in Prob. 6.6. Calculate 



130 



Transistor Circuit Analysis 




= 50Kfi 



Rs 2fc (i+/3) 

= 100Kll 



Fig. 6.9 Equivalent emitter ci rcuit 
impedance. (See Prob. 6.7.) 



voltage gain from point A to V as a function of frequency. Specifically, calcu- 
late gain for a = 300 rad/sec, &> = 0, and a> = °°. Plot on logarithmic coordinates 
so that the frequency response shows the characteristic low- and high-frequency 
asymptotes. Use approximation methods where possible to simplify calculations. 

Solution: As before, the problem must be set up in terms of the output im- 
pedance of the first stage, and the input impedance of the second stage. The 
output impedance is approximately equal to R Li = 5KI2, as in the previous prob- 
lem. The input impedance to the second stage is approximately equal to the 
emitter impedance multiplied by /3 + 1 (see Table 5.1). The equivalent input im- 
pedance is represented in Fig. 6.9, where the relatively small emitter resistance 
is neglected. 

Figure 6. 10 shows the circuit of the interstage coupling elements. Resist- 
ance R p is the equivalent parallel resistance of the two bias resistors. This 
circuit allows the calculation of base current I bl in Q 2 , from which collector 
current and gain may be calculated. 

Calculate the impedances of Fig. 6.10, and simplify. The emitter impedance 
of Q 2 is 



(l+£) 



This simplifies to 




+ (! + £)*-. 




Fig. 6.10 Interstage coupling cir- 
cuit set up for calculation. 
(See Prob. 6.7.) 



(l + £) 



'- 2b 



l+jcoC E R E 



+ a + P)R B 



2a 



2b 



Apply Thevenin's theorem to Fig. 6.10, replacing the network driving the 
above impedance with a simpler equivalent series network: 



«e q =/?pl|i? Ll 



R P + R L ' 



r., = v A 



The current l bi is easily calculated: 



Re 



Rp + R Ll 



I b , 



R, 



R etl + (1 + ®R E2a + (1 + 0) - — _£ 

1+lcoC 



2b 



Ve q (l + Ja>C E R E ,J 



(1 + /9)K E2b + [1 + jo>C E2 R E2b ][R eq+ (1 + &R B J 
This can be put into a convenient standard form for plotting: 

V A R p (l + j(oC E2 R E2b ) 



f (R p + R L t ) [R eq + (1 + 0) (R E 2a + R E J\ 


b 2 

1 + 


2? eq + (l +J 8)R E2a "I 


jcoC E2 R E2b 




lRe q + (l + P)(R E2a +R E2b ) 



Let 



(6.2) 



(6.3) 



CO a = 



Re q +(l+P)(.R E2a +R E2b ) 

[« eq +(l + 0)i? E2a ](C B2 /? E2b ) 



(6.4) 



Multi-Stage Amplifiers 



131 



COb = 



B = 



C E 1 R E 2b 



(ftp + Rl. 1 )[*.q+ (1 + ff)(R E2a + R E2b )] 



Kn 



Substitute these new parameters in (6.3); 

1b. 



. . CO 

1 + ; — 

1 w t 

B 1+/-SL 

6>a 



(6.5) 



(6.6) 



(6.7) 



This is the desired form for plotting the frequency response of a network. Ap- 
pendix C describes the plotting techniques based upon the use of asymptotes on 
log-log coordinates. 

Now continue by determining V Q as a function of l bl to arrive at an expres- 
sion for gain as a function of frequency. From Table 5.1, 

/3/ba 



'c s = 



1 + 



Rl 



~&t 






/S/ b2 i?r 



(6.8) 



Substituting (6.7) in (6.8), 



j8«L 2 



B 



n ■ CO \ 
COb 



(6.9) 



This is the required expression for gain as a function of frequency. 

The plot of V /V A on log-log paper appears as shown in Fig. 6.11. This is a 
generalized plot of amplifier low-frequency gain as affected by capacitor C Bl . 
Of course, at very low frequencies, the coupling capacitors of Fig. 6.7, presently 
assumed infinite, become significant. 

Now substitute numerical values from Fig. 6.7 in the expression for gain: 

R p = fljflj = 16 KQ (as determined in Prob. 6.5), 



Hence, 



K eq = K P II R Ll =^|=3.81KO, 

lo + o 

B , ( R P + R lJ [i?eq + (1 + fi)( R E2& + R E2b) ] . 



B = Hi 5 - [3810 + (101) (1500)] 



[6.6] 



16 



21 
16 



x 155,300 = 204,000, 



10 6 



cab = 



R E 2b C E 2 



1000 x 5 



= 200 rad/sec, 



Ke q +(l+|8)(R E2a +K E2b ) 
[R eq + (l + /3)K E2a ]C E2 i? E 



[6.4] 




Fig. 6.11 Gain vs. CO on log-log 
scales. The asymptotes are 
shown as dashed lines; the 
actual curves are shown as 
solid lines. (See Prob. 6.7.) 
Note that 



V A 



CO 

|6Rl 2 "b 

B , co ' 

l +; — 



2b 



132 



Transistor Circuit Analysis 



Substituting previously determined values for the numerator and 1/(C E R E ), the 
expression for co a becomes 



co a = 



155,300 x 200 



The bracketed term in the denominator is 

3810 + (101)(500) = 54,300. 
Therefore, 

155,300 x 200 „ n . , 

Wa = ' „ nn = 572 rad/sec. 

54,300 

Substituting the above values in the expression for gain, 



, . co 



, . CO 

Ys. = & L > 2>6. = (100) (5000) 200 

Va b l + j^L ™ 4 >°° i + ;_^L 
co a 572 



[6.9] 



i + ; 



2.45 



200 



572 

This is the final numerical expression for gain variation in the region where 
Ce 2 is most sensitive to frequency change. The responses for co = 0, co = 300 
rad/sec, and <u = °o will now be calculated: 

At co ~ 0, 

V 

-?- = 2.45. 



At co = 300 rad/sec, 



As co = 



^=2.45 20°- 

V A 300 

572 



Ik 
V A 



= 2.45 x 1.6= 3.92. 



£ * 2.45 x??l =2 . 45>< 572 

Ka J_ 200 

572 



Refer to Fig. 6.11 for the plot of gain vs. frequency. 



The preceding problems have shown how C„ an interstage coupling capaci- 
tor, and C Bi , an emitter resistor by-pass capacitor, individually affect frequency 
response. For reasons which have been previously explained, the separate ef- 
fects cannot be superimposed unless the significant frequencies associated with 
each capacitor are widely separated. A really accurate investigation of the com- 
bined effects of two capacitors, such as C, and C Bj , requires an equivalent 
circuit analysis of both stages together, taking into account all interactions. 



Multi-Stage Amplifiers 



133 



PROBLEM 6.8 In the circuit of Fig. 6.7, if C 2 and C Ej = 5 /if, C t = 50 /if, and all 
other values are unchanged, show the exact tee-equivalent circuit for determining 

Po Ab- 
solution: Figure 6.12 shows the common-emitter tee-equivalent circuit to be 
used for computing the gain, and the numerical values of the circuit parameters 
applicable to this problem. 



VW — <>— V^~"° — ° v ° 




A = A = 10 ° 

R R = 680KQ 



R ?-- 


= ikQ 


R F = 


= 1.5 KQ 


R E 2a = 
R E 2 b = 


= 500 fi 


R t.= 


= Rl 2 = 5 


c.= 


= 50/if 


c 2 = 


= 5 /if 


c E2 


= 5/zf 


r b 


= 30011 


r e 


= 9fi 


r d 


= 100 Kfl 



5KQ 



■-»► Oi 



Fig. 6.12 Equivalent circuitof two-stage amplifier. (See Prob. 6.8.) Note that r e «K E , 
r b «Rj, and r d » R L so that the transistor parameters can be neglected; hence, 



R t + R 2 



PROBLEM 6.9 Using the circuit (Fig. 6.12) of Prob. 6.8 and formulae from 

Table 5.1, calculate gain V /V e as a function of frequency. Make assumptions 

and suitable approximations where necessary to simplify calculations. Consider 

the frequency range from 1 cps to 10,000 cps. 

Solution: Calculate the input resistance of the first stage. 

by the second stage, 



Neglecting loading 



R ll £r b + (r a + R Bl )(l+P)- 






= 300+ (1509) (101) 



1 + 



1 + 0.0005 
1 + 0.06 



R L +R E + r ( 



144 Kfl. 



(1 + /3) 



Note that the terms in the expression for R tl , which include R L , actually 
have less than a 6% influence on the result of the calculation. It is not neces- 
sary to know R L to a high degree of accuracy in order to determine R v This is 
fortunate since the effective R L is equivalent to R Ll in parallel with the effec- 
tive frequency-sensitive impedance to the right of R Ll in Fig. 6.12. An exact 
computation would be extremely tedious. 



134 



Transistor Circuit Analysis 




(a) 



R eq =5KQ 



eq- 

-VV/Vr 



3.13 V g 



G 



(b) 

Fig. 6.13 (a) Equivalent input cir- 
cuit, (b) Thevenin's equivalent cir- 
cuit for the first amplifier stage. 
(See Prob. 6.9.) 



For R ix = 144 KQ, we can calculate the attenuation characteristics of the 
first stage input circuit. Refer to the equivalent input circuit in Fig. 6.13a. The 
gain of this circuit falls 3 db at that frequency where the capacitive reactance 
equals the equivalent series resistance: 



+ 



R il R B 



co C t R^ + R B 

Now substitute numerical values and solve: 

-L = i + (|» = 121KQ . 

<y C\ 144 + 680 

For C, = 50 iii, oi = 2 nl = 1/6 rad/sec and f = 0.027 Hz. At / = 1 Hz, 
the capacitive reactance is relatively small (3170 Q). Its attenuating effect on 
gain is therefore negligible in the frequency range of interest. 

Thevenin's theorem is readily applied, replacing the first stage by its open- 
circuit output voltage, V A , and its equivalent output impedance, R 0l : 



R 0l ~r d (l + 

Substituting numerical values, 

R 01 ~ 100,000/1 + 







1 + R e + Tb 
r e + R El 



100 \ 



1 + 



1300 j 
1509/ 



= 5.5 MQ, 



This is much greater than R L t , and the effective output impedance i? eq is there- 
fore approximately equal to R Li = 5 Kfl; hence, voltage gain from (3.52) is 



A.-&S ** 



V D T e + R 



Ei 



5000 
1509 



3.15. 



This figure for voltage gain must be multiplied by the attenuation of the input 
network to determine the over-all gain of the first stage: 



V D = V eq 



R t 



RiAR B + R e 

where R, t \\r b is the equivalent parallel resistance of R tl and R B . Therefore, 



*-*i£-"«*- 



Substituting, 



Va (open circuit) 



= 3.15x0.995 = 3.13. 



The first stage can be replaced by the equivalent network shown in Fig. 6.13b. 
Now calculate the input impedance of the second stage: 



z i 2 = T b + 



R E 2 B +R E 2b 



jco 



C J 



(1 + /3) 






Rl + Re 2s + «E 2b 



+ R r 



1 + 




Multi-Stage Amplifiers 



135 



The term in the last pair of brackets is 



1 + 0.0005 



5500 + 



1 + 



The expression 



**2b 



1 + j<oC Ei xR E2b 
99,000 



'2b 



1 + joC B x R E 



2b 



can never exceed R E2b = * KQ. Thus, the entire bracketed expression merely 
introduces an approximately 6.5 % reduction in the value of Z, 2 . In the interest 
of simplicity, this entire bracketed expression will therefore be neglected, so 
that 



Zi 2 ~r b + 



R* 



+ R, 



2b 



1 



iaC, 



Bi 



(1+0). 



The simplified equivalent circuit for the two-stage amplifier is shown in Fig. 
6. 14. The voltage at point A is the output of the first stage when loaded by the 
second stage. It is straightforward, though somewhat tedious, to determine l b% 
over the frequency range. From / bj , the output voltage V ot and therefore the 
over-all voltage gain, are determined. 

As a good approximation, current gain of the second stage is (Table 5.1) 



Ai 



P 



r rf 



so that 



A, 



100 



1 + 0.05 



= 95, 



Ys. 



= A,R L = 95 x 5000 = 475,000. 



The frequency dependency of the multistage amplifier is now confined to 
the variation of l bj , determined from Fig. 6.14. To aid in carrying out the calcu- 
lations, note the principal circuit time constants. As a first approximation, the 
loading of the first mesh by the high-impedance second mesh across R p will be 
neglected. The first mesh time constant T a equals (R eq + R P )C 2 ~ 0.105 sec. 
The time constant T b = C E2 R E2b = 5 x 10 -6 x 10 3 = 0.005 sec. 



3.13 



Rfi 2a (l+/8) 
= 50Kfi 

AAAr 




ioo kD 



Fig. 6.14 Simplified equivalent circuit of two-stage amplifier. (See Prob. 6.9.) 



136 



Transistor Circuit Analysis 



The wide difference in time constants permits an analytical simplification. 
At very low frequencies, where T a is in the range of interest (co = 10 rad/sec), 
the time constant associated with C El has negligible influence. Capacitor C El 
may well be considered open-circuited. At higher frequencies, where T b is in 
the range of interest (co = 200 rad/sec), the reactance of C 2 may be considered 
negligible. The circuit therefore can be treated as though it contained two 
separate and isolated time constants. 

The circuit of Fig. 6.14 is most easily solved by considering the various 
frequency ranges of interest separately. At very low frequencies, C E is es- 
sentially open-circuited, and 

3 13 V* 
h~ ±~* = 3.1370, C 2 V e , 



JcoC 2 



'*, = / 



R, 



■■ 3.13 V g jco C 2 R P 

R P + (R E2a + RE 2b )(l + ® 

3.13 V 6 jco x 16,000 x 5 x 10"' 
16,000 + (101) (1500) 

1.5 jcoV efia . 



At a somewhat higher frequency, where C 2 is negligible while C El is still re- 
garded as an open-circuit, I bi is easily calculated from the all-resistive network 
as/ b2 = 15.4 V gi ia. 

At higher frequencies, both capacitors act as short-circuits. Solving again 
f or/ 6 „ 



3.8K12 

-AAAr 



50Kfi 

-AAAr- 



{r^J ' Ib > ) cos ^f^ 



Fig. 6.15 Simplified Thevenin's 

equivalent circuit, with re- 
actance of C 2 essentially zero. 
(See Prob. 6.9.) 



/* 



3.13 V e 16 

~ z 5000 +16,000 || 50,000 50 
= 58.1 V g fia. 

Consider now the intermediate frequency range, where C 2 is essentially a 
short-circuit, while C Ei is not. Apply Thevenin's theorem to eliminate the first 
mesh. Figure 6.15 shows the simplified form where the reactance of C 2 is taken 
as zero. This circuit is easy to solve for I bi . First determine the impedance of 
0.05 /zf in parallel with 100KQ: 



2 P = 



100,000 x - 

jco 0.05 x 10~ 6 



100 Kfi 



100,000 + 



1 



jco 0.05 x 10" 



100,000 
1 + jco 0.005 



Now solve for I b 



/„ = 



2.38 V„ 



53,800 + 100 ' 000 

1 + jco 0.005 



15.4 7^(1 + jco 0.005) 
1 + jco 0.00175 



tia. 



Multi-Stage Amplifiers 



137 



Recalling that V /I bl = 475,000, we now have sufficient data to sketch the 
amplifier attenuation characteristics. This is most easily done by a plot on 
logarithmic coordinates as in Fig. 6.16. 

Note that this problem was substantially simplified by the separation of time 
constants, T a and T b . This allowed us to consider the separate frequency re- 
gions independently. If these were not separated by about a factor of 10, more 
precise calculation methods based upon the formal solution of the network of 
Fig. 6.14 would be required. A more accurate solution is necessary only when a 
simplified sketch based on asymptotes and corner frequencies is insufficient. 
Usually, the simplified sketch is quite satisfactory. 



PROBLEM 6.10 If, in the two-stage amplifier of Prob. 6.9, C 2 is changed to 
0.25 j^f, all other parameters remaining the same, find the attenuation character- 
istics of the amplifier over the region where C 2 and C Ei have significant re- 
actances. 

Solution: The time constant due to C 2 has been reduced by a factor of about 20, 
so that both capacitors influence amplifier gain over approximately the same 
frequency range. An accurate loop analysis is necessary to determine the effec- 
tive circuit time constants. Referring to Fig. 6.14, the mesh equations are 



3.13 V t = 21,000 + 



10 6 



0.25 j co 



I, - 16,000 l„ 2 , 



= - 16,000 / t + 66,000 + 



100,000 
1 + jco 0.005 

These equations may be solved for / bj by eliminating /, (or with determi- 
nants), leading to the following simplified solution: 



l b2 = 0.075 V 6 



\ 200, 
\ 192/ \ 612/ 



na. 



Calculating output voltage, 



V e =A,R L l bt = 9Sx5QQOl ba 

= 475,000 /„,. 
Substituting the expression for / bj , and solving for voltage gain, 



= 0.0355 



io> [l + ; 



200 



( 1 + jJl)( 1 + jJ!l) 
\ 192/ \ 612/ 



This is the required expression for gain as a function of frequency. 




10.25 



200 572 






0.746/« 1 + ; 



200 



i + ; 



10.25/ \ l +i 572 



Fig. 6.16 Asymptotic diagram and 

accurate curve of output voltage 

vs. frequency. (See Prob. 6.9.) 



Certain deductions may be drawn by observing and comparing the results of 
Probs. 6.9-10. The high frequency gain, where capacitive reactances are negli- 
gible, is unchanged by our approximations. The approximate method of con- 



138 



Transistor Circuit Analysis 



sidering corner frequencies individually, leads to somewhat erroneous values for 
these frequencies, but the inaccuracies are rarely important in practical amplifier 



6.3 Transformer Coupling 

Transformer coupling between the stages of a transistor 
amplifier offers significant advantages such as: 

1. Good bias stability. 

2. Simple impedance matching for optimum power gain. 

3. Isolation of stages. 
The disadvantages are: 

1. Relative high cost. 

2. Bulk and weight. 

3. Limited frequency range. 

4. Nonlinearity, due to nonlinear magnetic core. 

The most significant advantages have to do with impedance matching. 

The equivalent circuit of the transformer is a linear network which represents 
the transformer in a convenient manner for purposes of calculation, as illustrated 
in Fig. 6.17. The figure also defines all symbols for use in this section. The 
idealized output transformer at the output terminals of the equivalent circuit pro- 
vides the required amplifier impedance matching. 




Fig. 6.17 Trans former equivalent circuit. Note that R t = primary d-c resistance; R 2 = sec- 
ondary d-c resistance; n = primary /secondary turns ratio; L t = primary inductance; K = co- 
efficient of coupling of primary to secondary; KL 1 = mutual inductance, primary to second- 
ary; (1 — K)L l = leakage inductance, primary or secondary; R^ - equivalent core loss re- 
sistor; C w = equivalent distributed capacitance referred to secondary winding. Leakage in- 
ductance L t is measured with the secondary open-circuited; secondary inductance L 2 can 
be measured with the primary open-circuited: L t = n 2 L 2 ; R L is relatively independent of 
frequency except at frequencies in the low audio range; K is usually slightly less than 

unity. 



PROBLEM 6.11 For the circuit of Fig. 6.18a, determine the variation of gain 
with frequency. (The transformer is effectively coupling a driving source R a to 
an output load R t .) 

Solution: In complex problems of this type, it is most convenient to carry out 
separate calculations for the low- and high-frequency regions. Consider first the 
low-frequency region. Since K = 1 for a reasonably efficient transformer, 

uMl -!:)«£„ n a R 2 

at very low frequencies (<u small); thus the series inductance terms may be neg- 
lected. Similarly, for very small o>, the R L term may be ignored in comparison 
with the reactance of KL X . Also, the capactive reactance C„ becomes very large, 



Multi-Staga Amplifiers 



139 



Li(l - K) R 



1^(1 - K) n 2 R 2 





Fig. 6.18 (a) Equivalent circui t showing an interstage transformer coupling the output of 
one stage to the input of the next, (b) Simplified equivalent circuit for low-frequency 

condition. 

and may therefore be neglected. The simplified equivalent circuit corresponding 
to low-frequency operation takes the form of Fig. 6.18b. 
Now using Thevenin's theorem, 



_ - xn 2 R, (- 



V 0l (JR i + R 0x )(}K<oL l ) 
(R l + R 0i ) + ;KftiL 1 



+ n*<R, + R h ) 



jKoiLytiR! 



(«i + RoJQKcoLJ + n'OJj + R^fiR, + /?„,) + jK<oL l ] 

jKci)L 1 nR i 
n 2 (R t + R^XR, + R 0i ) + jKa>L l [n\R x + R, 2 ) + (R, + R 0l )] 
jKcjL.R^ 



n{R 1 + R t )(R 1 + R 0l ) 



1 + jKcoL l 



R l + R 0l n 2 (R 2 + R i2 ) 
]KaL t R. 



nd^ + Rj^i + R,,,) 



1 + / 



* l [Cfix + R^nHRa + Ria) . 



(6.10) 



Equation (6.10) shows the output increasing uniformly with frequency, and then 
leveling off as the second term in the denominator becomes dominant. The comer 
frequency, where attenuation begins to level off with increasing frequency, oc- 
cuts where 






Above this comet frequency, the frequency-sensitive term in the denominator 
of (6.10) becomes dominant. In this intermediate or mid-frequency range, 



"i, 



nR, 



V 0i (R 1 + R 0l ) + n 2 (R 2 + R il ) 

The equivalent circuit for the mid-frequency range is given: in Fig. 6.19, which 
yields V, /V almost by inspection. Frequency response is flat in this region, 
which is generally the useful operating region of the transistor amplifier. 



140 



Transistor Circuit Analysis 



K„i + Ri 







/ R °i$ /j? niR i 



fii. 



-n'R, 



n: 1 



Fig. 6.19 Simplified circuit showing 
transformer coupling. 




Fig. 6.20 Interstage-coupling equivalent circuit for high-frequency 
condition. Loading on the transformer output terminals is assumed 

negligible. 



Resonant 
peak due to 
tuning of C w 




Fig. 6.21 Gain characteristic of a 
transformer coupling network. 



The high-frequency region of the frequency-response characteristic is dis- 
tinguished by the increasing importance of the series inductors, L x (1 - K). The 
shunt inductor KL l leads to a very high reactance at high frequency, and may be 
neglected. The equivalent circuit for high-frequency conditions is shown in Fig. 

For simplicity, capacitance C„ will be neglected for the present. This is 
usually a practical assumption in transistor circuits, as R, generally provides a 
relatively low-resistance shunt at the upper frequencies of typical matching trans- 
formers. From the equivalent circuit, the L/R time constant is determined by 
inspection: 



2(1 -K)L, 



(6.11) 



R « 0l + *, + «' (a,, + jy" 

The corner frequency corresponding to this time constant is 

With the upper and lower corner frequencies determined, as well as the level 
of the intermediate frequency region, the gain characteristic may be plotted on 
logarithmic coordinates as in Fig. 6.21. Sketches of both asymptotes, as well as 
the general shape of the gain curve itself, are shown. 

Thus far C w has been ignored. However, it is possible for C w to series-reso- 
nate with the equivalent transformer leakage reactance somewhere in the high- 
frequency region. Should this be the case, the gain curve is modified to show a 
characteristic resonant peak (Fig. 6.21), whose amplitude is determined by the 
"Q" of the circuit. Above this resonant peak, the shunting capacitor acts to at- 
tenuate the output even more rapidly than before. 

Commercially, K, n, and L, are not generally given in transformer catalogs. 
However, it is often possible to estimate these parameters. For a matching trans- 
former, 



n = 



(6.12) 



where R, and R L are the driving and load impedances, respectively, to be matched. 
If the lower corner frequency a L is given, for K - 1, R, = R 2 = 0, and letting 
R Bl - R„ Ri t - Rl (see Fig. 6.18b), 

R. Rl n 2 Rl R„ 



u L = 



L, 



(R. + n I R L )L l 2R„L l 2 L t 

2 £u L * 



(6.13) 



Multi-Stage Amplifiers 



141 



PROBLEM 6.12 A manufacturer's catalog lists the following data on a trans- 
former: 

R s = 10,000 Q, 

R L = 100 a 

co L = 500 rad/sec. 
Estimate h x and n. 
Solution: From (6.12) and (6.13), 




2 a,. 2x500 



Resistors J? t and /^ can be measured as the d-c resistances of the trans- 
former windings, or very roughly estimated as 






R A 2N929 4 c ma mr—] 



P = 290 
h oe = 33 Kfi 



Fig. 6.22 Output transformer to 

match load in a common -emi tter 

ampli fier. 



33 KQ 



-WAr 



e 



j8/b 



L > 



3Kfl 



(a) 



PROBLEM 6.13 For the circuit of Fig. 6.22, estimate the required transformer 
primary inductance L 1 , such that the low-frequency response is 3 db down at 60 Hz. 

Solution: From Table 5.1, the transistor output impedance is easily estimated: 

R = h oe = 33 K a. 

A simplified but satisfactory equivalent circuit is given in Fig. 6.23a. Figure 
6.23b shows the circuit rearranged to simplify determination of the corner fre- 
quency. The effective resistance for the computation of corner frequency is 
33 K fi|| 3 K fl, or2.75Kfl. 
The lower corner frequency, 

co L = 2 n II = 2 n- x 60 = 377 rad/sec. 

The time constant of the inductive circuit must equal the reciprocal of co L : 



2750 



1 

377' 



L t -2750. 7.3 h, 

1 377 

for I c = 4 ma d-c through the transformer primary. 

PROBLEM 6.14 Using reasonable approximations for the circuit of Fig. 6.24 at 
the specified operating conditions, determine 

(a) R t , for correct bias, 

(b) C lf for a corner frequency co = 10 rad/sec, 

(c) output transformer inductance L i for a corner frequency, co L = 200 rad/sec. 
Assume that the d-c resistance of the transformer secondary is 10% of the load 
resistance. 

Solution: For the conditions of Fig. 6.24, l E = I c = 10 ma. The emitter voltage 
is 1.2 K fl x 10 ma = 12 v d-c. To compensate for the base-emitter drop, the volt- 
age at the base V B = 12.6 v. 




L i 



'2.75 Q, 



Fig. 6.23 (a) Simplified equivalent 
output circuit, (b) Simplified equiv- 
alent circuit for estimating corner 
frequency. (See Prob. 6.13.) 




1.2 Kfi 



Fig. 6.24 Amplifier circuit with 

transformer-coupled output. At 

I c = 10 ma: ^ = 380, r e = 1 1 0, 

r b = 700 SI, r d = 5250ft. 



142 



Transistor Circuit Analysis 



It is convenient to estimate the input impedance R, of the base circuit. From 
Table 5.1, 

R, = (1 + f>/e) Re = 381 x 1200 = 458 K fi. 
Since this high input impedance is in parallel with R,||/? 2 (where /?, = 22 Kft) at 
the base input, it may be neglected without introducing more than a few percent 
error. Thus, neglecting base current drawn from the voltage divider formed by 
i? t and R 2 , it is easy to calculate R 2 : 



12.6 = 



R, 



R t + R 2 



-x24. 



Since R, = 22 K 0, R 2 is calculated as 24 K fi. 

We can now determine the value of C, for a corner frequency of 10 rad/sec. 
The RC time constant must be 0.1, so that 

* JI *'=ifir 1L5Kfi ' 




R, = 900 fi 

-VW- 



n 2 R 2 = 900O 

-WV 1 



► 1.18MQ 



n'R L = 

9000 n' 



Fig 

equi 



6.25 Transformer-coupled 
valent circuit calculation. 
(See Prob. 6.14.) 



c,= 



10 11,500 



= 8.7 n f. 



Now examine the transformer in the collector circuit of the transistor. The 
transistor is effectively a high impedance current source, in comparison with the 
relatively low load impedance. A simplified but fairly accurate equivalent cir- 
cuit is shown in Fig. 6.25. The effective time constant is 



n*(R 2 + R L ) 9900' 
This must equal the inverse of the specified transformer low-frequency corner: 



9900 



1 
200 



20 



PROBLEM 6.15 For the amplifier of Fig. 6.24, estimate voltage gain at o = 200 
rad/sec. 

Solution: Neglecting the effect of transformer inductance, from Table 5.1, 

A = Rl 

v ~Rl' 

where R L is the effective a-c resistance in the collector circuit. From Fig. 6.25, 
this is 10,800 Q. Substituting, 



A v = ^m = 9.0. 
v 1200 

This, however, is the voltage on the primary side of the transformer, reduced 
on the secondary by a factor of 30 by the transformer step-down ratio. An addi- 
tional attenuation of 9000/10,800 is introduced by the transformer winding re- 
sistance. Further, the gain is reduced by a factor of ^2/2 = 0.707 at the corner 
frequency, co L = 200 rad/sec. Therefore, the voltage gain at co L = 200 rad/sec is 



Multi-Stage Amplifiers 



143 



O)=200 



9.0 x-Lx-^-x 0.707 
30 10,800 



0.176. 



In the design of signal amplifiers (as contrasted with power amplifiers dis- 
cussed in Chap. 7), it is not only necessary to verify that gain is adequate, but 
one must also verify that the required "swing" of the output voltage is restricted 
to the linear region. This problem is important in the output of multi-stage am- 

PROBLEM 6.16 For the circuit of Fig. 6.26, design the bias circuit to permit a 
distortion-free output voltage of 2 v rms, while keeping the stability factor S < 4. 

Solution: We must determine the range of I c . For Ic f_0, the collector is at a 
12 v potential. Recall that 2 v rms corresponds to 2 x 2 \/2 = 5.66 v, peak-to-peak. 
Thus, the collector potential may be as low as 12 - 5.66 = 6.34 v for peak col- 
lector current. This value of peak current = 5.66/5000 = 1.13 ma. 

This reasoning indicates a value of collector bias current of about 0.6 ma, 
swinging from nearly zero to a value somewhat under 1.2 ma. A load line for this 
condition is shown in Fig. 6.27. 

For the 2N929 transistor, a minimum V C e of 1 v assures satisfactory opera- 
tion (see Fig. 2.5b). Thus, 



Ve = Vcc - Rl Ic, 
Substituting values, 

V B =U-[ 5000 x 0.0006 + 



- V 



CE 



min 



5.66 



-1 =6.17 v. 



Assume, as a convenient approximation that 7 B = 6v for the d-c operating level. 
Since I E =I C = 0.6 ma, 



+ R 



Eb 



0.0006 



10 K a. 



Thus, R E „ = 500 ft and R Eb = 9,500 ft. 



The base voltage is 6 v + V BE = 6.6 v. Base current is also easily found: 



/s= 7T 



Ic 0.6 x 10- 



300 



-= 2/* a. 



From (4.16), 



For S = 4, 



S=l + 



R, 



Re ' 



R p = 30 K ft. 



If we assume that the 2 fi a of base current is negligible compared with the 
current drawn by the /?,, 2? 2 divider, then 

R, 



R 1 + R 2 



However, 



Vcc = 6.6 v. 



RiRi 



R t + /? 2 




R F =500 ft 
r e =-- lOMft 
/3 = 300 

Fig. 6.26 Load line superimposed 
on idealized collector character- 
istics. (See Prob. 6.16.) 



1.4 


\ 


1.2 


V b = 2/b ° 


1.0 


t" \ 


f 0.8 


! \ 


o 


i \ 


E . 0.6 

6 




0.4 


i !\ 


0.2 


! ' \ 


n 


! ! vs = o 



2 4 6 8 10 12 
V CE , volt — ►• 

Fig. 6.27 Load line superimposed 
on idealized collector character- 
istics. (See Prob. 6.16.) 



144 



Transistor Circuit Analysis 



Substituting, 



Solving, using known values, 



R 



*1 



2-Vcc = 6.6 v. 



R, = 54.5 K fl, 

R, = 66.5 K fi. 

It may be verified, if desired, that divider current is much greater than base in- 
put current. 

PROBLEM 6.17 If, in Fig. 6.26, a large capacitance is connected from the out- 
put terminal to ground, what is the maximum undistorted rms capacitance current? 

Solution: Since bias current is 0.6 ma, this is the maximum instantaneous peak 
collector current that can flow without the collector current actually reaching 
zero. Therefore, 



0J5 



= 0.424 ma rms. 



PROBLEM 6.18 In Prob. 6.13 (Fig. 6.22), what is the maximum undistorted volt- 
age across the transformer primary? 



10 
8 
6 



o 4 









35/ia 


30 /xa 


25fJa 














2C 












X2v^ 


_ P 








IS/ia 
-10 \tar 










-^£* 


>9p0 




















— 5fia- 

i B =o 















10 15 20 

V CE , volt — 



25 



30 



35 



Fig. 6.28 Collector characteristics with superimposed 
load line for the circuit of Fig. 6.22. 

Solution: The transformer primary voltage measured at the collector can theo- 
retically vary from to 24 v, since the voltage may be either plus or minus (see 
Fig. 6.28). However, since the transistor drop V CE must not be less than 1 v 
and the collector current not be allowed to go to zero, the distortion-free primary 
voltage can typically vary from 1 v to 23 v. 

Actually, referring to Fig. 6.28, V mln = 0.8 v, so that the full sinusoidal 
voltage swing is 2 x 11.2 = 22.4 v peak-to-peak, or 7.85 v rms. 



6.4 Direct Coupling 

Direct coupling of amplifier stages leads to the following 
advantages: 

1. It avoids large coupling capacitors, and does not limit the low-frequency 
response or allow low-frequency phase-shift. 

2. Quiescent output voltages provide input bias to subsequent stages, avoid- 
ing bias networks. This allows higher base-circuit input impedances. 



Multi-Stage Amplifiers 



145 



3. Feedback around several stages can lead to bias stability factors, S, less 

than unity. 
In this section, we will examine some two- and three-transistor direct-coupled 
amplifiers, which may then be cascaded, as desired, using a-c coupling methods. 

PROBLEM 6.19 Making reasonable assumptions, analyze the circuit of Fig. 
6.29 for the variation of / c , due to changes in leakage current Icbo with tem- 
perature. 

Solution: This is a two-stage direct-coupled amplifier with d-c feedback from 
the emitter circuit of the second stage to the input of the first stage. Now first 
examine the nature of the feedback itself. If Icbo, increases, the emitter current 
of Q 1 increases correspondingly, thus increasing the base voltage of Q x . The 
base potential of Q t decreases, acting to reduce l B . In a similar manner, the 
circuit automatically tends to compensate for changes in Icbo.- Note that the 
by-pass capacitor C E prevents a-c feedback which would reduce amplifier gain. 



OVr 








cc 



M 



ICBO^ + Pi> 

+ /V B2 



Rb, + r b 2 



Rf, - Rr 



+ R 



Bib 



Fig. 6.29 Two-stage direct-coupled amplifier. 

To analyze the circuit of Fig. 6.29, use the techniques of Chaps. 3-4 to set 
up the d-c equivalent circuit of Pig. 6.30a. The circuit is simplified, in that the 
usual resistances (r^) across the two current generators are omitted without in- 
troducing appreciable error. Further simplification is achieved by using Thevenin's 
theorem (see Fig. 6.30b). 

The circuit equations are 




l B t Ke 2 



+ V B e 2 = V a -(Rl, + r ba )l Bl , 

v v ' 

V A = Vcc-RlJc 1 , 

I Cl -/cbo 2 (! + &)_ /e 



/„ » 



Similarly, 



f H = 



& 






i + fe- /c *<v 



<6.14) 

(6.15) 
(6.16) 

(6.17) 



(b) 

Fig. 6.30 (a) Simplified d-c equiv- 
alent circuit of the two-stage am- 
plifier of Fig. 6.29. (b) Simplified 
Thevenin's equivalent circuit for 
the input to Q 2 . 



146 Transistor Circuit Analysis 

, * Re, Ie. - Re. Ie, - Vbb, 

l "i = „ ' L - (6.18) 

^ V J 

Equation (6.16) may be substituted in (6.14) to eliminate / Bj , and (6.18) may 
be substituted in (6.17) to eliminate / B| . There remain two equations in unknowns 
f e, and ls 2 , with Icbo 1 and /cso, as independent variables: 

/ Bj [ RB i + i^o-) + V BE i = V C c -RlJe, ±R*Icbo s , (6.19) 

« *£, /«, - Fbe, = / El (i^" + *■.) ~ 'c»o, *.* 
Solve (6.20) for / Ei and substitute in (6.19) to develop a formula for l E 

+ Vbe, 



(6.20) 



'«. 



* E , + r ^_ + . v,« 



u + ft if/ 



Fbe, -ry 

Equation (6.21) contains the desired information relating changes in l E to 
changes in leakage currents. Use derivatives to get a convenient expression for 
dI Ej in terms of dIcBo t and <ScBo t - This expression is 

"*'-. \ * 

d!cBo x + Rl <Hcbo 2 



, R; 1 + /3,, 

"'"■I mT £^ <" 2 > 

"-TW 



«fp_.*|Y 



PROBLEM 6.20 The component values for the circuit of Fig. 6.29 are 

R„ = 1000 n, 



Re 1& 


= R s 2a = 


100 Q 


*«lb 


= 1900 0, 




^cc 


= 12 v, 




/ c 1 


= 1 ma, 


Ic 



The required distortion-free output voltage is 2 v rms, minimum. Determine the 
remaining circuit parameters to meet the specified requirements. 

Solution: The emitter potential of Q, is 

V Ei = 0.001 x 2000 = 2 v, 
so that 

V B< = V E , + 0.6 = 2.6 v. 



Multi-Stage Amplifiers 147 



For the 2N930 transistor, h FEl = 280 at 1 ma; therefore, 

I - 001 o CQ 

l B = — =3.58ua. 

Bl 280 p 

Proceed now to the second stage. A 2 v rms output corresponds to a 5.67 
peak-to-peak voltage swing. Allowing a minimum of about 1 v for Vce 2 • 

Ve 2 = 12- 5.67-1 = 5.3 v, 

5.3 _ 5.3 
R Ei = = 

ic In 



Therefore, 



Now determine R L : 



jr e = 5 - 3 1060 fi. 
2 5 x 10- 3 



^l 2 fc 2 = 2.84 v (|-of peak-to-peak value). 
Solving, 

r l = -2^1=567 0. 
L * 0.005 

To determine a, we must at the same time choose R l for a required stability; 
i?i is the principal component of R*, the d-c resistance in the base circuit. In 
Chap. 4, it was pointed out that this resistance must be low for reasonable sta- 
bility in the first stage. On the other hand, R* acts as a load on the input. A 
compromise is necessary. 

Assume, somewhat arbitrarily, that R* = 30 K O. Then, 

For R* = 30 K Q, a = 0.492. Since V A = Vb 2 = ' e 2 Re 2 + 0.6 = 5.9 v, 

V C c- lc x Ri,, = 12 - 0.001 R Ll = 5.9, 

so that 

R Ll = 6100 Q. 

PROBLEM 6.21 For the parameters of the preceding problem, determine the sta- 
bility factors d lg t /d /cbo,> d /e, '3 'cbo,- 
Solution: From (6.22), the following expressions are derived by simplification: 






(6.23) 



*?*. ~<t+&) 



d 






$.24) 

Making the approximation that r b «Rl, and substituting previously derived nu- 
merical values, 

— z.i, 

° 'cso. 



148 



Transistor Circuit Analysis 



<?/ 



dl 



2L— .32.5. 



CBO. 



PROBLEM 6.22 Referring to the circuit of Fig. 6.29, develop an expression for 
the stability of l Bf with respect to changes in Vbb^ and Vbe ,• 

Solution: By simplifying and differentiating (6.21), the required expression is 



-dV BBi + \ 



K 



CB~ m 



*i,a+A) *£, 



1 + 



Rt, a 



*s: 



L i + /3i, 



R? d + ft)*./ 



(6.25) 



PROBLEM 6.23 For the circuit of Fig. 6.29, using (6.25), determine A I Bi due 
to changing V BE for a 100 °C change in temperature. 

Solution: As pointed out in Chap. 1, A V BB - -2.2 mv per °C increase in tem- 
perature. Substituting numerical values in (6.25), 

A I E s (-85 + 246) x 10- 6 = 161 ft a. 



The calculation of multi-stage amplifier performance is so cumbersome that 
maximum use must be made of reasonable approximations for achieving practical 
results. Little is lost by |hese approximations, however, since the values of the 
transistor parameters themselves vary widely with temperature and among tran- 
sistors. In the following problems, idealized transistors are used, where r B = 0, 
r c = oo , and r B = 0. 



PROBLEM 6.24 In the circuit of Fig. 6.31 and its equivalent circuit (Fig. 6.32), 
determine the stability of the operating point of @j with variations in 1 C bo- 

Solution: Refer to the equivalent circuit Fig. 6.33 of Fig. 6.31. Let A/ c be the 
change in collector current due to the change in 1 C bo- It is necessary to determine 



A / c . = A In. + A l c . .+ A Ir 



(6.26) 







R 




■fc- 



'CC 



Fig. 6.31 Three-stage, direct-coupled common-emitter 
transistor amplifier. 



Rxi I c l \iR Ll 



R 2 




OV, 



CC 



ov„ 



Fig. 6.32 Simplified equivalent circuit of three-stage 
amplifier for bias calculations. (See Fig. 6.31.) 



Multi-Stage Amplifiers 



149 



56.6K12 




10Kfi> R Ei-> R 

o _^ 3K " 1 L-3I 



Fig. 6.33 Three-stage, direct- coup led common-emitter transistor amplifier 
of Fig. 6.31, with calculated resistance values and bias voltages. 



where the separate components are due to changes in I cbo in stages 1, 2, and 3, 
respectively. 

Recall that, by definition, A / Cl _, =• S, A Icbo x > The voltage at the collector 
of Q t is reduced by S! Rl 1 A /cso,» which corresponds to a reduction in the base 
voltage of Q 3 . Since the d-c input impedance of 0, is approximately equal to 

Sj Rl x A /cbo, 



A/- — 
Since A / Cji = 0, A l Bl , 

Mb - — X ifiz!_^i_ 
Rl, */?«,(! + ft)' 

Therefore, combining terms, 



A/ Cs _ x = / 8,A/ Sj = 



This is the change in the collector current of Q s , due to A I cbo • 
Similarly, the contribution from A 1 C bo is 



«. A ft 


A'cso, 


Re. 
l + -J(l + fc) 




1 + — lou/3,) 



(6.27) 



(6.28) 



(6.29) 



* 'c,_, = 



- j8, S a A /cbo, 



A/ c,_, =S } A/cbo 3 . 



(6.30) 



(6.31) 



The total variation in l C) is determined by substituting in the expressions for 
the components of A/ c in (6.26); S may be calculated using expressions de- 
veloped in Chap. 4. Since A/ c is negative, some compensation exists, but 
this is not significant in practical cases. Note that the principal drift com- 
ponents are introduced by leakage changes in the first stage. 

PROBLEM 6.25 For the circuit of Fig. 6.31 and its equivalent circuit (Fig. 
6.32), determine the stability of I c due to variations in V BB . Assume l CBO 
= 0.01 jua. 

Solution: Proceed from stage to stage, as in Prob. 6.24: 



1^0 Transistor Circuit Analysis 



A 'c,--0. AV 



EB l 



R Bi + R El (1 + ft) 
is the current change in Q, due to A V EB . As before, 

A'c^-A/c, l Rl i& 

Rl, + Re, (1 • ft) 
At the third stage, 

A/ c .Ale ^ • 

^R^-R^d + ft) 

Combine terms: 

-ft ft ft J? tl Rl 2 A V EBi 



A/ t 



[»■» + *«!(! + ft)] [Rt, + Re, (1 + AM [Rl 2 + Re 3 (1 + ft)] 



Similarly, we may derive expressions for A l c and l c _ , which may be 
summed to give the total change, A I c : 



Air = 



-A^ft^Rt 2 A7 fl£l 



' 3 IRb 1 + Rb 1 (1 + ft)] [R Ll + Re 2 (1 + ft)] [R Li + R Ei (1 + ft)] 

+ ftftRi,, AK BEa ft A V BE3 

f«L, + Re, (1 + ft)] [R Ll + Re, (1 + ft)] " R Lj + R Ej (1 + ft)" (6 " 32) 

This expression shows some compensation. It is possible to take advantage of 
this by adjustment of parameters. 



PROBLEM 6.26 Design an amplifier for maximum output voltage, using the cir- 
cuit of Fig. 6.31. Let 

l Cl = 1 ma, R Ei = R E2 = R E3 = 3 K «, 

'c 2 = 2 ma, R 2 = 10 K Q, 

lc 3 = 3 ma, C Ei = C El = Ce 3 = 3000 p f , 
V cc = 24 v. 

Use approximate design procedures. Considering the sensitivity of I C bo and 
V BE to temperature, calculate A l Cl resulting from changes in these two param- 
eters as temperature increases from 25 °C to 100 °C. 

Solution: Assume base currents are negligible compared to collector currents. 
Then, 

V El = I Cl Re, = 0.001 x 3000 = 3 v, 
V Bl = V El + V BEi = 3.0 + 0.6 = 3.6 v. 

Calculating R, from the voltage division ratio of the bias divider, R 1 = 57 Kfi. 
Then, 



Pe 2 = l Cj Re 2 = 0.002 x 3000 = 6 v, 
Vb 2 = V El + V BE2 = 6.0 + 0.6 = 6.6 
We may now determine R L : 

Vcc-1 Ci Rl^V Bi . 

Substituting and solving, R L = 17.4 K 0. 

Continuing the above with bias calculations, 



Multi-Stage Amplifiers 



151 



V E% = I Ci R E3 = 0.003 x 3000 = 9 v, 

Vb 3 = V E3 + V BEl s 9.0 + 0.6 = 9.6 v, 

24 - 0.002 R Li = 9.6, R Li = 7.2 K 0. 

The choice of R L is based on the requirement for developing maximum out- 
put. We require the maximum swing in collector voltage, V Ci : 

where whole V C e ■ * s the minimum V C e for 03 for correct transistor operation, 
and is assumed to be 1 v. Therefore, 



V c . = 9 + 1 = 10 v, 



24 v. The collector volt- 



and when the transistor is nearly at cut-off, V c , 
age may swing from 10 v to 24 v, with a quiescent level of 17 v. The peak-to- 
peak swing is 14 v, and the peak swing = 14/2 = 7 v: 



Rr.Ir 



Rl, = 



3 0.003 



= 2330 0. 



The final circuit with all parameters included is shown in Fig. 6.33. 

Now calculate the temperature sensitivity of I c , as Icbo and Vbb vary. 
The assumed Icbo = 0-01 ^a. From Fig. 4.2, Icbo increases by a factor of 17 
atlOO°C. Thus, A/ CBO =/ C bo = A/cbo 2 = A / C bo 3 = 0.16 ji a. Substitute in 
(6.29), (6.30), and (6.31), with known A/ ceo : 

A i c = _ 



1 + P<l + &) 
/8, S 3 A Icbo 



1 + ^fi 



(1 + ft) 



+ S 3 A Icbo- 



(6.33) 



Calculating stability factors, 



S, = 1 + 



R*. 



= 3.8, 



1 + ^=6.8, 
Re, 



S, s 1 + 



Substituting in (6.33) and solving, 



Al r 



71.1 A Icbo = 11.4 pa at 100°C. 



This is negligible since I Cl = 3 ma, and A Ic 3 corresponds to only a slight bias 
shift. The result confirms the validity of our approximation methods; high cal- 
culation accuracy is not justified. 

Now determine the component of change, A l c \> ^ ue to AV B e over the speci- 
fied temperature range: 

A V BE = (75°C) (- 2.2 mv/°C) = - 165 mv. 
Substituting in (6.32), 



152 



Transistor Circuit Analysis 



A I' c ' 3 = 0.69 ma. 

While this is much more significant than the A l' c resulting from A/ C so. it is 
still not a serious shift. The stability of the multi-stage direct-coupled amplifier 
is very satisfactory. 

We may make an estimate of the effect on / c of a change in /3: 

A/c. f A(H 



■ sS 



[4.15] 



Assume, as the basis of estimating, that j8, varies from 325 at 25 °C to 460 at 
100 °C, with an average value of 390. The value of A a /a corresponding to this 
$ x change is 0.9 x 10 -3 . Therefore, for the first amplifier stage, 



A/ f 



S t (0.9 x lO" 3 ), 



and since S t = 3.8, 



A/ f 



^■= 0.34 x 10- 



Due to the change in j8,, / Cj changes by 0.34%. This is also negligible. 

The effects of changes in /3 2 and /3 3 may similarly be estimated as negligible. 
Only the temperature effects of changes in V BE are significant. These can be 
compensated for by the methods of Chap. 4. 

PROBLEM 6.27 For the amplifier circuit of Fig. 6.33, estimate the input im- 
pedance and voltage gain at 1000 Hz, and the maximum undistorted peak-to-peak 
output voltage at 25°C and 100°C. Specify C, so that voltage gain is 3 db down 
at 60 Hz. Note that the circuit parameters are those derived in Prob. 6.26. 

Solution: This problem provides an example of a step-by-step series of calcula- 
tions of input and output impedances, starting with the last stage. At 1000 Hz 
(gj = 6280 rad/sec), all emitter by-pass capacitors are essentially short-circuits. 
The transistor parameters used here are summarized in Table 6.2. Practical ap- 
proximations are made throughout. 
From Table 5.1: 



R i = r b + (r e + Re a) 



1 + 



Rl + Rb b ,. 
1+ (1 + /3) 



Table 6.3 





25°C 


100°C 


Unit 


R„ 


6310 


9830 


ohm 


*L. 


4640 


6290 


ohm 


*.. 


8800 


13,850 


ohm 


R-, 


5280 


8550 


ohm 


*I> 


3040 


3910 


ohm 



with R L « r c , and r e « r c /(l + /3). The portion of emitter resistor not by-passed 
by C E , Re b , is zero. Now substitute numerical values from Table 6.2 in the 
above expression to find the input impedance of the third stage: 

At 25°C, Ki 3 = 5280Q, 
At 100°C, R l} = 8550 Q. 

These input impedances, paralleled with R Li , establish the effective load, 
R* 2 , on the second stage: 

At 25°C, i?£ 2 =3040fl, 
At 100°C, Rl 2 =3910fl. 

Proceeding in this manner, the required additional items may be calculated, and 
are summarized in Table 6.3. These include the required amplifier input impedance. 



Multi-Stage Amplifiers 



153 



Now calculate the currents and voltages in successive stages as required to 
determine over-all gain. If the current gain of the input stage is A ti , then 

R Ll 



/, 



'», A h 



**.+*', 



Substituting the expression for current gain from Table 5.1, and replacing I bi by 

v,/R h , 

V, ft R Ll 



or 



R >> 



h x p.rl, 



Rt 



l + -JH(l + ;8i ) 



R Ll + R h 



R <> 



1 






' ik ™ 

l + ^d + A) 

. f «i J 




KL. + Kij 



(6.34) 



Similarly, 



h, ft j 


Rr. 


2 


1 + —1(1 + ft) 
. f <= 2 




Ri. 2 + ^y 3 



(6.35) 



Note that 



ftRi., 



1 + ^1(1 + ft) 



(6.36) 



Substituting numerical values for the circuit parameters (see Table 6.1), the 
required performance data summarized in Table 6.4 are obtained. The voltage 
gains in Table 6.4 are part of the required solution to the problem. 

Note that although j8 increases by about 40% with increasing temperature, 
suggesting an over-all increase in gain of about (1.4) 3 = 2.75 times, the actual 
gain increase is only about 15%. The separate effects of changing ft as shown 
in the gain equations, partially cancel. 

Determine C, such that gain is 3 db down at 60 Hz. At this frequency, the 
capacitive reactance must equal the minimum (25 °C) input impedance: 

X Cl = R h = 8800 n, 

C, = 0.302 n f. 

Determine the maximum undistorted peak-to-peak output voltage from the bias 
point. At 25 °C, the quiescent conditions are 

/c 3 = 3 ma, 
and since R Li = 2330 and R Ej = 3000 Q, 

V E = 0.003 x 3000 = 9 v, 
V c = 24 - 7 = 17 v, 
V CE = 24 -(9 +7) = 8 v. 

The resistance i? Ej is by-passed, so that the voltage V Ei is a fixed 9 v re- 
gardless of the a-c signal component. A load line for this amplifier stage is 
drawn for an effective d-c voltage of 24 - 9 = 15 v, and a resistance of 2330 Q, 






Table 6.4 



25°C 



100°C 



17.8 x 10"' 

2.83 
2.1 x 10 s 



17.5 x 10" ! 

2.54 

2.4 x 10 8 



154 



Transistor Circuit Analysis 



(see Fig. 6.34). If a minimum V C e for satisfactory transistor operation is set at 
1 v, it may be seen that the peak-to-peak a-c voltage swing is 14 v. 

Re-examine the peak-to-peak output range for 100 °C operation. As previously 
calculated in Prob. 6.26, I c% = 3.69 ma at 100 °C. The emitter voltage is 11.1 v, 
so that the effective voltage for the load line is 12.9 v. The modified load line 
is indicated in Fig. 6.34, showing a possible peak-to-peak output excursion of 
11.9 v. This reduction in output voltage range is the principal reason for main- 
taining bias point stability. If l c increases to 6 ma, the amplifier actually be- 
comes inoperative. 

PROBLEM 6.28 For the amplifier of Fig. 6.33, connect a 1000 output load to 
the collector of Q 3 through a blocking capacitor C 2 having negligible a-c react- 
ance. What is the maximum undistorted output swing? 

Solution: Since the 1000 U, load does not effect the d-c operating point (because 
of the blocking capacitor), this point remains the same in Fig. 6.34. The a-c 
load line, however, corresponds to an effective resistance, Rf 3 , equal to 2330 Q 
in parallel with 1000 fi, or 700 Q. The maximum undistorted output swing is 
limited by the / c = axis, and is 8. 56 v peak-to-peak. 



10 



E 
o2 









35 /ia 


30fla 


25 fia. 














10 /ia 














15^a 


■f— »o 


L00°O- 




L*-— ^ 


v5v (25 ° c) 








lOj^a 
— 5fJa— 




^ 


^. 












\s 







10 15 20 

V CE , volt — 



25 



30 



35 



Fig. 6.34 Load lines superimposed on 2N929 common- 
emitter characteristics; Vg = 9 v. 




1000 Q 



Fig. 6.35 Output transistor circuit driving 
a 1000 Qa-c load. 



PROBLEM 6.29 With the amplifier of Fig. 6.33 and the load of Fig. 6.35, find 
the voltage gain at 25 °C. 

Solution: From (6.36), 



y,~v, Pt 7~RT t ' 

1 + __L (1 + ) 



[6.36] 



We replace Rl 3 by R* 3 = 700 Q. Substituting numerical values from Prob. 6.27, 

V 700 

-2. = 2.83 x 360 = 690,000, 

V, , 700x361 
1 + 

6.7 x 10 6 
as compared with over a million before the 1 K O load was added. 



Multi-Stage Amplifiers 



155 



PROBLEM 6.30 Repeat Prob. 6.27, but with 100 fi (see Fig. 6.36) of each emit- 
ter resistor unby-passed. Calculate only V /V l . 

Solution: Proceed as in Prob. 6.27, using the formulae summarized below: 

1 



Ri = t„ + {f. + R Ea ) (1 + /3) 



l + *£.(l + j 8) 



for R Ea « r c /(l + j8). Then, 



' bl ft 


R Ll 




V, *,, 


sk " 

l + ^Ni + ft) 


[Rl^*!,] 



7, V t Pl 






1 + ^11(1 + ft) 
Rl 3 



[Rt, + R,J 



[6.34] 



[6.35] 



[6.36] 



By substituting numerical values, the partial results and the computed voltage 
gain are determined and listed in Table 6.5. Observe the much reduced gain by 
comparing the data with that of Table 6.4. Although the variation in gain with 
temperature is somewhat improved by the unby-passed emitter resistances, the 
principal benefit is the reduced sensitivity of circuit gain to variations in the 
j8's of individual transistors. 




=3000 fit 



R,. = 100Q 



R 2b = 2900 



Fig. 6.36 Modified portion of the 
circuit of Fig. 6.33, with portion 
of emitter resistor unby-passed. 





Table 6.5 






25°C 


100° C 


Unit 


R« 


37,200 


50,000 


ohm 


R L2 


6040 


6300 


ohm 


R,2 


33,710 


43,500 


ohm 


RL 


11,500 


12,400 


ohm 


Rn 


33,000 


43,000 


ohm 


I b */Vi 


2.62 x lO" 3 


2.06 x lO" 3 


amp/volt 


i b yv, 


111 x lO" 3 


88 x lO" 3 


amp/volt 


Vo/V, 


8.3 x 10 4 


8.4 x 10 4 





6.5 Complementary Transistors 

The availability of complementary pairs of transistors 
(n-p-n and p-n-p types with otherwise similar characteristics) has made it easier 
to design direct-coupled amplifier stages. They overcome the difficult biasing 
problems of direct-coupled stages using only one transistor type. The following 
example shows how easy it is to devise direct-coupled stages using complemen- 
tary pairs. 



156 Transistor Circuit Analysis 



PROBLEM 6.31 Referring to Fig. 6.37, determine the load resistors, R L and 
Rl 2 , for the specified operating conditions; select Rl 3 for maximum undistorted 
output. 

Solution: For the specified conditions, 

V El = /e, R El = I Cl Re, = 10-' x 3000 = 3 v. 

Allowing 0.6 v for the base-emitter drop of Q lt V A = 3.0 + 0.6 = 3.6 v. 

Since high fl transistors are employed, we may neglect the base current of 
Qi in determining R, for the required V A : 

V A = Vcc ^^ 



R, + /? 2 



The validity of this approximation may be verified later, if desired. Substituting 
numerical Values for V A , R 2 , and V cc , R t is determined to be 15 Kfl. Continuing 
to the second stage, 

V Bi = 9- (0.001) (3000) = 6 v. 

The base potential, allowing the usual 0.6 v drop from the emitter, is 5.4 v. This, 
of course, must be the collector potential of Q t . Thus, 

F Cl = 5.4=9-(0.001)i? Li . 

Solving, R Li = 3.6 K Q. 

Continue in a similar fashion to the third stage: 

V E} = (0.001) 3000 = 3 v, 

Vc 2 = 3 + 0.6 = 3.6 v, 

3.6 = (0.001) R Li , R Li = 3,600 fl. 

This completes the determination of all parameters except R L} , which is found from 
the requirement for maximum undistorted output. Allowing a minimum V CE of 1 v 
f°r Qit V C3 varies from 4 v to a cut-off 9 v, for a peak-to-peak swing of 5 v. Set 
Vc 3 to the average of 6.5 v. Thus, a 1 ma swing of collector current corresponds 
to 2.5 v, so that K Lj = 2.5 K fl. For greater gain, R Lj can be increased until the 
limiting condition is reached where V Cl = 4 v maximum for Rl 3 = 5 K fl. For this 
condition, the gain is doubled and the peak-to-peak undistorted output is zero. 



Previous multi-stage amplifier calculations relating to performance and tem- 
perature sensitivity apply to amplifiers using complementary transistors, except 
that there are no d-c polarity inversions between stages. Therefore effects of 
changes in V BE , I CB o, and /8, always add. A-c calculations are identical to 
those illustrated earlier in this chapter. 

PROBLEM 6.32 For the circuit of Fig. 6.38, determine the unspecified parameters 
for the given operating conditions, as well as a-c gain and maximum power ab- 
sorbed by R L . 

Solution: Assume, as a crude estimate (which may be re-examined after an ap- 
proximate analysis is completed) that about 5% of the collector current of Q 2 is 
diverted by feedback to the first stage. Thus, if current through R L is specified 
at 95 ma, and current through R 3 at about 5 ma, then l c = 100 ma. Therefore, 

^c 2 = 31x(-0.095)= J -3 v. 



Multi-Stage Amplifiers 



157 





■ high /8, /3>100 



Q x , Q 3 : n-p-n silicon transistor 
Q 2 : p-n-p silicon transistor 

R Ei =RE 2 =RE 3 =3K-ti, R 2 = 10K(2 

C E > C E > C E , C, : essentially infinite 
l C x = Ic 2 = J C 3 = 1 ma 

Fig. 6.37 Direct-coupled amplifier using complementary 
transi stors. 



g 2 : 2N2907 

I Cl = 100 ma, r e2 = 0.26 fl, r bj = 74 Q 

/S 2 = h fe2 = 100, h FE2 = 110at/c 2 = 100ma 

Ce , Ce : essentially infinite 



' cc 



= 10v, R L =31 fl 



Dynamically, K c , may vary from zero, near transistor cut-off, to approximately 
-6 v maximum. Allowing for the usual 1 v minimum V CE , the drop across R El is 

10-(6+l) = 3v. 

For I E = 100 ma, R E = 30 0. Continuing, since Ve 2 = - 7 v, allowing 0.6 v 
for VbEj, Vc, =-6.4 v. 

At lc 2 = 100 ma, the 2N2907 transistor has a d-c current gain of h FE = 110, so 
that a bias current of less than 1 ma is required. Thus, l Cl = 10 ma should be 
ample drive. This gives 

Now evaluate the parameters of the feedback circuit containing R 3 . Feedback 
resistor R 3 tends to stabilize collector current by resetting the bias of Q, so as to 
automatically oppose changes. For correct feedback, V c% must be greater than 
V E . Assume, consistent with earlier calculations, that V El = 2 v, and current 
through R 3 is 5 ma. Then, 

3-2 



0,: 2N930 

r ei = ll £2, r Cl =2 XlO 6 

A = fife, =380; h FEl =380atI Cl = l-0™* 

Fig. 6.38 Two-stage di rect-coupled 
ampli fier using complementary tran- 
sistors, and d-c feedback for bias 
stabilization. 



R, = 



0.005 

With current through R Ei equal to Ic l + 5 ma 

2 v 



= 200 fl. 



Rr. = 



'» 0.015 



133 Q. 



Now calculate the base bias resistors of Q x . Since V El = 2 v, Va = 2 + 0.6 = 
2.6 v. Assume (as a starting point) 1 ma through R 2 . Thus, 

R 2 = -^-=2600Q. 
0.001 



The d-c input impedance to the first transistor may be estimated: 



^58 Transistor Circuit Analysis 



R, 



'lld-c 



= (1 + h FE ) R Ei = 381 x 133 = 51 K ft. 



We may safely ignore the base drain of Q t in calculating Rj 

r77r- 2 Vcc = v *- 

Substituting and solving, R t = 7400 0. If the shunting effect of the input imped- 
ance of Q l is considered, R, becomes 7050 ft. (Actually, final bias adjustments 
are best done experimentally.) 

For Q lt a 2N930 transistor, r e = 11 ft, h fe = 380, and r c = 2 x 10 6 . Thus, con- 
tinuing, 

R i t s (1 + hte) r e = 381 x 11 = 4200 ft, 

/ =A = _i±_ 
bl R, 4200' 



A,= 



i - 



j8 380 



l+^-(l+j8) 1+' 



■-358, [Table 5.1] 



j _ 358 V, 



f o 2 x 10 6 

V, 

4200 ' 



i.-L RL < 



Rl, + R l2 



R i t = r bl + r„ 2 (1 + h, H ). [Table 5.1] 

Substituting numerical values for the 2N2907 transistor, 

R ti = (0.26) (101) + 74 s 100 ft. 
Continuing to substitute numerical values, 

^• 2 =100, I C2 = A i2 l b2 = 6.7 V h 

For a-c signals, R 3 is in parallel with R L so that effective load resistance 
is 31||200, or 26.8 ft. 

Therefore V = 6.7 V, x 26.8 = 179 V t ; hence, the required voltage gain is 

v 

t- ™- 

The instantaneous voltage across R Li can go from 9 to 6 v (leaving a 1 v 
minimum for V CE ). Thus, maximum undistorted output is 6 v peak-to-peak, or 
2.12 v rms. Maximum undistorted power output P is 

p _Vl (2.12)* 

f = -— = — — = li5 mw. 

Rl 2 31 

Under quiescent (zero a-c) conditions, the power in the collector junction 
of Q 2 is 0.1 a x (7 - 3) v = 400 mw. From the data sheet of the 2N2907, the tran- 
sistor power rating at T °C is 

Power rating = 1.8 - 10.3 x 10"' (T - 25°C). 

At T = 100 °C, the rating is approximately a watt, so we are well within the rating 
for the calculated 135 mw dissipation. As shown in the next chapter, the dissipa- 
tion in this type amplifier decreases with increased a-c input signals. 

Note in Fig. 6.38 that if only part of R Ei is by-passed by a capacitor, a-c 



Multi-Stage Amplifiers 159 



feedback is introduced which simultaneously lowers and stabilizes the gain, and 
increases input impedance. (Feedback is considered in greater detail in Chap. 8.) 



6.6 Supplementary Problems 

PROBLEM 6.33 In the circuit of Fig. 6.3, let K n = R l2 = 1 Mfl, R s =100 0, 
Rl, = Rl 2 = 6.8 Kfl, h ie = 2200 fl, h ie = 100 O, h re ~ 0, and h oe ~ 0. Calculate 
C 2 for a break frequency of 25 Hz. Assume that the influence of all other capaci- 
tors is negligible. 

PROBLEM 6.34 For the circuit of Prob. 6.33, calculate the frequency response 
if C E =5 fiF and C 2 is equal to the value obtained in Prob. 6.33. Assume 
C El = Cj = °o. 

PROBLEM 6.35 In the circuit of Fig. 6.24, let R, = R 2 = 10 Kfl, R E = 1.5 Kfl, 
C-, = 10 fiF, and n = 3Q. The load resistance R L = 10 fl with all other transistor 
characteristics the same as in Fig. 6.24. Calculate (a) the frequency response 
of the amplifier if it is driven by a zero-resistance generator, (b) the power 
gain at 1000 Hz, and (c) the maximum power output using the characteristics of 
the 2N930 transistor in Fig. 6.28. 

PROBLEM 6.36 In the circuit of Fig. 6.38, let R L2 =18fl, R Ei = 33 fl, 
C Ez = 100 ixF, R Ei = 120 fl, C Ei = 100 /xF, R Ll = 270 fl, R 3 = 180 fl, 
R 2 = 270 fl, and R Y = 7500 fl. Then the transistor characteristics of the Q 2 : 
2N2907 and the Q x : 2N930 transistors are as follows: 

Q 2 : 2N2907 Q,: 2N930 

hi. = h FE = 100 h le = h FE = 400 

r e = 0.25 fl r e = 10fl 

r b =100fl r b = 0fl 



Determine (a) the frequency response when feeding R L ^ if C, = <x> and R g = 0, 
(b) the maximum undistorted power absorbed by R Li , (c) the d-c gain in R Li 
with zero input, and (d) the power dissipated in Q 2 with zero input. 



7 

CHAPTER 



POWER AMPLIFIERS 



7.1 Introduction 

Up until this chapter we have focused our attention on the 
transistor small-signal amplifier, with emphasis on voltage and current gains. But 
in an amplifier system that delivers appreciable output power, voltage and current 
gains are only important considerations in the design of the preamplifier stages, 
not in the power stage. The prime objective in the design of the power stage is 
the achievement of a required power output with a specified efficiency and per- 
missible distortion. 

The power transistor must usually be operated over its full range of output 
characteristics, which includes regions of nonlinearity. Because of this latter 
factor, power stage design by means of equivalent circuits is less useful. Graphi- 
cal methods are much more suitable, as will be illustrated. 

A more detailed knowledge of transistor characteristics is needed for the analy- 
sis and design of power stages than for small-signal stages. Refer to Fig. 7.1 
which shows the transistor output characteristics for the common-emitter connec- 
tion over their full range of interest. In particular, let us examine the character- 
istic curves in the high-voltage region. 



Saturation^ 
region 

Saturation . 

resistance 

line 




Cut-off ~f BVcEO 

region 'CBO 

V C E- 



BV, 



CES 



Fig. 7.1 Permissible operating limits of power transistors, showing non- 
linear regions. 



160 



Power Amplifiers 161 



Consider the case where the emitter is open, and a normal reverse bias is ap- 
plied to the collector-base junction. As described in Chap. 1, minority carriers 
are accelerated across the depletion layer and impinge on other atoms in the crys- 
tal. If the applied voltage is sufficiently high, these impacts lead to the genera- 
tion of additional electron-hole pairs, thus increasing the current flow. The newly 
created carriers, themselves accelerated, in turn may generate even more electron- 
hole pairs. A multiplication or avalanche effect thus occurs, which may be de- 
scribed analytically by the following expression: 

where a is the current gain of the transistor in the common-base circuit, M is a 
dimensionless multiplying factor, and a* is the current gain at higher voltages in 
the vicinity of breakdown. 

The multiplying factor is described by the expression 



-GT 



where V B is the breakdown voltage of the collector-base junction with the emitter 
open-circuited (BV C bo). and V is the applied junction voltage. In the breakdown 
region, the collector-base current is multiplied by M. 

An expression for the effective forward current gain for the common-emitter 
connection is easily derived: 





a* -an- h * F l 


Solving for h FB , 





h * = _f^_. (7.3) 



'""i-ctir; 



For zero base current, 



'c=Icbo a+h* FB )M 
M 



= 1 



CBO 



1- cxM 

Note that n and V B are constants for a particular transistor. Typically, n = 3 for 
a germanium p-n-p transistor, and n = 5 for a germanium n-p-n transistor. 
From (7.4) when l c = », 

+ a= l. 



m 



Substituting typical numerical values, e.g., a = 0.97, n = 3, and solving, V/V B = 
0.31. The voltage V, for which the collector current approaches infinity, is re- 
ferred to as BVceo (collector-emitter breakdown voltage with base open). Thus, 
for this particular case, 

BV CEO = 0.31 BV CB o- 

In the interest of low distortion and as a safeguard against damaging transients, 
the collector voltage is best limited to a maximum of BV ceo . 

Collector current, on the other hand, has no such well-defined limit. Practi- 
cally, the maximum current is limited by the fall-off in h FE , as shown in Fig. 7.2. 



162 



Transistor Circuit Analysis 




500 



Fig. 7.2 Typical current gain characteristics of a medium power germanium transistor. 
Results are normalized for convenient representation. 

High current occurring simultaneously with high voltage is limited by junction 
temperature. 

Junction temperature depends directly on the product of power dissipation and 
the thermal resistance between the collector-base junction and its environment. 
The thermal resistance from the junction to the transistor case is normally speci- 
fied by the transistor manufacturer. The unit for thermal resistance is °C/watt. 
Additional components of thermal resistance are the resistance from transistor 
case to mounting surface, and the resistance from mounting surface to the en- 



o W\r 



•VW 



l i 



junction temperature 



■AAA* — o 



1000 



T c = case temperature 
T g = heat sink temperature 
T a = ambient temperature 
9j c = thermal resistance, 
junction to case 

^c» = thermal resistance, 
case to heat sink 

"sa = thermal resistance, 

heat sink to ambient temperature 

All temperatures, °C 

All thermal resistances, °C/watt 

Total thermal resistance 



100 



X 



Units mounted in the cen-i 
ter of square sheets of 
1/8-inch thick bright alu-' 
minum. Heat sinks were 
held vertically in still air.' 
(Heat sink area is twice, 
the area of one side.) 



perimental average! 




e is = e, e + 


(a) 


1.0 
d sa , therma 


10 10 
1 resistance, °C/watt *» 

(b) 


Kit No. 


Insulating Washer 


Typical Mounting Thermal Resistance 
(#cs) °C/w (includes contact resistance) 


Dry 


With DC4* 


MK-10 
MK-15 
MK-20 


No insulator 

Teflon 

Mica 

Anodized Aluminum 


0.20 
1.45 
0.80 
0.40 


0.10 
0.80 
0.40 
0.35 



m .„j.j . i •!*.., t "™ *"-' ° r e 1 UI vaient is mgniy recom- 

mended especially for high power applications. The grease should be applied in a thin layer on both 

be added W " her - Whe " transiat °" ■» replaced in the sockets a new layer of the grease should 

(C) 

Fig. 7.3 Basic components of thermal resistance, (a) The resultant thermal resistance is 

the sum of the separate series components, (b) Thermal resistance to the environment of 

an aluminum plate, (c) Junction to case resistances of typical Motorola components. 



Power Amplifiers 163 



vironment. Figure 7.3 shows the series addition of thermal resistances, as well 
as typical numerical values. Based on these considerations, 

where P c = maximum permissible collector junction dissipation (watt), T imttK = 
maximum permissible junction temperature (°C), T a = ambient temperature (°C), 
and 8, a = total thermal resistance from junction to environment (°C/watt). 

Saturation is another limiting transistor characteristic (Fig. 7.1). In the satu- 
ration region, V C e falls below the value required for proper transistor action. 
Since this region is bounded by an approximately straight line whose inverse slope 
has the dimensions of ohms, we may define a saturation resistance, R s • 

Figure 7.1 also shows a cut-off region. When I c <Icbo, Ie reverses sign, 
the emitter-base diode blocks, and transistor action ceases. At I c = 'cboi ^b = 
- 1 CB0 and I E = 0. The transistor is said to be cut-off. The transistor can be 
driven to this condition if the driving source supplies a negative base current. 

Thermal runaway, covered in Chap. 5, sets a further limit on transistor opera- 
tion. For safest results, the thermal runaway condition should not exist anywhere 
on the load line. Thermal runaway cannot exist if V CB < - V cc . 

Also relative to some of the above items is distortion, which is often a limit- 
ing factor in transistor power amplifier design. While theoretically it is possible 
to operate between points P, and P 2 on the load line of Fig. 7.1, distortion is 
considerably less for operation between points P, and P 4 . 

PROBLEM 7.1 Collector power dissipation in a transistor is given as the prod- 
uct of collector current and collector-base voltage, or P c = V CB I C * The locus 
of constant power dissipation may be plotted on the common-emitter collector 
characteristics as a hyperbola: 

, Pc -v Pc 

"cB V CE K '' DJ 

Show that maximum power output is equal to 1/2 P c , and that the load line is 
tangent to the hyperbola corresponding to the maximum permissible transistor 
dissipation. Neglect leakage current and saturation voltage. 

Solution: Refer to Fig. 7.4. The equation for the load line is 



'c='< 



Vce 
; m « R 



_ *$(>.':,''. , , v.; ^.•;.>,.;.;"i;s-^ , :i, ; :' 

where R L = V mttx /I c ■ Since the constant power hyperbola is defined by (7.5), 
we may solve for V CE : 

JjL=I c -I".. (7.6) 

Equation (7.6) is a quadratic. Solving for V CE , 

4— V C ,: /<. " Pc - U. 



or 



+ '<*■„ ± ]/ /J c m „ 

17 ' 


4P C 







•Dissipation at the emitter-base junction is usually negligible compared with dissipation at the 
collector-base junction. 



164 



Transistor Circuit Analysis 



2N1537 




Fig. 7 



20 36 40 60F max 80 100 120 140 

Vce / volt ». 

4 Collector characteristics of the common-emitter circuit with 
superimposed load line and constant power hyperbola. 



Since the load line and hyperbola intersect only at the point of tangency, the radi- 
cal term goes to zero, and 



= 4 



r7' 



or 



v A ''max *• 

The load power for sinusoidal signals is given as 



"-^M-fcW'-', 



Changing parameters, 






Comparing transistor dissipation and load power, 



P^IPa. 



(7.7) 



(7.8) 



(7.9) 



This relationship is true regardless of R L , so long as the load line is tangent to 
the P c curve. 



An elementary design procedure to follow is to draw a load line on the family 
of collector characteristics, tangent to the hyperbola of permissible power dissi- 
pation. This will insure that the maximum rated collector dissipation for the 
transistor is never exceeded. 



PROBLEM 7.2 Design the power amplifier circuit of Fig. 7.5 for maximum power 



Power Amplifiers 



165 



output using the transistor characteristics of Fig. 7.6. The additional parameters 



•* j max = 80 C, 

r a = 25°C, 

<9 ic = 0.6°C/w, 

6> cs = 0.2°C/w, Y See Fig. 7.3 

sa = O.5°C/w.. 

Use approximate methods of analysis. Neglect distortion and leakage currents. 

5 
ic 

-^r^\ O Vcc 



Q lt 2N1537A 




Fig. 7.5 Simplified power amplifier circuit. 




20 40 60 80 100 120 140 

V CE , volt — +■ 

Fig. 7.6 Superimposed load line and Pq = 42 w hyper- 
bola. The current at Q = 1 .05 a. 



Solution: First determine the permissible power dissipation. Total thermal re- 
sistance 6 ja is e ja = 0.6 + 0.2 + 0.5 = 1.3°C/w. Hence, 



— ' niax ■* a 



6 



i» 



80-25 
1.3 



= 42 w. 



The hyperbola corresponding to this power is plotted on Fig. 7.6. A load line 
(R L = 38 fl) is sketched from V max = 80 v tangent to the hyperbola, and the op- 
erating point Q is noted. This load line avoids both the high-voltage and high- 
current regions of the characteristics, where excessive curvature occurs. 

Maximum load power, from (7.9), is 1/2 P c = 42/2 = 21 w. Total quiescent 
power, from the bad line, is 

P TOT = Vcc x lco = 80 x 1.05 = 84 w. 

This high input power is required since 42 w are dissipated in R L . To avoid this 
dissipation component, power amplifier stages almost always use transformer 
coupled outputs. 

PROBLEM 7.3 In the circuit of Fig. 7.7, the transistor is operated at the same 
quiescent point as in Prob. 7.2. What is the total quiescent power? 

Solution: Assuming an ideal transformer, the d-c load line sees only the tran- 
sistor drop, and extends from V C c = 40 vertically to Q. The a-c load line passes 
through Q as before. Power input is half of the previous value, or 42 w, corre- 
sponding to the maximum transistor dissipation. 




cc 



Fig. 7.7 Power amplifier ci rcuit 
using transformer-coupled output. 



166 



Transistor Circuit Analysis 



7.2 Distortion 



240 



200 






80 



2N1537A 



Vc 


;e = 


r 

2v 





















































































































2 3 
fc , amp 



Fig. 7.8 The fall-off in h FE at high 

Iq is a distortion-producing factor 

in power amplifi ers. 



Although one avoids the region of collector current multil 
plication, where I c increases rapidly with increasing collector voltage, there an 
nevertheless two additional factors introducing distortion: 

1. The rapid fall- off of h FE at high I c (see Fig. 7.8). 

2. The highly nonlinear I B vs . V EB characteristic (see Fig. 7. 9a). 
From inspection of the above two figures, it becomes apparent that the two com! 
ponents of distortion-generating nonlinearity tend to cancel one another. Th« 
resultant l c vs.V EB characteristic is more linear than either component. Figur 
7.10 shows this characteristic for the 2N1537A germanium power transistor. Th«l 
ratio g FB = lc/V B E, the transconductance, is the parameter used to describe! 
this type of curve. Operation at a bias voltage of V BB = 1.1 v leads to excellent 
linearity for the approximate range, 0.3 < V EB < 2.0 v, thus permitting a 1.7 v" 
peak-to-peak input voltage swing. 

In the above instance, the transistor base is driven from a low-impedance 
voltage source. For other transistors, optimum linearity may be obtained at some 
particular value of driving resistance. As an extreme condition, observe the "re- 
verse" nature of the resulting distortion in Fig. 7.9b when driving from a sinusoidal 
current source, where V BE (and / c ) take on a decidedly nonsinusoidal character 



0.3 



0.2 



0.1 




0.3 



2N1537A 



V C E 


1 

= 2v 


























\ 
















1 
1 












1 
1 
1 
i 









v EBi volt 



Fig. 7.9 (a) Base current distortion with low impedance source (voltage drive) 

for the 2N1537A transistor, (b) Distortion in output current of the 2N1537A 

transistor with sinusoidal case current drive and high impedance source. 



Fig. 7.10 A plotof collector current/ G 
vs. emitter-base voltage V EB . 



PROBLEM 7.4 Given a set of transistor common-emitter collector and input 
characteristics, devise a simple graphical construction for determining output 
voltage distortion in the circuit of Fig. 7.11. 

Solution: The required construction is shown in Fig. 7.12. Note how selection 
of the driving or source resistance R g and load resistance R L can lead to minimi- 
zation of distortion through reduction and cancellation of distortion components. 



As previously noted, the load resistance R L is wasteful in dissipating d-c 
quiescent power, so that transformer coupling to the load is normally used. The 
transformer primary d-c resistance leads to a much smaller quiescent power loss. 
Figure 7.13 shows a transformer-coupled amplifier. Note that R E is added for bias 



Power Amplifiers 



167 




Transfer 



Output 



M r o 



V BB -ZZ 



Fig. 7.11 Biased power stage with 
quiescent current going through the 
load. (See Prob. 7.4.) 




Fig. 7.12 Graphical analysis of typical operating conditions 
using current gain curves. 



stability. This is usually not by-passed in power amplifiers due to the awkwardly 
large size of the required capacitor. In addition, an unby-passed R B will provide 
improved a-c performance. Though gain is reduced, distortion and gain stability 
are improved. 

The circuit of Fig. 7.13 may be investigated in nearly the same manner as 
that of Fig. 7.11. The significant difference is that the input to the base now in- 
cludes the R B drop as well as Vbe- 

PROBLEM 7.5 Devise a simple graphical construction relating output voltage to 
applied base voltage for the circuit of Fig. 7.13. Use the same transistor char- 
acteristics and general approach as in Prob. 7.4. 

Solution: Refer to Fig. 7.14. Note the d-c and a-c load lines superimposed on 
the collector characteristics. The l c vs. l B curve is easily plotted as before. For 
each l c , there is a drop IeRe = 1 cRe in the emitter resistor. This drop must be 




Fig. 7.13 Typical bias amplifier with transformer- 
coupled output. 




Vb6 



VlT 



*V<'Y TV" 

slope = --=r- *^ ( lt — 



Input 



V B e. Vb 



Fig. 7.14. Solution to Prob. 7.5. 



168 



Transistor Circuit Analysis 



added to V BB at corresponding points to come up with the resultant V BB vs. / s 
characteristic. Figure 7.14 also shows how input and output voltages for the am- 
plifier of Fig. 7.13 are compared in order to determine gain, power output, and 
distortion. 



In the accurate analysis of power transistor circuits, it is best to use transis- 
tor characteristics corresponding to the actual operating temperatures. These are 
often unavailable, however, in the manufacturers' literature. Figure 7.15 shows 
how the significant transistor characteristics vary typically with temperature, for 
estimating the order of magnitude of inaccuracies which might be expected from 
using room temperature characteristics. 



o. 
E 



25 



20 



15 



10 







_J 


>+25°c ^y^ 




+ 50°C// 




' ,X '+75 C 






!, 










J 


f '/ 










• 


if 












































L_ 












f 








V CE =2v 



0.4 0.8 1.2 1.6 2.0 2.4 

Ig , amp » 

2N1167 

Collector current 

vs. base current 

(a) 



1.5 

1.0 

A 0.8 

i 0.6 
o 
> 

« 0.4 

0.2 















+ 50°C 


•+2 5^ 










r +1 


0°C 
































V C E 


=2v 



ft. 



0.5 



1.0 



1.5 2.0 2.5 



I B , amp »- 

2N1167 

Base-emitter voltage 

vs. base current 

(d) 



80 



60 



40 



20 















































































V C E=2v 



<J 



130 
110 



a 
6? 



25 



20 



15 



10 



01 *. 























tl 












fl 










/ i 


j 






+ 75° Cy 


>/ 


1 










^// 












>/' 


25°C 








/. 


V 










s 








m 


-"■ 




V CE =2v 



5 10 15 20 

Iq i am P — *- 

2N1167 
Current gain 
vs. collector current 
(b) 



25 



0.2 0.4 0.6 0.8 1.0 1.2 
Vbe , volt — ► 

2N1167 
Collector current 
vs. base-emitter voltage 
(c) 




+ 100 



ApE vs. temperature 
(e) 




Fig. 7.15 Characteristics of power tran- 
sistors, showing some of the effects of 
temperature, (a) Collector current vs. 
base current, (b) current gain vs. collec- 
tor current, (c) collector current vs. base- 
emitter voltage, (d) base-emitter voltage 
vs. base current, (e) h FE vs. tempera- 
lure, and (f ) 6j?e vs. temperature. 



+ 60 +100 



T c , °C— +■ 

&FE vs. temperature 
(f) 



PROBLEM 7.6 Design a common-emitter power output stage to deliver 17 w of 
maximum power to a 10 fl loudspeaker coil. Ambient temperature is 25 °C; maxi- 
mum junction temperature is limited to 80 °C. Use a 2N1537A germanium transis- 
tor mounted on a cooling plate which results in 6 ja = 1.3°C/w of dissipated power. 
Check bias stability and the possibility of thermal runaway. Assume I C bo = 5 ma 



Power Amplifiers 



169 



at 80 °C. Aim for a stability factor S of about 5. Assume that the output coupling 
transformer d-c resistance is 10% of the load resistance referred to the primary. 




R^ = lon 



Fig. 7.16 Transformer-coupled power amplifier. (See Prob.7.6.) 

Solution: Use the configuration of Fig. 7.16. Note the unby-passed emitter re- 
sistor R E used for bias stabilization. Now following the procedures of Prob. 7.2, 
we establish a Q-point at V C b - 40 v and lc - 1.05 a. To minimize shifts in the 
operating point with temperature, restrict A/ c due to increased Icbo to less than 
25 ma, corresponding to a maximum S of 5. Letting the reflected load = 38 fl, the 
transformer resistance is R c = 0.1 x 38 = 3.8 Q. Resistance Re may be chosen 
on the basis of its quiescent power loss. To minimize power dissipation in R E , 
let R E = 4 Q. Then, 



S = 



4 + R B 
4 + R B 
1 + A 



5, 



[4.38] 



where 



Rn = 



FE 



R l R 2 



R, + R 2 

Since h FE = 100 at the Q-point (see Fig. 7.8), we may substitute and solve 
for R B = 16.8 fl maximum for S = 5. From the l c vs. V BE curve (Fig. 7.10), at 
I c = 1.05 a at 25°C, V BE = 0.5 v. The voltage at point A is therefore 

V A = 1.05 R E + V BE = 4.2 + 0.5 = 4.7 v. 

However, the diode drop cancels V BE , so that a drop of only 4.2 v across R 2 is 
required. Since 

V C c = Vce + R c lc + Re / c = 40 + (3.8 x 1.05) + 4.2 = 48.2 v, 
we may solve for the resistances R t and R 2 : 

R,= 193 0, 
R 2 = 18.4 n. 
The current in the bias network is approximately 

48.2 - 4.2 



193 



0.23 



170 



Transistor Circuit Analysis 



Since this is quite large, we might wish to redesign the bias network, con- 
tenting ourselves with an increased value of S, or else use a separate bias sup- 
ply as shown in Fig. 4.22. 

From Prob. 7.2, R L = 38 fl has been determined as optimum, and since R c = 
3.8 fi, the load impedance observed at the transformer primary is 38 - 3.8 = 34.2 fi. 
The transformation ratio, primary to secondary, is therefore V34.2/10 = 1.85. 

The rms collector current is 

A/ c . . 



2V2 



where A/ Cp p is the peak-to-peak collector current. Thus, maximum load power is 



2.05 

2x/2 



34.2 = 18 w. 



To check for the possibility of thermal runaway, use (4.49): 
1 



SO, 



> 0.07 Icbo [Vcc - 2 / c (Re + Rc)] . 



Substituting numerical values, 
1 



5x 1.3 



= 0.15 > 0.07 x 5 x 10- 5 [48.2 - 2(1.05) (4 + 3.8)] = 0.014. 



The safety factor is greater than 10. This should provide sufficient margin, even 
allowing for the approximate nature of the calculation. 

PROBLEM 7.7 In the amplifier of Prob. 7.6, determine the maximum current out- 
put without clipping due to saturation. Also determine the distortion for this 
output. 

Solution: Figure 7.17 gives the transistor collector characteristics with d-c and 
a-c load lines and the quiescent operating point Q (which was determined in Prob. 
7.2). Figure 7.17 also shows / c vs. V EB (V EB = - V BE = a positive number). 



E 
o 

O 



Rc+Re 




I B = ~ 5 ma 



Fig. 7.17 Excursion of collector current with sinusoidal base-emitter 

voltage drive. 



Power Amplifiers 171 



From the saturation point P w we determine V BB at saturation. If we apply a 
symmetrical sinusoidal base-emitter voltage about Q from a zero impedance source, 
point P 2 is established. The output I c varies from 0.1a to 2.05a about I c = 1-05 a 
at point Q. This is the range of the a-c output current swing. 

Now determine distortion. This is accomplished by the methods of Appendix D. 
Use the following simplified formula, applicable to waves exhibiting primarily a 
moderate degree of second harmonic distortion: 

D 2 = ^xl00 = /l + /2 ~ 2 '° xlOO. 
B x 2(1,-1,) 

In the present instance, /j = 0.1 a, I 2 = 2.05 a, and l Q = 1.05 a. Substituting, D 2 = 
1.3%, second harmonic distortion. 

PROBLEM 7.8 For the amplifier of Prob. 7.6, determine the driving current and 
voltage. 

Solution: Refer to Fig. 7.17, and interpolate to establish base currents: 

/ c = 0.1 a, / s = — 3 ma, 

I c = 1.05 a, I B = 10 ma, 

l c = 2.05 a, l B = 29 ma. 

Peak-to-peak base current is 29 -(-3) = 32 ma. (From the above tabulation, note 
that base current, is not sinusoidal, although input and output voltages are nearly 
so.) Peak-to-peak base-emitter voltage, from Fig. 7.17, is 0.7 v. Thus, input 
power may be approximately calculated: 

i ♦ °- 7 °- 032 oa 

Input power = = x -=2.8mw, * 

2 V2 2 V2 

18 

Power gain = = 6400. 

0.0028 

This power calculation neglects distortion. However, it is certainly suffi- 
ciently accurate for the purposes of designing a driver stage to precede the power 
stage. 



7.3 Power Amplifier Design Equations 

Manufacturers' data on power transistors are rarely suf- 
ficient for meticulous design calculations. The principal deficiencies relate to 
differences among transistors of the same type, and the effects of temperature. 
As a result, practical design procedures are based on idealized transistor char- 
acteristics. The design may then be refined by more detailed graphical methods 
and/or laboratory adjustments. 

In this section, we examine the idealized transistor characteristics. Derived 
design formulae are tabulated, and a complete list is developed. The formulae 
are summarized in Table 7.1. 

Refer to the idealized characteristics of Fig. 7.18 and note the following: 

1. Total equivalent saturation resistance R T = Rs + Re + Re- 

2. Maximum usable voltage BV mmx = 2 Kcc - Vcs- 

t . D (Vcc-V C s\ I D (Vcc-Vcsf 

3. A-c power output P = I ^ j I Q , or P a = ^- f 



4. V = gy m .x + 2Rr^ 



172 



Transistor Circuit Analysis 





N. /Rr 


= R S +R B 


+ Rc 


a/ 






1 






Slope — — 










'Q 




'1 ^ 






/ ! ' c = 


- Ic sin Oit 











2V CC -Vcs 
= BV m „ 



i?S = Transistor saturation 
resistan ce 

Re = Equivalent d-c emitter 
ci rcui t resistance 

R c = d-c resistance of trans- 
former primary winding 

Fig. 7.18 Load line construction for 
Class A amplifier operation. 




Fig. 7.19 Single transistor power 
amplifier stage with transformer- 
coupled load. (See Prob. 7.9.) 





TABLE 7.1 Class A amplifier 


design formulae.* 




Item 


Formula 


Formula 




0?r*0) 


(Rr= 0) 




p 


a^max'o RtIq 
4 2 


p c 
2 


(7.10a) 


P CE max 


VccIq = p c 


p c 


(7.10b) 


V C c 


BV m „ + 2R T I Q 

2 


2 


(7.10c) 


Vm»x 




5 R ' L 




0.5 


(7.10d) 


°l + 2 Rt 


RL 


BV max 

— t\ t 

2I Q 


S^max 

4 p c 


(7.10e) 


p 

CE max 
Vopt) 


BV m . x 
4R T 






0.5 
, 2P C 

" * max 


(7.10f) 
(7.10g) 


v/l + 16 V r -l 
V BV 

f " r max 




P cc max 


V CC Iq = Pc 


^cc'o = P C 


(7.10h) 


'max 


21 Q 




2/g 


(7.101) 



Transformer coupling to load assumed. 



ce 



Ey integrating the expression for instantaneous transistor power over a com- 
plete sinusoidal cycle of collector current, the following formula is obtained: 

(transistor dissipation) - V cc !q-& j^°9" Vc *\ . (7.11) 

This expresses the almost obvious relationship that transistor dissipation is the 
difference between the (approximately) constant input power ana the output power. 
Dissipation is minimized when power output is at a maximum. ' 

Within limits imposed by BV mttX and l 0a „ , the transistor dissipation is de- 
termined by the hyperbola of constant power dissipation. The approximate design 
formulae for setting the operating point and estimating efficiency are listed in 
Table 7.1. 

PROBLEM 7.9 Using a 2N930 transistor in the circuit of Fig. 7.19 having a 
thermal resistance of 500°C/w and a permissible junction temperature of 175 °C, 
calculate/ Q opt , V C c, P Q , rj (the collector circuit efficiency), and/?!.'. UseBV max = 
40 v, R s = 50 Q, and assume an ambient temperature of 70 °C. 

Solution: Start by determining the permissible transistor dissipation: 

175 °C - 70°C = 500°C/w x P c . 

Solving, the maximum permissible dissipation P c is 0.21 w. Also, 

R T = R c + R E + R s = 150 + 50 + 50 = 250 Q. 

To determine the required performance characteristics, merely substitute in 
the formula of Table 7.1: 



'<? opt = 



%f(/ 



i t 16 Pc Rt 1 



[7.10g] 



Power Amplifiers 



173 



Substituting numerical values, Iq opt = 9 -4 ma. Continuing, we obtain by direct 
substitution the following quantities: 



= BV max + 2R T l Q ^ 
2 



P„ = 



Rl'=Rl = 



BV m »*I Q Rrh 



BV n 



21, 



0.084 w, 



- R T = 2130 fi, 



Rl 



2(R h '+2R T ) 



= 0.405, or 40.5%. 



[7.10c] 
[7.10a] 
[7.10e] 
[7.10d] 



7.4 Common-Base Connection 

The common-base collector characteristics of transistors 
with high h FB are quite linear as shown in Fig. 7.20. In contrast with A^Ei firs 
i« almost exactly unity we* 3h* lull operating range of foe transistor. For the 
common-base csnaeeMoa, leakage ewrent is negligible. The maximum voltage 
(BYcboI is gteaie* then for the common-emitter or common-collector configura- 
tione< Because t e is very nearly equal to le, the only distortion introduced is by 
the nonlinearHy of the emitter input chcuit. If the input is a high impedance cur- 
rent source, such as is usually the case when the input is not transformer-coupled, 
distortion is very low. If a transformer-coupled input is used to increase power 
gain, distortion is sharply increased. To determine this distortion, the V B g vs. 
Ib characteristic, not usually available, is required. However, the Vbe vs. lc 
characteristic may be used without significant error. 



ICBO 




1 E = 




-v. 



Fig. 7.20 Common-base characteristics of the 2N1537A 
transistor at 7) = 80°C and BV CBO = 100 v. 



Fig. 7.21 Common-base trans former- coupled output stage, 
BV CBO = 100 v. 



PROBLEM 7.10 Design a transformer-coupled common-base power output stage 
under approximately the conditions of Prob. 7.6. Assume the transformer d-c re- 
sistance is 10% of the reflected load resistance and determine the optimum output 
transformer ratio. Calculate maximum load power, distortion, input current, volt- 
age, and power, and approximate input impedance, with current drive and voltage 
drive. Determine V C e and compare with the common-emitter amplifier of Prob. 7.6. 

Solution: The circuit configuration is shown in Fig. 7.21. From Prob. 7.6 and 
the manufacturer's data in Appendix A, extract the following parameters: 

Tj = 80 °C, allowable junction temperature, 

T a = 25 °C, ambient temperature, 

d ja = 1.3°C/w, thermal resistance, 



174 Transistor Circuit Analysis 

l CBO =5 ma at 80°C, 
BV CBO = 100 v. 
Using these parameters, calculate permissible junction dissipation: 

p T j -T B 80-25 

Now refer to Fig. 7.20 where the 5 ma l CB0 is shown on an exaggerated scale, 
since otherwise it would not be discernible. For the common-base connection, 
voltage breakdown occurs at BV CBO , A load line may therefore originate at lOOv 
on the horizontal axis. For a permissible transistor dissipation of 42 w, the load 
line must be tangent to the P c = 42 w hyperbola at 0(50 v, 0.84 a). This is the 
operating point. The load line, therefore, corresponds to 

R,-^- 59.5 0. 

We have assumed that 10% of the apparent load resistance occurs in the out- 
put transformer winding, a reasonable assumption related to transformer efficiency. 
Thus, R c , the transformer resistance, is 5.95 0, and the effective load resistance 
must be 59.5 - 5.95 s 53.5 O. Since the load is actually a 10 resistor, the turns 
ratio may be determined: 



V 10 



5 ^-23 
10 



Calculate power output P to the load. The rms current is l = °-4^ =06 

V2 
(neglecting distortion). Therefore, 

P = P^-l x 53.5 = 19.2 w. 



V2 

Saturation actually reduces the power output slightly. 
Now establish V cc : 

V C c = V q + R c Iq = 50+ 5.95 (0.84) = 55 v. 

For sinusoidal input current, output distortion is negligible. This is a direct 
consequence of the current gain characteristic of the common-base circuit, where 

i hpE , , . . , 

'c=- l E , h FE »l. 

l + n FE 

However, there is no current amplification. 

The driving voltage, on the other hand, is decidely nonsinusoidal. The V EB 
vs. I c curve, Fig. 7.22, is used instead of the usually unavailable V EB vs. l E 
curve, with little loss of accuracy. Note that the curves used should correspond 
to the actual junction temperature. 

From the operating points superimposed on Fig. 7.22, the evidence of voltage 
distortion is apparent. The lower voltage extreme is 0. 45 v below the quiescent 
value, while the upper extreme is 0.3 v above the quiescent value. Using our ap- 
proximate formula for second-harmonic distortion from Appendix D, 

D, (%) = E i + E 2~2E Q > 
2(E 1 -E l ) 
Substituting numerical values, 



Power Amplifiers 



175 



The negative sign has no meaning; the second harmonic distortion is 10%. 
The fundamental component is similarly evaluated: 



Fundamental 



E 1 + E 2 



then substituting, the fundamental voltage is + 0.75/2 = 0.375 v peak, or 0.265 
v rms. Since / ; = l = 0.6 a rms, input power is 

P, = 0.265 x 0.6 = 0.158 w. 

Power gain is 19.2/0.158 = 120. This is much less than the power gain of the 
comparable common-emitter circuit, explaining why the common-base circuit is 
not often used. 

Input impedance is readily estimated: 

0.265 v 



*, = ■ 



-= 0.44 fl. 



0.6 a 
This is much lower than for the common-emitter connection. 

The only significant advantage over the common-emitter connection, apart 
from the somewhat increased output power rating, is the reduced distortion. This, 
however, can also be achieved by negative feedback from the power stage output 
to earlier amplifier stages (see Chap. 8). The high input current requirement of 
the common-base amplifier is a serious disadvantage. 

Now consider the same common-base amplifier circuit, Fig. 7.21, driven from 
a sinusoidal voltage source. This could be, for instance, a transformer input with 
a sufficient voltage step-down to reduce generator resistance Rg to a negligible 
value. 



o 



5 






2N1537A 






V CE =2v 












7>80°C 










3 














2 














1.70 
X 


























0.85 



y i 

S i 

/ 1 













0.4S ( 0.75 1.0 



2.0 



3.0 



'EB 



volt . 




Fig. 7.22 Emitter-base voltage vs. collector current 
for T= 80°C. 



Fig. 7.23 Influence of generator source re- 
sistance on a 2N 1537A transi stor stage 
characteristic. 



Figure 7.23 shows how the now distorted input current is obtained by graphi- 
cal construction. From the figure, we see that a maximum V t = 0.3 v peak (corre- 
sponding to 0.212 v rms), which avoids saturation clipping. Second harmonic 
current distortion is (from Appendix D) 



D 2 (%) 



'» + '.-2/< 



100. 



2 (/,-/,) 
Substituting numerical values from Fig. 7.23, D z = 10%. 



176 



Transistor Circuit Analysis 



Neglecting harmonic distortion, input power is approximately 0.212 x 0.545 = 
0.115 w. The fundamental power output is 

P = (0.545) 2 53.5 = 15.8 w. 
Thus, power gain is 15.8/0.115 = 138. 

We may see the effect of introducing some moderate value of source resistance 
R g . Figure 7.23 shows an input load line corresponding to an R e of 0.93 fl. In- 
put voltage must be increased to 1.08 v peak, or 0.765 v rms, leading to an in- 
creased power input, P l = 0.545 x 0.765 = 0.418 w. Distortion is essentially un- 
affected by introducing R g . Much greater values, approaching a current drive 
input, would be required. 

The input resistance for voltage drive is 

K,-**" 0.4 0, 



0.545 



nearly the same as for current drive. 



7.5 Common-Collector Power 
Amplifier Stage 

The common-collector or emitter-follower circuit has a 
characteristic voltage gain of somewhat less than unity. The techniques for the 
design of common-emitter amplifiers may be directly transferred to the design of 
the common-collector amplifiers. The load, in effect, becomes R B , with R L = 0, 
and the transformer d-c resistance now serves as a d-c stabilizing emitter resis- 
tance. Input impedance approximately equal to (1 + h FE )R E is high. The common- 
collector connection is seldom used for power amplifiers. 



Vcc 




Fig. 7.24 
stage 



Common -co I 
driving an 8 



lector power 
load. 



PROBLEM 7.11 Using the 2N1537A transistor with the same characteristics as 
in Probs. 7.6 and 7.10, design a common-collector power stage to drive an 8 fl 
loud-speaker coil without an output transformer. Calculate maximum power out- 
put, distortion, input power, and power gain. Determine V C c and Fee. If the 
transformer has a secondary resistance of lfl, i.e., R B = 10, calculate the sta- 
bility factor S. Source impedance R e = 0. 

Solution: Refer to Fig. 7.24 which shows the configuration of the power-stage 
circuit. Using the thermal characteristics of Prob. 7.6, permissible transistor 
dissipation is 42 w. Now draw a load line on the collector characteristics of Fig. 
7.25. Since collector and emitter currents are nearly equal, the load line is drawn 
to correspond to an 8 load. Therefore the figure will show the load line and 
the operating point Q corresponding to a 42-watt dissipation. Limiting the total 
output signal swing to avoid clipping due to saturation, voltage ranges from 3.5 v 
to 36.3 v, and the current swing is 4.2 a, p-p. Collector supply voltage V cc is 
thus 36.6 v. Neglecting distortion, 



P„ = 



33 



4.2 



17.3 w. 



2 V2 2 V2 

Figure 7.26 shows the l E (= l c ) vs. V E b characteristic, 
the relationship 



From this curve and 



V, = lc Re + V 



EB 



(Vj = base voltage), the required swing of V t is determined as ± 17.6 v around a 
bias point of V BE = 17.6 v. Because of this symmetry, there is no distortion to 
affect the accuracy of our calculations. 



Power Amplifiers 



177 



2N1537A 







2N1537A 



4.2 
4 



E 
o 

J" 



V CE = 2 V 
Tj = 80°C 

































































1.0 



2.0 



3.0 



140 



I , volt 



Fig. 7.25 Collector characteristics with superimposed load 
line for Prob. 7.11. 

Input (base) current is readily determined from Fig. 7.25: 

/ BffiM =0.095a, 
/bq = 0.026 a, 

Z Bmin = - 0.005 a. 

It can be seen that l B is quite nonlinear, so that a low source impedance is nec- 
essary to insure low output distortion. Using the methods already applied several 
times in the preceding problems, it may be determined that a 40 fi source imped- 
ance leads to about 5% distortion. The 1 A transformer resistance leads to negli- 
gible distortion. 

Input current is very roughly 



Fig. 7.26 Emitter-base voltage vs. collector current. 
(See Prob. 7.11.) 



0.095 



= 0.0475 ma peak, or 33.5 ma rms. 



This neglects distortion. Thus, 



R,= 



17.6 

If 



Continuing, 



33.5 x 10- 3 



^x33.5x 10" 

V2 



373 0. 



0.418 



Power gain is 41.5, by far the lowest figure of each of the transistor configurations. 
To calculate S, use (4.38): 



Ssl + 



R f 



1+-= 1.125. 
8 



This low stability factor is characteristic of transformer-coupled input circuits. 

To calculate collector efficiency 77, note that quiescent battery power is 36.6 x 
2.1 = 77 w. Efficiency, the ratio of power output to input d-c power, is 17.3/77 = 
22.5%. This poor efficiency is primarily due to the d-c dissipation in the 8 Q 
emitter load resistance. 



178 



Transistor Circuit Analysis 



7.6 Push-Pull Amplifiers 




Fig. 7.27 Push-Pull transistor am- 
plifier with transformer-coupled in- 
put and output. 




Fig. 7.28 Classes of amplifier oper- 
ation determined by portion of cycle 
in whi ch the transistor is cut off. 



For relatively high distortion-free output power, the push- 
pull amplifier is used (Fig. 7.27). As a consequence of its circuit symmetry, 
there exists a characteristic symmetry of the output waveform, such that even 
harmonic distortion components are cancelled. Additional advantages, not im- 
mediately obvious, are the d-c cancellation in the output transformer, and greatly 
increased efficiency as compared with single-ended devices. 

Depending on the bias voltage of the circuit of Fig. 7.27, we get different 
classes of operation. These classes may be defined most easily by reference to 
Fig. 7.28. Classification is based primarily on the degree of clipping of collector 
current during operation. 

The principal advantage of clipping is improved efficiency. Class AB opera- 
tion is more efficient than Class A, and Classes B and C are even more efficient. 
However, the latter two modes lead to relatively high distortion, and are not em- 
ployed except for tuned loads. 

Because of the numerous advantages of the common-emitter circuit as a power 
stage, we will confine our discussion to this configuration. However, the method- 
ology developed below is equally adaptable to the other basic configurations. 



7.6a Class A Push-Pull Amplifier 

Because of simplicity of design, we will initially con- 
sider Class A operation, although more efficient Class AB operation is usually 
preferred in practice. Actually, Class A push-pull operation is about the same as 
Class A operation of two separate but symmetrical transistor circuits, whose out- 
puts are combined by the action of the output transformer. 

PROBLEM 7.12 Design a push-pull Class A amplifier by combining two ampli- 
fiers of the type designed in Prob. 7.6. Draw load lines, determine its power out- 
put to a 10 load, and determine its second harmonic distortion when operated to 
the point where clipping barely occurs (maximum output). Also determine its ef- 
ficiency, and calculate the output transformer turns ratio. 

Solution: The push-pull circuit is shown in Fig. 7.29. Figure 7.30 shows the 
composite transistor collector characteristics, obtained by superimposing the two 
sets of characteristics to show push-pull behavior. Resistances R A and R B are 
used to adjust bias, as well as to optimize diode temperature compensation. The 
diode provides a compensating voltage drop for the variation in V BE with tem- 
perature. 

From Probs. 7.6-7, the following quiescent operating conditions for the sep- 
arate transistor circuits are established: 

I Ct = / c , = 1-045 a, 



' CE 



40 



The voltage drive is 0.7 v p-p, and bias is adjusted for the required Q-point. 

The design is similar to the design of single-ended Class A amplifiers, except 
for the effect of the output transformer, which couples the separate circuits. The 
basic transformer equation is 



/„ = 



nCr Cl -/ C2 ). 



Since the separate outputs are 180° out of phase, I c is maximum when I c is 
minimum, and vice-versa. 



Power Amplifiers 



179 




r[ =2 nR L =38 Q 



Fig. 7.29 Push-pull power amplifier showing tempera- 
ture-compensated bias circuit. 



Substituting extreme values, 

I = n(2.05 - 0.1) = 1.95 n = I 2 , positive maximum output, 

l = n (0) = = Iq, quiescent output , 

l = n (0.1 - 2.05) = - 1.95 n = /,, negative maximum output. 

It may be immediately noted that current swing is double the value for the single- 
ended circuit. Because of the symmetry of the peak output currents, the second 
harmonic distortion is zero (assuming identical transistors and ideal transformers). 
This freedom from even harmonic distortion is characteristic of symmetrical push- 
pull stages. 

The voltage swing across the load resistance R L is (38 + 38)/n v p-p. Calcu- 
late power output: 




/ B =-5m 



1.95 n 



38 



V2 nV2 



-=— x 



= 37w, 



assuming an ideal output transformer. 

From Fig. 7.30, since R£ = 2n 2 R L and R L = 10, K£ = 38. We may solve for 
the turns ratio (1/2 of primary to secondary), n = JT3) = 1.38. 

With regard to efficiency, note that the output voltage swing is unchanged, 
and the output current swing is doubled, in comparison with a single-ended stage. 
Also, the supply voltage V cc is unchanged, and I Q is doubled. Thus, efficiency 
is the same as for a single-ended stage. 



We have assumed in Prob. 7.12 that the transistor load lines are perfectly 
straight. This is not exactly true for push-pull amplifiers, although the deviation 
is usually small. The curvature is most pronounced where current gain varies 
substantially with l c . Figure 7.31 shows a characteristic exhibiting relatively 
high curvature. 



70 ma — 
95 ma — 
120 ma - 

Fig. 7.30 Superimposed collector 

characteristics for evaluation of 

push-pull operation. Load lines 

are shown for a Class A circuit. 











0.8 


| 




A 






S\ 




A 


^ %v 


Q ,„ 










B • 


J^« ^4 


0.2 




-v^ — ~^M, 






\\ — """n 


n 




v 



10 20 30 40 50 60 
Vce - 



Fig. 7.31 Curved load line in push- 
pull transistor circuit. 



PROBLEM 7. 13 Draw the equivalent circuit for a push-pull Class A amplifier. 
Reduce it to a simple format for easy analysis. 

Solution: The equivalent circuit is shown in Fig. 7.32. Because of symmetry, 
the circuit may be reduced to the single-transistor circuit of Fig. 7.33, where the 
circuit parameters are modified appropriately by factors of two. The equations for 
the single-transistor circuit of Fig. 7.33 are identical to the equations of the com- 



180 



Transistor Circuit Analysis 



& b 




*b 
O VVAr 



-WAr 



±5\'° 



2n:l 



^P mbbJLm* mmm l mm 



r b 



— VW " VW 



r d 



Til, 



L0J 



(3r b 



Fig. 7.32 Equivalent circuit of a push-pull 
Class A amplifier. 



2' 6 |8 



O ^ VAr- 




-vs/v — * 



r d 



n:l 



Fig. 7.33 Simplified single-transistor equivalent circuit of 
push-pull Class A amplifier. 



plete circuit of Fig. 7.32. The reflected load impedance is n*R L , half of the load 
for each transistor. 

7.6b Class B Push-Pull Amplifier 

Where high power efficiency is required, Class B opera- 
tion is recommended. For Class B operation, bias is adjusted for approximately 
zero quiescent current. Transistor conduction is essentially zero for half of each 
cycle. However, in the push-pull connection (Fig. 7.34) with each transistor con- 
ducting half the time but coupled through a common transformer to the load, the 
complete output wave is generated. 



-4 .^ 



y.i, 



x+ 



©L 



2n:l 



Fig. 7.34 Push-pull Class B amplifier. 




Load = n 2 R L =R' L 



Vcc 



2V r 



Fig. 7.35 Load line for a Class B amplifier, 
cut-off for half a cycle. 



Figure 7.35 shows the typical load-line for the individual transistors. The 
load lines are combined in the composite characteristic of Fig. 7.36. Note from 
Fig. 7.35 that current is zero when voltage is at its maximum, thus minimizing 
dissipation. Each transistor effectively amplifies half the input wave. Figure 



Power Amplifiers 



181 




45 ma 



Fig. 7.36 Superimposed collector character- 
istics for evaluation of push-pull operation. 



,t 



t 



v ec 2 J 



£l_z\. 



^j - -^ 




Double amplitude 
= 2V CC 



Double amplitude 

= 2V CC 



g. 7.37 Waveforms in a push-pull Class B amplifier. 




(a) 



Time 




(b) 



Fig. 7.38 (a) Superimposed 2N1537A transistor characteristics showing distortion in 

push-pull output. This distortion is due to an equivalent offset in V B £. (b) Typical 

crossover distortion in a Class B push-pull amplifier. 



7.37 shows current and voltage waveforms for the Class B connection. Since only 
one transistor is conducting at a time, the load line corresponds to the resistance 

Figure 7.38 shows the composite I c vs. Vbe characteristic. A sinusoidal in- 
put wave leads to a distorted output current. This is called cross-over distortion. 
To avoid cross-over distortion, it is advisable to operate slightly in Class AB 
with an added bias, above the cut-off value. This provides for conduction, during 
slightly more than half of each cycle. The bias differential is about 0.15 v for 
germanium and 0.6 v for silicon. Preferably, the bias is provided by a diode to 
compensate for temperature. The improved composite characteristic is shown in 
Fig. 7.39. The improvement in linearity is obvious. 



182 



Transistor Circuit Analysis 




TABLE 7.2 Class B push-pull amplifier, design formulae. 



(a) 




(b) 

Fig. 7.39 (a) Superimposed 2N1537A 
transistor characteristics showing 
how crossover distortion is elimi- 
nated by modifying the bias of push- 
pull transistors. Compare with Fig. 
7.38(a). (b) Class A-B push-pull am- 
plifier biased to eliminate crossover 
distortion. 



Item 


Formula 
(R T hO) 


Formula 
0?r=0) 


Equation 


"max 

CE max 
*?max 

RL 

Po 

"max 

P CE max 

V cc 

Per 

00 max 


VccRL 


Vcc 
4RL 

Vcc 
n 2 RL 

0.785 

Vcc 
n 2 P c 

n 2 

— = 2.466 
4 

BV 

v cc = ^f* 

Vcc 
nRL 


(7.12a) 
(7.12b) 
(7.12c) 
(7.12d) 
(7.12e) 

(7.12f) 
(7.12g) 


4(R T + Rlf 

Vcc 
n 2 Ri 

rr RL 


4 R T + R[ 

V% c 
n 2 P C 

* 1 RL V 


4\R T + RL) 

2 V cc -BV max V cc + n 2 P c R T V cc 
= BV max P c R T n 2 

Vcc 


tt{R t + RL) 


For l c = kl c , k<l 

^ '-'max ' 


Pec 

V 

Po 
max 


v cc 


kV% c 

nRL 
(per transistor) 

kn 
T 

k 2 V 2 cc 

4RL 

(per transistor) 
V CC 

RL 


(7.12h) 

(7.12i) 
(7.12J) 

(7.12k) 


R T + R L 



Design formulae for Class B operation are readily derived by reference to the 
circuit diagram of Fig. 7.40 and the idealized collector characteristics of Fig. 
7.41. All significant symbols are shown on the figures. Although the derivations 
are not presented here, the design formulae are given in Table 7.2. 

Comparing Class A and B operations for the same permissible transistor dis- 
sipation, power output is about five times greater for Class B operation than for 
Class A. The theoretical efficiency at maximum output is 78.5% for Class B as 
compared with 50% for Class A. Furthermore, d-c power for Class B approaches 
zero as the input signal is reduced, so that in normal use, the average d-c power 



Power Amplifiers 



183 




I?T ~ Rs "*" ^C "*" ^£ 



Ic sin cot 




Fig. 7.40 Class B push-pull circuit rearranged for convenient 
ca I cu la ti on s . 



is far less than the maximum. This is often a most important consideration. These 
reasons favor the use of Class B operation for most high power applications. 

PROBLEM 7.14 For the Class B circuit of Fig. 7.42, determine V cc , P ot n, rj, 
Ri, R lf and R 2 . Use a maximum collector-emitter voltage, BV mBX = 45 v. Thermal 
resistance 6 ja = 500°C/w, and T, = 175°C, max. Assume that the maximum am- 
bient temperature is 70 °C. 







Vcs 


V CC BV max 






2V C c-V C S=BV max 


Fig. 


7.41 


Load 1 


ine characteristics 


appl 


cabl 


e to the 


push-pull Class B 






circuit. 




AAAr 

R c =30O 
Fig. 7.42 Push-pull Class B transistor amplifier. (See Prob. 7.14.) 

Solution: Estimate allowable collector dissipation P c : 

Pc = 6 ja (175 - 70) = ^(105) = 0.210 w. 

Saturation resistance R s = 50 (see Prob. 7.9). No emitter resistor is used, 
since for Class B biasing, minimum power loss is more important than stability. 
Therefore, 

R T = R c + Rs = 50 + 30 = 80 12. 
To find Vcc, refer to Table 7.2: 

2V CC - BV max V cc + rr 1 P c Rt V C c = BV max P c Rt n\ [7.12f] 
Substituting numerical values and solving, 

V cc = 25.14 v. 
For our purposes, it is sufficiently accurate to let 

V cc = 25 v. 



184 



Transistor Circuit Analysis 




0.1 0.2 0.3 0.4 0.5 



'be . 



>lt 



Fig. 7.43 Approximate method to 

determine bias offset to eliminate 

crossover distortion. 



Again, referring to Table 7.2, 



i? I ,'=-l£^=302n, 



For both transistors, P a 
Continuing, 



n 2 P 



Vcc Rl 
4(R T+ R' L y 

= 0.646 w. 



0.323 w per transistor. 



[7.12d] 
[7.12a] 



Rl 



4 R T + R L ' 



= 0.62 or 62%. 



[7.12c] 



The transformer turns ratio is obtained from the relationship Rl^ti'Rl, so that 
n = 0.376. 

To minimize cross-over distortion, particularly important at small-signal am- 
plitudes, a bias of V BE = 0.25 v at T ; - = 175 °C is required (see Fig. 7.43). This 
curve is actually derived from the 125 °C curve, since the curve for 175 °C was 
not available. The required characteristic is derived from the 125 °C h FE vs. / c 
characteristic. (Approximations in our method are acceptable, since h FB nor- 
mally varies more among individual transistors than with temperature. Further- 
more, refinements in adjustment are best made experimentally.) The sloping 
straight line approximation moves 2 mv/°C to the left for increasing T, . 

We may use a silicon diode for R 2 in Fig. 7.42. The diode should carry about 
ten times the sum of the base bias currents for the two transistors, or about 5 ma. 
Since V cc = 25 v, 



Ri 



'cc 



5x 10- 



; , 2 L . = 5000 Q. 
5 x 10- 3 



If we do not use the temperature compensating diode, 



R, 



0.25 
0.005 



= 50 0. 



PROBLEM 7.15 In the circuit of the preceding problem, what is the input power 
for maximum output? What is the power gain? 



TABLE 7.3 Measured parameters on a 2N930 transistor. 



/c (ma) 


?,= 


175°C 


T t = 25°C 


T, = 175°C 


h FE 


/fi (MB) 


V BE (v) 


v BE (y) 


1 


460 


2.2 


0.515 


0.215 


2 


490 


4.1 


0.54 


0.24 


5 


500 


10 


0.56 


0.26 


10 


490 


20 


0.58 


0.28 


20 


425 


47 


0.61 


0.31 


30 


380 


79 


0.635 


0.335 


40 


335 


120 


0.655 


0.355 


50 


310 


161 


0.67 


0.370 


60 


290 


206 


0.68 


0.38 


70 


250 


240 


0.695 


0.395 



Power Amplifiers 185 



Solution: Refer again to Table 7.2: 

f Cmai = Vcc =— = 0.0655 a. [7.12k] 

R T + R L ' 382 

From Fig. 7.43, this yields V BE = 0.395 v, and from Table 7.3, l B = 240 ft a. Neg- 
lecting distortion, we need V BE = 0.15 v peak at I B = 240 /xa peak, for a collector 
current of 65.5 ma. Thus, 

p _ 0.15x_240x_10- 6 1Wfl . 

V2 x V2 

Power gain = - — = 36,000. 

18 x 10 



7.7 Supplementary Problems 

PROBLEM 7.16 Define the terms I C bo, BV ceo , and BV CES - 

PROBLEM 7.17 Explain the avalanche effect. 

PROBLEM 7.18 What is the effect of temperature on h fe and / co ? 

PROBLEM 7.19 (a) Define thermal resistance, (b) Describe .mathematically 
the effect of change in temperature on the power that is transferred to a body. 

PROBLEM 7.20 Derive the optimum bias point of a common-emitter amplifier 
for maximum power output. 

PROBLEM 7.21 What is the maximum efficiency of a class A amplifier? 

PROBLEM 7.22 Design a power stage for maximum power output using the cir- 
cuit of Fig. 7.5 and the transistor characteristics of Fig. 7.6. Ignore distortion 
and assume negligible leakage at the temperatures of interest. Maximum junc- 
tion temperature is 150°C; maximum ambient temperature is 50°C. The total 
thermal resistance from junction to ambient is 2°C/w. 

PROBLEM 7.23 Repeat Prob. 7.22 for the circuit of Fig. 7.7. 

PROBLEM 7.24 Consider a 2N1532 transistor in the circuit of Fig. 7.19. Let 
R c = 12, R E = 100 fl, R s = 2 £2, and BV CEO = 50 v. The junction tempera- 
ture is 90°C, the ambient temperature is 50°C, and the thermal resistance 6 JC is 
0.6°C/w. Evaluate Iq opt , V cc , P , r], and R L . Compare the results with those 
of Prob. 7.9. (Cf., App. A for the characteristics of a 2N1532 transistor.) 

PROBLEM 7.25 Repeat Prob. 7.24 using the push-pull circuit of Fig. 2.42. 



8 

CHAPTER 



FEEDBACK 



8.1 Basic Concepts of Feedback 



s—d 



^ e . 


A 






V 




> O 


I 






P 











+ J 



Fig. 8.1 Block diagram of a feed- 
back amplifier. 



described by its equivalent circuit parameters. The parameters can then be use*. 
to calculate various properties of the amplifier, such as gain, and input and out^ 
put impedances. For a given amplifier, the properties are fixed. In certain as* 
plications, however, we may have to alter such properties as gain, or input and 
output impedances, or frequency response. Obviously we can achieve this by 
redesigning the amplifier itself. However, there is a much more efficient method' 
that can be used. 

When a signal proportional to either die output voltage or current (or soma' 
combination thereof) of an amplifier is fed back to its input, we find that thai 
amplifier thus formed has properties quite different from those of the original 
amplifier. This process of adding a portion of the output of an amplifier to its ift£ 
put in order to alter its performance is called feedback. 

In its simplest form, the effects of feedback can be seen with the kelp of tbj 
block diagram of Fig. 8.1, in which block A denotes the amplifier, and block ft ;■• 
the feedback network. The relations for the system are * 

The gain of the new amplifier, i.e., the feedback amplifier, is defined by 



A tb = — 



(8.2) 



Solving (8.1) for e in terms of e L , 



.•*..•»: 



The gain therefore becomes 



I'-fiA' 



(8.3) 



iU» 



1-0/T 



(8.4) 



The term /3A is called the feedback factor. The amount of feedback, expressed 
decibels, is usually given as 



lit 



db of feedback - 20 log 



|1-0A|; 
where the logarithms are to the base 10. 



= -201og|l_/34|, 



(8.5) 



186 



Feedback 187 



The feedback is termed negative or degenerative when it reduces the magni- 
tude of the gain, i.e., when |1 - &A\ >1. When @A is real, it becomes pA <0. 

The feedback is called positive or regenerative when it increases the magni- 
tude of the gain, i.e., when |1 - /SA| <1. 

However, it is also seen that, when j8/4 = +1, the closed-loop gain becomes 
infinite. (Closed-loop refers to the amplifier with the feedback in the circuit, and 
open-loop refers to the amplifier with the feedback removed.) This means, in a 
practical sense, that the feedback amplifier breaks into spontaneous oscillation. 
Thus an amplifier employing feedback must be closely examined for the presence 
of any instability. 

It will be seen that negative feedback has the following properties: 

1. It stabilizes the gain of the amplifier against component and bias supply 
variations. 

2. It extends the frequency response. 

3. It reduces the level of noise generated within the amplifier A. 

4. It reduces the harmonic distortion in the output signal. 

Suppose that some arbitrary parameter in the amplifier A changes, thereby 
causing a change in the gain. The fractional change in the gain can be expressed 
as dA/A. In turn, this will cause a change in the gain of the feedback amplifier 
which can be written as tM ft A4«,. Differentiating (8.4) with respect to A, 



dA 



tb 



dA (l-j84)» 1-fiA 
Thus the fractional changes are related by 



(l -pAJA 



Mtb 1 dA (g g) 

A lb 1-PA A ' 

It is therefore seen that negative feedback reduces the effects of the parameter 
variation; i.e., negative feedback stabilizes the gain, while positive feedback 
has the opposite effect. In addition, it will be seen that feedback can also be 
used to alter impedance levels and shape frequency response. 

PROBLEM 8.1 Show that negative feedback extends the frequency response of 
the amplifier A when the gain is 

AUa ) = _ A o_, (8.7) 

..,'•. ^l:;;;t^B';:' , -r :,;; ;V : --\" : - .'...- 

where A B is the middle frequency gain, and <u„ is the high-frequency cut-off point. 

Solution: This can be shown by substituting (8.7) into (8.4) and observing the 
frequency response of the feedback amplifier: 



l + 22»" 



An {)<»)- 



1 - j8 A a- 



i + B. 



A„ 



l-fcl. + £ 



1-/8*. 1+ . 



(8.8) 



(1 - PA O )0 S 



188 



Transistor Circuit Analysis 



Without tb 



With tb 



«o <4> fb 



Fig. 8.2 Frequency response of an 

amplifier with and without 

feedback. 



Define 



Ait,. =■ 



1-/34, 



Then, 



Atb(jco) = 



A 



tt>„ 



/ft) 



(8.9) 



(8.10) 



For negative feedback, i.e., £}A 9 <0, we see that <o tb >w ; thus the high-fre- 
quency cut-off is higher for the feedback amplifier than for the open-loop ampli- 
fier. Figure 8.2 shows the comparison of the frequency responses with and with- 
out negative feedback on logarithmic coordinates. 

The fact that the two curves merge for very high frequencies can be seen by 
assuming that a> is very large in (8.7) and (8.10), Then, 







u ib a 


<u 


4(/o>)^ii . 

jfft) 





+ 




fi , 1 


' 



Fig. 8.3 The effect of a distur- 
bance, such as noise, on a 
feedback amplifier. 



Thus the two expressions become identical at very high frequencies. 

A similar analysis can be performed to show that negative feedback decreases 
the low-frequency cut-off point. 



Now consider the effect of feedback on a disturbance (e.g., noise) generated 
within the amplifier A. Examine the block diagram of Fig. 8.3. This amplifier is 
similar to Fig. 8. 1 except that the amplifier A is broken into two parts with gainfe 
A t and A 2 , such that A = A i Aj . The voltage e d represents a disturbance that can 
be thought of as occurring within the amplifier A in Fig. 8.1. 



PROBLEM 8.2 Find e„ in terms of e, and e d for both the open-loop and closed- 
loop cases. 

Solution: First consider the open-loop case which is equivalent to setting 6 = 0. 
We see immediately that 



e„ = A x A t e t + A t e d . 
For the closed-loop case, 

e, = e + |8e , 

li^Siflii|llil9i^Btti^.,,, .,,,, 

Solving these equations for e„ in terms of ej and e d , 



e + j9e , "V 
- At e + e', L 



e„ = 



e, + 



l-pA l A 1 1-/3/4.A 



eji 



(8.11) 



(8.12) 



(8.13) 



Now define e os as that part of the output caused by e /F and e od as that part of e 6 
due to the disturbance e d . Then for the open-loop case, 



Feedback 



189 




(8.14) 



And for the closed-loop case, 



e' = 



"i "a 



A* 



Oi 



e d 



(8.15) 



° d 1-/8A,/*, 
where the primes have been used to distinguish between the two cases. 



A signal to noise ratio can be defined as the magnitude of the ratio of the 
output signal to the output disturbance. (Noise is defined as any unwanted or 
undesirable signal.) Thus for the open-loop case, 



P = 



e o<* 



M,4.e,j l^e,) 



l^e„| 



ie*r 



And for the closed-loop case, 



p'- 



B od 



|-4»eil 



(8.16) 



(8.17) 



Note that the two ratios are the same, and outwardly at least no advantage 
is gained by employing feedback. 

However, looking at (8.14) and (8.15), 



II -P^ it, J 



and for negative feedback, this ratio is less than unity. 

Now suppose that the input to the feedback amplifier is altered by a factor 
1 - ]8A t i4, ; i.e., the new input is 

eJ-d-jBiMOe, • 
Then the signal output of the feedback amplifier becomes 



^lA—e' l =A l A 2 e l 



1-/S/M, 



(8.18) 



In other words, the output signal level is raised until it is the same as for the 
open-loop case. Then the signal to noise ratio for the closed-loop amplifier 
becomes 

-\l-PA t A t \ Jil*l-|l- p A t A,| p. 
I«d| 



P' = 



ei. 



e ad 



(8.19) 



Thus, when negative feedback is employed, the signal to noise ratio is increased 
by a factor |1 - j8A,i4,| > 1 when the input signal levels are arranged so that the 
output signal levels are the same for the open- and closed-loop cases. Moreover, 
the disturbance e d can be thought of as representing the nonlinearity in the am- 
plifier A; i.e., e d may represent the origin of the second and higher harmonics 
that appear in the output signal. Then it can be seen that, when negative feed- 
back is employed, harmonic distortion can be effectively reduced by a factor 

!i-/8<M a |. 



190 



Transistor Circuit Analysis 



8.2 Types of Feedback 

The principal types of negative feedback are voltage and 
current feedback. Voltage feedback means that part of the amplifier output signal 
voltage is fed back to the input Similarly, current feedback means that voltage 
proportional to output signal current is fed back to the input. 

Negative voltage feedback tends to make output voltage independent of load; 
i.e., it reduces output impedance. Current feedback tends to make output current 
independent of load by increasing output impedance. The higher the gain through 
the amplifier and around the feedback loop, the closer the output characteristics 
approach the idealized zero and infinite impedance conditions for voltage and 
current feedback, respectively. 

In many instances, voltage and current feedback occur simultaneously, and a 
clear-cut distinction may not be possible. However, this consideration does not 
influence the accuracy of our calculations. 

PROBLEM 8.3 Referring to Fig. 8.4a, state what type of feedback is used. 
Calculate input and output impedances, and voltage gain. 



Vcc = 30 v 




(a) 




O •■ 




r\> I K B v 




(c) 

Fig. 8.4 (a) Feedback amplifier, (b) Equivalent ci rcuit of (a), (c) Transistor equivalent 

circuit. 



Solution: The derived feedback is proportional to the output voltage. This is 
voltage feedback. The feedback voltage acts to inject current into the transistor 
base circuit, in parallel with and subtracting from the applied current, /,. Figure 
8.4b shows a simple equivalent circuit, in terms of input and output impedances, 
of the common-emitter transistor stage. The hybrid circuit for the transistor itself, 
including the bias resistors, R B and R s , is illustrated in Fig. 8.4c. 

To calculate voltage gain from Fig. 8.4b, it is necessary to determine A v , 
the voltage gain in the absence of feedback. An effective load resistance R£ 



Feedback 191 



must include the separate parallel paths of R L and R t . Resistance Ri must be 
known in order to calculate the open-loop gain A v . Fortunately, R t is so high 
that we usually ignore the contributions of R t in determining R' L . 
Now calculate A vL , the voltage gain with R L connected: 

A vL = Ys. = , z5?Jlh _ . [5.8] 

V, 



Calculating R' L as described above, 



'!♦*(*- -^J 



or, substituting numerical values, R' L = 3220 Q. Substituting in (5.8), the expres- 
sion for voltage gain in the absence of feedback is A vL = -420. 
Define a voltage feedback factor, p\ , such that 

ft = — ?i—, (8.20) 

r; + r, 

where Rj is the parallel impedance of Rt and R B , the bias resistor. 
From (5.6), 



Ri = h le 



fife Ke 

' h 1 

/l oe+- F r 



Substituting numerical values in (5.6), R, = 2030 Q. This is essentially equal to 
Ri , since the contribution of R B is negligible. Therefore, 



2030 
Pi ~ 



100,000 + 2030 

= 0.0199. 

We may use this feedback factor to develop a convenient formula for input 
impedance including the effects of feedback, R if : 

R Vi 

K ii = -J-> 

V n 



lf = 



A vL R', 



Ri + Rt 
These equations may be combined to yield an expression for R lt : 

R lf = Ii= ^i , (8.21a) 

" Ri + R< 



or 



Rlt = ! Jl*L . . (8.21b) 

. ^ IbAyL Rj 

b R' i + R, 



^92 Transistor Circuit Analysis 



Cancelling l b and substituting the expression for /S, in (8.21b), 

Rlt = 1 R A ' a ■ ( 8 - 22 > 

Recalling that A vL is negative, note that parallel feedback decreases the in- 
put impedance of an amplifier by a factor of 1 - A vL 8 lr or, more generally, 
1 - A v 8, where A v is voltage gain, and 8 is the fraction of fed-back voltage. 
Substituting numerical values, 1 - A vL ft = 9.35, and R i{ = 2030/9.35 = 217 Q, 
a very large reduction due to feedback. 

Consider the effect of feedback on voltage gain: 



t A -^- 



Substituting numerical values, 

Zi =_420 ilZ_=_75. 
V g 1217 

Without feedback, R t ' = 2030 Q is used instead of R if in the equation for gain. 
Numerically, 

£«^*L_ --420*30.-282. 
v e r; + R g 3030 

Feedback has led to a substantial loss in gain. However, gain variation and 
noise have been reduced by the same factor, achieving important advantages, as 
previously explained. 

The output impedance remains to be calculated. To do this, "cut" the output 
circuit as shown in Fig. 8.4b, and determine the impedance seen looking back 
into the amplifier from R L . 

Define a voltage gain, A vo , analogous to A vL , but with R L removed. A new 
parameter, /?/', is the apparent input impedance seen looking back toward the input 
through R t : 



R,'+R a 

Therefore, 

V Jf" 
V, = p ' = V B 

The basic transistor output impedance in the absence of feedback, R (Fig. 8.4c), 
is determined as 

R ° = l -nr- • [5 - 9] 



"oe 



hie + Rg 



Referring again to Fig. 8.4b, R is parallelled by R s and R t + R 1 ,'^ R f to give an 
effective output impedance, /?„, still omitting the effect of feedback. Similarly, 
we may determine the open-circuit voltage gain, A vo , with R L removed. Gain A vo 
is computed using the previously developed gain formula with a load resistance 



d" _ RfRs 



R t + R s 

the resistance parallelled with R in calculating £„. The following formulae are 
applicable: 



Feedback 



193 



"vo - 



v, 



A*. 



-h fa R'l 



1 + R, 



Ke ~ 



hfe Ke 



He 



[5.8] 



R a = 



[5.9] 



Ke ~ 



hfeKe 
h i6 + R g 



Now include the effect of feedback to calculate R of , the output impedance in 
the presence of feedback. The feedback voltage, with V applied to the output 
and V e shorted, is 



v, 



(8.24) 



where R,"is the parallel impedance of /? f "and R e . The ratio, Ri'/{R" + R { ), is an- 
other feedback factor, /3 2 , specifying the proportion of output signal fed back to 
the input. This fed-back voltage is, of course, amplified and applied to the out- 
put as V o P 2 A vo . Output impedance, R ol , is easily calculated from output cur- 
rent, l L : 

V o — " o Pi "vo 



Solving for R ol = V /I L , 



It." 



Rot 



R' 



R'o 



1 — A YO p 2 



(8.25) 



This formula shows how output impedance is reduced by the factor, 1 -A vo fi 2 , 
due to voltage feedback. 

Substituting numerical values in the above formulae, 

R'i = 4750 Q, 

R/' = 705Q, 

A vo =-618, 

R = 84 Kfl (transistor alone), 

K o ' = 4500Q, 

l-A vo p 2 = 1.425, 

R o/ = 3160 11. 

Note that the decrease in input impedance is not the same as the decrease in 
output impedance. 

PROBLEM 8.4 Repeat Prob. 8.3, using the circuit of Fig. 8.5a. 

Solution: Figure 8.5a shows a common-emitter feedback amplifier. Feedback is 
taken across a resistor in series with the load. The fed-back voltage is propor- 
tional to load current; this is current feedback. Figure 8.5b shows the equivalent 
circuit of this feedback amplifier. The fed-back voltage is summed at the input 
in series with the applied input signal. The amplifier equivalent circuit without 
a load termination, but including bias resistors, is the same as given in Fig. 8.4c. 
Now start by calculating voltage gain, and then the input impedance. Use 
roughly the same procedures as in Prob. 8.3. However, we can use simplifying 
approximations more freely. Highly accurate calculations are rarely justified. 



194 



Transistor Circuit Analysis 



K cc =30v 




R L = 9.5Kfi 




(a) 



(b) 



Fig. 8.5 (a) Amplifier with feedback voltage proportional 1o load current, (b) Equivalent 

circuit of (a). 

If we neglect a small amount of forward feed from input to output through R t , 
and ignore the loading effect of the 100 KO feedback resistor R f , then the gain,' 
A rL =-420, is the same as in Prob. 8.3. The feedback factor is easy to calculate': 



ft-- 



Rt 



1 



R L + R t 20 
Again, by referring to Prob. 8.3, 

R t ' =2030 0. 
We must now calculate R„ = Vt/I,. From Fig. 8.5b, 

V, = V be -V t , 



I, 






Combining and solving, 

V, = V be -A vL Vt.fr = V b . (1 -A vL fr), 

^■a. ^o-A. lft ) . _ 

'i v b. 



'b. 

r: 



(8.26) 



The series feedback at the input increases the input impedance by a factor of 
a~A rL fr). 

Substituting numerical values, 

i*,r, A = (-420)(l/20) = -21, 

R u = 2030 (1 + 21) = 44.7 Kfi. 

Now determine the closed-loop voltage gain: 

V ° _ VbeA vL V, A vL 



But 



so that 



v t y t o.-A VL fr)v e ■ 



* = v * ^~r . 



Ru + R e 



Feedback 195 



1 V L Rl 



V g (1 - A vL ft) R if + R g 
For substantial feedback, where A vL /3 t » 1, and Rn » R g , 



(8.27a) 



V ^ 1 ^ R if ^_ _1_ (8.27b) 

^ ft *?„ + /?«, ft 

Thus the closed-loop voltage gain becomes, to a large extent, only a function 
of the feedback factor ft. Substituting numerical values, solve for A vl > the volt- 
age gain in the presence of feedback: 

«i™ (-420) 
7 45,700 

A vt = 77- 



^ .l-(-21) 

= -19.1. 

The approximate value, A vl = -1/ft = -20, checks very well. Without feedback, 
the gain is 

«/ 1 vL= ^(-420) = -282. 



r; + R g v " 3030 

The reduction in gain is accompanied by greatly improved stability. Very 
large percentage changes in the transistor characteristics are accompanied by 
very much smaller percentage changes in amplifier gain with feedback. Where 
very high gain is required, it is much better to cascade stages, while employing 
generous amounts of feedback. 

Now we calculate the output impedance. Proceeding as before, we open the 
output circuit by disconnecting R L , and substituting an externally applied volt- 
age) V . Source voltage Vg is short-circuited. For this condition, the voltage 
gain, as before, is A vo = -618 (neglecting the small influence of R { ). Hence, 

V 1 = R t I L = — R +—V = P 2 V , 
Ri + Rl 

V -R t A vo I L +R^I L +R t I L 

R °' = rr r L ' 

R ol = Ro + R,d-A vo ). (8.28) 

Current feedback has increased the output impedance by R/(l - A vo ). Substituting 
numerical values, 

R o( = 4500 + (500) (421) = 25,500 Q . 



The preceding material points oat the important benefits that ate derived by 
the use of feedback. Amplifiers with gain stabilities to one part in 10,000 are not 
uncommon. Feedback allows the use of wide-tolerance transistors in precision 

However, feedback cannot be applied indiscriminately. Note that from (8.4), 



»tt 



l-A/3 



This shows the characteristic way in which gain is affected by feedback. When 
A j8 = 1, A^ becomes infinite. This means that the amplifier develops an output 
with no applied input. If A )3 is a function of frequency (as it almost always is), 



196 



Transistor Circuit Analysis 



then even a theoretically correct low-frequency feedback factor can become unity 
at some high frequency, in which case, self-sustained oscillations occur at that 
frequency. This, of course, is the basis of operation of oscillators. But in high- 
gain amplifiers where it is desired to incorporate feedback, the possibility of 
oscillations is very real, and it is important to carry out a design with this reali- 
zation in mind. 

8.3 Stability 



rt_ 






A 






e 






> C 




e ib < 


j> 










P 

















e = ej — e^j, , in the closed-loop circuit 

Fig. 8.6 Open-loop configuration of 
feedback amplifier circuit. 




Unstable 



Marginal 
stabi lity 



P = Nyquist point at unit distance 
from origin and 180°. 

Fig. 8.7 Polar coordinate Nyquist 
plot of open-loop gain. Increased 
gain leads to oscillation at fre- 
quency ojj. If gain is set to the un- 
stable value, resulting oscillation 
leads to a gain loss so that the 
curve passes through P. ' 



Let us consider the subject of stability in greater detail. 
Refer to the open-loop circuit of Fig. 8.6. It is apparent that if the voltage gain 
around the loop is such that e /6 is equal to e, with a 180° phase shift, then self- 
sustained oscillations will occur on closing the loop. This may be deduced from 
the basic gain equation 



Gain = ■ 



l-Afi 



[8.4] 



where gain becomes infinite when A (3 = I, so that an output (the sustained oscil- 
lation) occurs in the absence of any input. The frequency of oscillation is that 
frequency where open-loop phase shift is 180°. An oscillator differs from a feed- 
back amplifier only in that the feedback characteristics are chosen to assure a 
stable oscillation at a desired frequency, rather than a stable gain. 

It is important to note that oscillations also occur when e tb exceeds e, with 
the required 180° phase shift. In this instance, oscillations build up in amplitude, 
until they are limited by amplifier saturation. For the steady saturated condition, 
loop gain is reduced to unity, since obviously the open-loop output is identical 
with the amplifier input. 

Nyquist devised a fundamental method for analyzing the conditions for insta- 
bility. The method consists of plotting complex open-loop gain on polar co- 
ordinates as a function of frequency varying from zero to infinity. The point whose 
polar coordinates are (1, 180°) is called the Nyquist point. If the gain vs. fre- 
quency curve passes through this point, then the conditions for oscillation de- 
scribed above, unity gain, and 180° phase shift exist, and self-sustained oscilla- 
tions occur. Somewhat more generally, if the open-loop gain characteristic 
encircles* the Nyquist point, the closed-loop will oscillate. As the loop satu- 
rates, the Nyquist characteristic contracts until it lies on the minus one point, as 
in Fig. 8.7. The frequency of oscillation corresponds to the frequency o^ on the 
gain characteristic at the Nyquist point. 

PROBLEM 8.5 Refer to Fig. 8.8 which shows several Nyquist complex gain 
plots, and indicate what plots correspond to stable closed- loop conditions. 

Solution: The required solution is noted directly on the figure. 

Normally, in the mid-frequency range of amplifier operation, gain is relatively 
uniform with frequency, with phase shift approximately zero. It is only in the 
low- and high-frequency regions of operation that large phase-shifts occur. Thus, 
in the design of feedback amplifiers, much attention must be given the low- and 
high-frequency gain and phase-shift characteristics to avoid instability, even 
though normal operation may be required only in the mid-frequency region. 

There is a practical point to be observed in relating open-loop and closed- 
loop characteristics. When breaking the loop, care is necessary to ensure that 
terminating impedances are unchanged. The load on the open feedback circuit 

* The intuitive concept of encirclement becomes somewhat ambiguous for complex circuits, and thus 
Nyquist's stability ctlteilon must be extended. However the topic, amply covered elsewhere, is 
outside the scope of this book. 



Feedback 



197 



must correspond to the effective impedance seen by the feedback circuit when 
the loop is closed. Similarly, the effective impedance in the amplifier input cir- 
cuit must be unchanged for the open-loop analysis. 

PROBLEM 8.6 Consider the simple multi-stage amplifier of Fig. 8.9 which 
shows the individual amplifier stage and the three cascaded stages, with identical 
interstage coupling networks. The fraction of output voltage fed back to the input 
is designated as /8. For simplicity, it is assumed that /8 does not affect either 
the load seen by the amplifier output, or the driving impedance seen by the input. 
For /S = 1/100, determine whether the amplifier is stable. Use Nyquist's criterion, 
with suitable approximations to simplify calculations. 

Solution: The key to a reasonable and simple solution is to analyze circuit 
behavior separately at low and high frequencies. The wide separation between 
low- and high-frequency regions makes this procedure possible. 

Gain falls off at the extreme frequencies. At very low frequency, gain is 
attenuated by the series capacitor, C,; at very high frequency, R in combination 
with the shunting capacitor, C 2 , serves to attenuate the gain. 

Consider the interstage network at low frequency, where C 2 <3C C t may be 
neglected in comparison with R,, and the reactance of C l . The interstage network, 
at low frequency, therefore introduces an attenuation (for three stages) of 



Ki = 



Ri + 



jcoCu 



1 + jcoR i C 1 



(8.29) 



Substituting numerical values, 



K l = 



ja> 



1 + jco 



Similarly, the attenuation at high frequency may be approximated. The net- 
work components of importance in this region are R and C 2 . In the high-frequency 
region, C i is essentially a short-circuit, while R, is much higher than the re- 
actance of C,. Therefore, 



K h 



JOii 



1 + joC 2 R, 



(8.30) 



jcoC 2 




■'9 



(d) 

8.8 Typical Nyquist frequency 
plots on polar coordinates. 




r, = iookQ, R o =100£2 

(a) 






o * 



Stage 1 




R i< \ r> <-> r 0e i 






/3 



Stage 2 




Stage 3 



^ 




C, = 10 /if, C 2 = 0.1^f 

(b) 



Fig. 8.9 (a) Simple multi-stage amplifier, and (b) its three cascade stages with identical 

interstage couplin g networks. 



198 



Transistor Circuit Analysis 



Fig. 8.10 Nyquist plot of transfer 
function of Prob. 8.2. Note that 

gain is 1.25 at 180 phase for 
high- and low-frequency regions. 



Substituting numerical values for R C 2 , 



K h = 



1 + ;<u 10" 




Re 



Compare (8.29) with (8.30). For (8.29), as frequency increases to the rela- 
tively flat mid-frequency region, K/ = 1. Similarly, for (8.30), as frequency de- 
creases to the mid- frequency region, K h = 1. These limiting high- and low-fre- 
quency conditions must, of course, lead to the same mid-frequency gain if our 
approximations are valid. 

Open-loop gain, used in plotting the Nyquist characteristic, corresponds to 
the attenuations calculated by (8.29) and (8.30), multiplied by the feedback 
factor )8, and the gains of the amplifier stages, (10) 3 . Figure 8.10 shows the 
Nyquist characteristic plotted over the entire frequency range. Note that the 
Nyquist point is encircled not once, but twice, in both the low- and high-frequency 
regions. The loop is clearly unstable. 

Note particularly that (for this special case), the high- and low-frequency 
regions of the curve exhibit the same gain at 180° phase shift. Reducing the gain 
by 80% (by reducing /8 from 1/100 to 1/125) leads to a marginally stable system. 
Of course, this marginal stability is not practical; at least 6 db of gain margin 
are normally recommended for the 180° phase-shift point. 

The simple example illustrated above shows how neatly the Nyquist charac- 
teristic describes the amplifier frequency characteristic in the presence of sub- 
stantial amounts of feedback. The amplifier designer must shape the Nyquist 
curve to avoid the - 1 point by an adequate margin, while maintaining the desired 
degree of feedback required for gain stabilization in the mid-frequency range. 
Without the visualization provided by the Nyquist plot, stability analysis is 
relatively tedious. 

PROBLEM 8.7 For the feedback amplifier of the preceding problem, determine 
the frequency and gain at which phase-shift equals 180° at both ends of the 
frequency band. 

Solution: The loop gains for j8 = 1/100 are given by the following equations: 



Ki (loop gain) =10' ,co 
K h (loop gain) = 10 



1 + /ft) 
1 



^l + /ft)10- 5 

The frequency of Ki has a 180° phase shift when 

270° - 3 arctan w/ = 180°, or arctan coi = 30°; 

that is, when ft>; = 0.577. 

Gain at this point may be calculated by substituting to/ = 0.577 in (8.29) 

0.577 3 



[8.29] 
[8.30] 



K l \ = 10 



1.25. 



[1 + 0.577 2 ] 372 
Similarly, K h has a 180° phase shift when 

3 arctan 10 -5 co h = 180°, or tan 60° = 10" 5 <o h = y/3. 
Solving, 

co h = V3 x 10 ! . 



Feedback 



199 



To calculate gain, substitute <y h = V3 x 10 5 in (8.30) 

1 10 



IK* I = 10 



[1 + 3] 



3/2 



8 



= 1.25. 



The results calculated above check with those shown on the Nyquist curve of 
Fig. 8.10. In all but the simplest cases, calculations of the type performed in 
this problem prove tedious and impractical. Nor do they provide the visual picture 
of circuit behavior afforded by curves such as the plot of Fig. 8.10. Nevertheless, 
even the Nyquist characteristic is difficult to use. The polar coordinate plots are 
tedious to make. The effects of circuit changes to improve specific aspects of 
performance require equally tedious evaluation. The Nyquist approach is not a 
convenient tool for synthesis. 

8.4 The Bode Diagram 

The Bode method of plotting frequency response is based 
on the use of logarithmic coordinates for gain (or attenuation) and frequency. This 
type of coordinate system leads to easily derived asymptotes which provide a 
surprisingly accurate representation of the gain function. Appendix C describes 
how to plot Bode diagrams. 

PROBLEM 8.8 Solve Prob. 8.6 using the Bode plotting methods of Appendix C. 

Solution: The asymptotic solution is shown in Fig. 8.11. The phase shift needs 
but to be sketched in, taking accurate points only in the vicinity of 180° phase 
shift. A convenient stability check, well-suited to the asymptotic method of 
plotting gain, is to calculate phase shift at those frequencies where asymptotic 
gain falls to zero db, as shown in Fig. 8.11. If phase shift exceeds 180°, insta- 
bility occurs. As shown on Fig. 8.11, phase shift does indeed exceed 180° when 
gain has fallen to unity. 




Fig. 8.11 Bode plot of open -loop gain of amplifier ci rcui t of Fig. 8.9. 



PROBLEM 8.9 For the feedback amplifier of Prob. 8.8, determine the feedback 
factor j8 for the condition of marginal stability. Also find j8 for a 135° phase shift 
at the asymptotic zero db point (45° phase margin). 

Solution: From Fig. 8.11, j8 = 1/125 and 1/355 for 0° phase margin and 45° 
phase margin, respectively. These results are necessarily compatible with those 
obtained from the Nyquist plot. 



200 



Transistor Circuit Analysis 



8.5 Operational Amplifiers 

Operational amplifiers are feedback amplifiers with very 
high loop gain. The gain of an operational amplifier depends almost entirely on 
the feedback factor j8 : 

Gain = . 

1-/4)8 

where A is the amplifier gain in the absence of feedback. When A/8 » 1, 

As a result of this feature, operational amplifiers are used to achieve precise 
gain characteristics by means of suitable feedback networks. The correct opera- 
tion of the operational amplifier presumes that factors relating to stability have 
been taken care of in the design of the open- loop circuitry. 

Figure 8.12 shows a typical operational amplifier designed to accept three 
separate input voltages, taken with respect to ground. The impedances of the 
amplifier can be pure resistances or complex impedances. 



• Oe 




Fig. 8.12 Operational amplifier, including input summing circuit. 



PROBLEM 8.10 For the circuit of Fig. 8.12, find the expressions for gain 
eo/e/j, e /e, 2 , and e /e, 3 . 

Solution: Let the voltage at the amplifier input be e B . Then, by summing currents, 



e i, - e a e i2 - 



£j %2 Z$ ^F ^i 

Rearranging, 

e ', e t 2 e h ( 1 1 1 1 1 \ 

— - + — ? + — = e, — + — + — + — + — 

"l *"1 "I \"l ^2 ^3 "I "Ft ** F 

However, e = —Ae a (the negative sign means negative feedback). Therefore, 

" 1+ Z f /J_ + J_ + J_ 1_ 1 
4 \Z t + Z 2 + Z, + Z, + Z 



z, 



Zi z 2 



Is. 

z, 



(8.31) 



This is the fundamental equation for the required gains of the separate inputs. 
For the operational amplifier, gain A is very large (assume «), so that 



Zj Z a Z 3 z F 



(8.32) 



Feedback 201 



Equation (8.32) is a very accurate expression for the gain of operational amplifier 
circuits. The error in gain due to assuming A = «> is 

100/, Z F Z F Z F 



\ ^1 **\ ' '*?■ 



PROBLEM 8.11 For the feedback amplifier of Fig. 8.12, A = 100, Z t = 100 KQ, 
Z 2 = Z 3 = oo, Z, = 100 KQ, Z F = 1 MQ. Find the exact gain, and compare with 
the gain calculated by the approximate formula (8.32). 

Solution: The gain is obtained from 



e 



'i __ e p 
10 5 10 6 



1 + 

100 



— I— + —+ —\ 
100 \10 5 + 10 5 + 10 6 / 



Simplifying, 



e fl = - || (1.21) = -0.121 e OJ 



— = gain =-8.25. 
% 

The gain is —10 by the approximate formula. The approximation is poor because 
of the low gain, A = 100. 

PROBLEM 8.12 Repeat the preceding problem for A = 10 s . 
Solution: Substituting, as before, 



e 'i ^ e p 
10 5 10 



10 5 \10 5 10 5 10" 



Simplifying, 



e, = - ?2. (1.00021) , -52. = ~ 10 
1 10 e,, 1.00021 



The error introduced by using the approximate formula is 0.02%. 



Note the applicability of the approximate gain formula to high-gain opera- 
tional amplifiers. Gain is almost entirely dependent on the summing and feedback 
resistors. Stable resistors mean correspondingly stable gain. 

PROBLEM 8.13 Refer to Fig. 8.12, with Z, = 100 KQ, Z 2 = 1 Mfl, Z 3 = 10 KQ, 
Z F = 10 6 . Let A be essentially infinite so that we may use (8.32). Find e in 
terms of e^, ei 2 , and ej 3 . 

Solution: The following is the required expression: 

10 s 10' 10 4 10 6 ' 
Simplifying, 

-e = 10e il + e f2 + 100 e, 3 . 

The voltage e„ is the sum of the inputs, each input with an appropriate scale 
factor. The arrangement of input resistors is called a summing network. 

PROBLEM 8.14 In the circuit of Fig. 8.10, Z F = l/Qa>C F ), where C F is a feed- 
back capacitor, Z x = \ MQ, Z 2 = Z 3 = oo. Assume A is essentially infinite. Find 
the gain. 



202 



Transistor Circuit Analysis 



Solution: Substituting in (8.32), 

-fL = 
10 6 



jcoCf 



jcoC F e , 



o)C, 



10- 



The gain varies inversely with the frequency of the input. This is a characteristic 
of an integrator. Output represents the integral of input. This circuit is widely 
used in analog computers to carry out the critical integration function. 



8.6 Supplementary Problems 

PROBLEM 8. 15 What type of feedback produces low input impedance and low 
output impedance? 

PROBLEM 8.16 What type of feedback produces high input impedance? 

PROBLEM 8.17 What type of feedback is commonly used in operational ampli- 
fiers? (Cf., Fig. 8.12.) 

PROBLEM 8.18 Discuss the advantages of negative feedback. 

100(1000 + jco) 
PROBLEM 8.19 If the voltage gain of an amplifier is A v = — ; rTr , find 



1 + 0.1;<y 



(a) the d-c gain, and (b) the gain at 1 MHz. 



PROBLEM 8.20 Using the block diagram of Fig. 8.3, let A, 



1000 

jo + 1 ' 



0.15 +1 e e 

A 2 = n »,,. — , . and j8 = 0.1. Calculate (a) — (<u), and (b) — at 1 Hz. 
0. 015 + 1 e d e . 




Fig. 8.13 The circuit of Prob. 8.24. 



PROBLEM 8.21 Using the block diagram of Fig. 8.3, let A l 
0.15 + 1 



_500_ 



0.015 + 1 



G G 

, and /3 = 0.1. Calculate (a) — at 1 Hz, and (b) — (&>). 

e, e. 



PROBLEM 8.22 Using the system of Prob. 8.20, determine the (a) forward 
gain at 1 Hz, (b) zero-frequency forward gain, (c) feedback gain at 1 Hz, 
(d) zero-frequency open-loop gain, (e) closed-loop gain at 1 Hz, (f ) zero- 
frequency closed-loop gain, and (g) frequency at which the closed-loop has 
dropped 3 db below its initial value at zero-frequency. 

PROBLEM 8.23 For the circuit of Fig. 8.9b, determine (a) the closed-loop 
gain at &> = 200, (b) the change in the closed-loop gain at co = 200 if the stage 
gain increases from 10 to 20, and (c) what happens if the stage gain is reduced 
to 7. 

PROBLEM 8.24 For the transistor Q^ in the circuit of Fig. 8.13 the parameters 
are /3 = 100, r„ = 10 ft, r b = Oft, and r c = ■», Determine (a) the nature of the 
feedback used, (b) A v = e /e it and (c) Z in and Z . 



TRANSISTOR 
CHARACTERISTICS 



A 

APPENDIX 



A.1 Types 2N929, 2N930 n-p-n 
Planar Silicon Transistors* 

FOR EXTREMELY LOW-LEVEL, LOW-NOISE, HIGH-GAIN, 
SMALL-SIGNAL AMPLIFIER APPLICATIONS 

• Guaranteed h F E at 10 pa , T A =-55°C and 25°C 

• Guaranteed Low-Noise Characteristics at 10 fia 

• Usable at Collector Currents as Low as 1 \ia 

• Very High Reliability 

• 2N929 and 2N930 Also Are Available to MIL-S-19500/253 (Sig C) 



^3 - COLLECTOR 




ALL DIMENSIONS ARE 

IN INCHES 

UNLESS OTHERWISE 

SPECIFIED 



THE COLLECTOR L£ IN ELECTRICAL 
CONTACT WITH THE CASE 

ALL JEDEC T0-18 DIMENSIONS 
AND NOTES ARE APPLICABLE 



Fig. A.l JEDEC registered mechanical data. 

TABLE A.l JEDEC registered absolute maximum ratings at 25 C free-air temperature 

(unless otherwise noted). 

Collector-Base Voltage 45 v 

Collector-Emitter Voltage (See Note 1) 45 v 

Emitter-Base Voltage 5 v 

Collector Current 30 ma 

Total Device Dissipation at (or below) 25°C Free-Air Temperature (See Note 2) 300 mw 

Total Device Dissipation at (or below) 25°C Case Temperature (See Note 3) 600 mw 

Operating Collector Junction Temperature 175°C 

Storage Temperature Range -65°C to +300°C 

This value applies when the base-emitter diode is open circuited. 
Derate linearly to 175 C free-air temperature at the rate of 2.0 mw/C . 
Derate linearly to 175 C case temperature at the rate of 4.0 mw/C°. 

* TEXAS INSTRUMENTS Incorporated. 



203 



Transistor Circuit Analysis 



TABLE A. 2 JEDEC registered electrical characteristics at 25 C free-air temperature (unless otherwise noted). 



PARAMETER 


TEST CONDITIONS 


2N929 


2N930 


UNIT 


MIN 


MAX 


MIN 


MAX 


BVceo Collector-Emitter Breakdown Voltage 


lc = 10 ma, l B = 0, (See Note 1) 


45 




45 




V 


BVebo Emitter-Base Breakdown Voltage 


l E = 10 no l c = 


5 




5 




V 


Icbo Collector Cutoff Current 


Vcb = 45 v, l E = 




10 




10 


na 


Ices Collector Cutoff Current (See Note 2) 


V CE = 45v, V K = 




10 




10 


na 


Vce = 45 v, V M = 0, J A = 170°C 




10 




10 


/na 


Iceo Collector Cutoff Current 


Vce = 5 v, 1, = 




2 




2 


na 


Iebo Emitter Cutoff Current 


Veb = 5 v, lc = 




10 




10 


na 


h F E Static Forward Current Transfer Ratio 


V CE = 5 v, l c = 10 /to 


40 


120 


100 


300 




Vce = 5 v, lc = 10 fia, T A •= — 55°C 


10 




20 






V C e = 5 v, l c = 500 jiia 


60 




150 






Vce = 5 V, l c = 10 ma, (See Note 1) 




350 




600 




Vbe Base-Emitter Voltage 


Ib = 0.5 ma, l c = 10 ma, (See Note 1) 


0.6 


1.0 


0.6 


1.0 


V 


VcE|i.t] Collector-Emitter Saturation Voltage 


l B = 0.5 ma, l c = 10 ma, (See Note 1) 




1.0 




1.0 


V 


. Small-Signal Common-Base 
ib Input Impedance 


V C b — 5 v, l E = — 1 ma, f = 1 kc 


25 


32 


25 


32 


ohm 


Small-Signal Common-Base 
rb Reverse Voltage Transfer Ratio 


V C b = 5 v, l E = — 1 ma, f = 1 kc 





6.0 x 

io- 4 





6.0 x 

io- 4 




Small-Signal Common-Base 
n ° b Output Admittance 


Vcb = 5 v, l E = -l ma, f = 1 kc 





1.0 





1.0 


jLtmho 


Small-Signal Common-Emitter 
f * Forward Current Transfer Ratio 


V C e = 5 v, l c = 1 ma, f = 1 kc 


60 


350 


150 


600 




1 1 Small-Signal Common-Emitter 
1 '*' Forward Current Transfer Ratio 


Vce = 5 v, l c = 500 (jua, f = 30 mc 


1.0 




1.0 






- Common-Base Open-Circuit 
ob Output Capacitance 


Vcb = 5 v, l E = 0, f = 1 mc 




8 




8 


pf 



These parameters must be measured using pulse techniques, PW = 300 /xsec. Duty Cycle < 2%. 
'cES ma y k e usec ' ' n pl°ce of IpRO ^ or c ' rcu it stability calculations. 



TABLE A. 3 JEDEC registered operating characteristics at 25 C free-air temperature. 



PARAMETER 


TEST CONDITIONS 


2N929 


2N930 


UNIT 


MAX 


MAX 


NF Average Noise Figure 


Vce = 5 v, I c = 10 jiia, R s = 10 kil 
Noise Bandwidth 10 cps to 15.7 kc 


4.0 


3.0 


db 



204 



Transistor Characteristics 



A. la Typical Characteristics 



Z 1000 



S 

E 
£ 
o 
U 



100 



10 





ilium 




tttt — 


"A/ 


aximum 


i,. 


~~H 






Vfct =5v 


















•a 




1 1 




f = 


kc 




ii 


1 








T 1 










vtf< 




A„ 
















1 V 




















y# 


en i 


c 
















T 1 
















^ 
















" a 


- 


• *\ 


* . 




*-^ 












1 1 




















1 1 








\K 


L 








TJ 












T\ w 


inimum h fe 
Ta = 25°C 
















01 
















































1 





0.01 0.1 1.0 10 

lc — Collector Current — ma 



100 



Fig. A.2 2N929 transistor: small-signal common- 
emitter forward current transfer ratio vs. collector 
current. 



Z. 1000 



u 
■a 
a 
I 



£ ioo 



E 
E 
o 



10 
0.01 





. 






_ »i 






~T 




TTTT1 


\ Ci - J V 

f '= 1 kc 


lot J, =2.s°r I 


2-T 


a=125°C 




T 




T 


1 1 II 


Tm 




^j* — <- 








_.. -v., 


= 75° 


c 5— 

















i 






































Ta=25°C 








Vjjf 


C 
















^"^C^C . 
















..I. 




\ 


► 


1 
















f 










' ' 1 






t 












at T A = 25°C 
























■ [ 


















1 























































0.1 



1.0 10 

Collector Current — ma 



100 



Fig. A. 3 2N930 transistor: small-signal common- 
emitter forward current transfer ratio vs. collector 
current. 



-§10,000 

I 



ft 

E 



1000 



_ 100 





I 



10 























































y.. 


= 5 
= 1 






V- 


















v\ 




















^ 


s- 


















— 






























- 125°C 
= 25°C 
= -55°C 


















,.''' 
















■" 
















' ^ U 






















Maximum 
at T A = 25 


K 
















"C 
















































II Minimum hj b / 

l|atT A =25°C 


' ^V» 









1.0 



•0.01 



•0.1 



1.0 



-10 



l E — Emitter Current — ma 



Fig. A. 4 2N929 and 2N930 transistors: small- 
signal common-base input impedance vs. 
emitter current. 



E 

TJ 
< 



J 0.1 



E 
E 
o 
U 



!°-°-l, 



















" ' rzr 






















^ Ma 








































--- at T 


A -25°C --; 


V - "i 


















V CB J 
f - ' 


kc 














































































































































































































X 


n*~ 


-55"C ---- 


















•-i- 


25°C 
125°C 























01 



-0.1 -1.0 

, — Emitter Current — ma 



-1 



Fig. A. 5 2N929 and 2N930 transistors: small- 
signal common-base output admittance vs. 
emitter current. 



205 



Transistor Circuit Analysis 



* ]Q : 



o 

> 



E 
E 
o 
U 



I0" 4 









1 








.. 1 1 Ml 
















Ma> 


imum h rb 
















atT 


» = 25°C 


V c .=5v 










"JO 






f 




ke 


























































T* 


= 12 


5°C 






















T* 


= 25 

= -5 


'C 
5°C 















-0.01 



-0.1 -1.0 

L — Emitter Current — ma 



-10 



Fig. A. 6 Small-signal common-base reverse voltage 
transfer ratio vs. emitter current. 



U 



E 
E 
o 
U 



30 
20 

10 

7 

5 
4 

3 
2 









































f 


= 30 mc 
= 25°C 




















































































V CE = iuv 






































































V r[ = 5 


V 






















































































































Minimum 
•atV CE =5 

1 1 


h 

V 


-I 

1 













1.0 10 

l c — Collector Current — ma 



100 



Fig. A. 7 Small-signal common-emitter forward cur- 
rent transfer ratio vs. collector current. 



16 



12 



I 































v CE 


= 5 


V 


















""' No 
10c 
Ta 


se Bandwic 
ps to 15.7 
= 25°C 


Jth 

kc 














































? 


6 


/ 








k Max 

', atl 


imum rsr 

c = 10 pa 


// 












2 


N 


?30- 


,' \ 


<? 


#' 






















;; \c 


«\ 


J 1 





10 



-o 
I 



o 6 



& 
I 
52 



0.1 1.0 10 

R G — Generator Resistance — k fl 

Fig. A. 8 Average noise figure vs. generator 
resistance. 





















Mil 

V CE ' 5 v 


























l c = 1 ma 
T A = 25°C 




































A 


i 


\ 












/ 
















k 








































































































NF 




p 


) vs 


f 















































100 



1.0 



10 

f - 



100 
Frequency — mc 



1.0 



0.8 



0.6 s 



O 
0.4 E 



O 
0.2 L 



1000 



Fig. A. 9 Optimum spot noise figure and optimum 
generator resistance vs. frequency. 



206 



Transistor Characteristics 



I 



c 

s 

u 

L. 

£ 

u 
_• 

"o 
o 




15 30 45 60 

V ce —Collector-Emitter Voltage — v 

Fig. A. 10 2N929 transistor: common-emitter 
collector characteristics. 



75 



e 

3 

u 

Lb 

£ 
o 
_e 

3 



10 



8 - 



j 


^ *tt 






— «i-^ — i — . — 

^•Minimum BV cco 


<-**i< 








T A =25°C 






•^"^ 




























.rUS^ 
















\» - 


















v 


= o.oi 


ma 




































1 ,,= 


= 0.005 ma 






















r l r° 













15 30 45 60 

V CE — Collector-Emitter Voltage — v 

Fig. A. 11 2N930 transistor: common-emitter 
collector characteristics. 



75 



1000 



_o 

J? 



c 

E 

3 

u 

-D 

I 
O 



100 



10 
0.001 



— 1 








~"tf 




























TT 




























It 




















































































II 














* 


N 








•u 


^ 
























,' *Ai 


!* 1 








-ji 






























































































c 
























1>V 
























ill 




















































V CE =5v 
See Note 6 



















1000 



0.01 



0.1 



1.0 



10 



100 



l c — Collector Current — ma 



Fig. A. 12 2N929 transistor: static forward current 

transfer ratio vs. collector current. Note that these 

parameters were measured using pulse techniques, 

PW = 300 /isec, Duty Cycle < 2%. 



•8 



i 

3 

u 

"2 

a 

i 

£ 



100 



10 
0.001 











" T 


in 


























T 


in 


























T 


III 


























T 


111 


























t 


•c 


























-A?E 




















^•*"Zc°C^ 
























■\> 






















1 
























































i-c 


















































■u 


*-* 
























1 












































































































V CE =5v 
See Note 6 



















0.01 0.1 1.0 

l r — Collector Current — ma 



10 



100 



Fig. A. 13 2N 930 transistor: static forward current 

transfer ratio vs. collector current. Note that these 

parameters were measured using pulse techniques, 

PW = 300 ptsec, Duty Cycle < 2%. 



207 



Transistor Circuit Analysis 



1.2 



1.0 



J 1 0.8 

"o 
> 



.? 0.6 

E 



0.4 



























V^ Maximum, V, f at 

l,= 0.5ma, l c = 10ma 

i 1 




?: 






^5 


4* 

»o ■ 






*H 


S 


> ^^ 




f<^ 






V ce =5v, l c = 100,ja-^ 
Vce = 5v , l c = 1 ma 












1 
See Note 6 

1 















0.2 



-75 -50 -25 25 50 75 100 125 150 
T A — Free-Air Temperature — °C 

Fig. A. 14 2N929 transistor: base-emitter voltage 
vs. free-air temperature. 



1.2 



1.0 



8.0.8 
o 

~o 

> 

I 0.6 



0.4 



0.2 



























>*, Maximum V lE 
1, =0.5ma,l c 


at 

= 10 ma 










^ 
^ 


0.5 ' 


'0- 






*, 


* 


^ 


"a 


^ 










v CE 


= 5v, l c = 100 ya ■ 










See Note 6 

1 















-75 -50 -25 25 50 75 100 125 19 
T A — Free-Air Temperature — °C 

Fig. A. 15 2N930 transistor: base-emitter voltage 
vs. free-ai r temperature. 



10 



« 

O) 

o 



E 



1.0 



£ 0.1 



o 
U 



0.01 




































































































* 


c 


Maximum V c 
, =0.5 ma, 

1 1 


I.01) a * 
lc - 1 


D ma 










.Sma.lc'J^. 












In ~ c 
















































, =0.05 mo 

u — u^T 


— in ■ 


) ma 


OM° 


















1 = 1 \ia, \ c ■- r- 






























































See Note 6 

1 















10 



-75 -50 -25 25 50 75 100 125 150 
T A — Free- Air Temperature — °C 

Fig. A. 16 2N929 transistor: collector-emitter satu- 
ration voltage vs. free-air temperature. Note that 
these parameters were measured using pulse tech- 
niques, PW = 300 ^tsec, Duty Cycle < 2%. 



1.0 



2 

2 




E 
£ 0.1 



o 
U 



0.01 





















































































































^__ Maximum V ce( , oi1 at 
.{ Ib = 0.5ma,lc = 10 ma 








* 
























































. 














^ 


.5 ««■'■•"' — 1 




































u=o 


ns mo. >c° 


1 ma 








1 = ' 


..n. \r = 100 ua 












1, _ , — , - 














1, - 0.5 pa, l c - 10 pa 






















See Note 6 













-75 -50 -25 25 50 75 100 125 15 
T A — Free-Air Temperature — °C 

Fig. A. 17 2N930 transistor: collector-emitter satu- 
ration voltage vs. free-air temperature. Note that 
these parameters were measured using pulse tech- 
niques, PW = 300^sec, Duty Cycle < 2%. 



208 



Transistor Characteristics 



A.2 Types 2N1 1 62 thru 2N1 1 67 Transistors* 

TABLE A.4 Electrical characteristics, general. (At case temperature of 25°C± 3° except where noted.) 



Characteristic 


Symbol 


Mil 


Typ 


Max 


Ulit 


Collector Cutoff Current 

Vcb = BVcbo (max), I B = 

Vcb = 2V, I E = 

Vcb = 15V, In = 0, T c = 90°C (2N1 162, 2N1 163) 

Vcb = 30V, Ik = 0, T r = 90°C (2N1 164 through 2N1 167) 


IcBO 


— 


3 

125 

10 

10 


15 

225 

20 

20 


ffiA 

*•* 
mA 
mA 


Collector-Emitter Breakdown Voltage 

Ic = 500mA, V SB = (2N1162, 2N1163) 

(2N1164, 2N1165) 
(2N1166,2N1167) 


BVcsa 


35 
60 
75 


— 


— 


Vdc 
Vdc 
Vdc 


Emitter Cutoff Current 
V BE = 12V,Ic = 


Iebo 


— 


0.5 


1.2 


mA 


Collector - Emitter Saturation Voltage 
Ic = 25A,I B =1.6A 


Vce(sat) 


— 


0.3 


1.0 


Vdc 


Base - Emitter Drive Voltage (at Saturation) 
Ic = 25A,I B =1.6A 


Vbe 


— 


0.7 


1.7 


Vdc 



TABLE A. 5 Electrical characteristics, common emitter. 



Characteristic 


Symbol 


Min 


Typ 


Max 


Unit 


DC Forward Current Gain 
Vce = 2V, Ic = 5A 
Vce = IV, Ic = 25A 


llFB 


15 


65 
25 


125 
65 


— 


Frequency Cutoff 

Vce = -2V, Ic = 2A 


f.. 


- 


4 


- 


kc 



30 



25 



20 



15 



=i 10 









1 4 


1 

1 ° 












1 


.6 










1.0 




















0.8 


















06 








































0.4 






































Ib 


= 0.2 


AMP 



















































































i 0.2 0.4 0.6 0.8 

V CB , COLLECTOR- EMITTER VOLTAGE (VOLTS) 

Fig. A. 18 Saturation region, common emitter 
(constant base current). 



1.0 



30 



25 



S. 20 



15 



3 10 



























; 


• i<i 






















. ( 


18- 














































. 0.6 






















,.0.4 
















































Ib 


= 0. 


2 AMP 






















1 






















*°- 


1 












t — 




















> 




















Vbb = 

r— 1 


r— 



25 50 75 100 125 150 

BVces, %RATED MAXIMUM COLLECTOR- EM ITTER VOLTAGE (VOLTS) 

Fig. A. 19 Collector characteristics, common emitter. 



* MOTOROLA Inc., Semiconductor Products Division. 



209 



Transistor Circuit Analysis 



25 



s? 20 - 



s 



5 15 



a io 









/ 


V 


i 

, +25-C 












_50°C 






f 






\ +75-C 










/ 


/ 
f y 






















''A 






















A 


y 






























V CE = 2 VOLTS 

CASE TEMPERATURE °C 





































































































25 



20 



s 
£ 15 



£ 10 



0.4 0.6 1.2 1.6 2.0 

l B , BASE CURRENT (AMPERES) 

Fig. A. 20 Collector current vs. base current. 





























V CE = 2V0LTS 

CAS F TFMPrPlTIID 


: or . 






$ 
















/ 

// 
















+7 


5»C- 




/ 


'/ 






















/ 


L 


-50»C 
















// 


















y+25'C 


/ 




















V 




















J 


















S 

















2.4 



0.2 0.4 0.6 0.8 1.0 1.; 

V 8E , BASE-EMITTER VOLTAGE (VOLTS) 

Fig. A. 21 Output current vs. emitter-drive voltage. 



100 



140 
120 
100 
80 
60 
40 
20 










































































lc = 
































= 1V 
= 25A 





















































































































—60 —40 



-20 



20 40 

T c , CASE TEMPERATURE («C) 
Fig. A. 22 hpp vs. temperature. 



60 



80 



100 



ff 10 



1.0 



o 

o 
-° 0.1 



0.01 

























































»CB — VZOTCES 


















































































































































— 


— 














































2N1] 


62- 


2N1 


67 





































































































20 40 60 80 100 

T c , CASE TEMPERATURE CC) 
Fig. A. 23 \qq vs. temperature. 



210 



Transistor Characteristics 



75 

50 

25 



25 

50 

75 
-60 







































- 25 AMP. j 














5 AMP 










































































Vce = 2V 






























1 



















-40 -20 20 40 

T c , CASE TEMPERATURE (°C) 

Fig. A. 24 gpj: vs. temperature. 



60 



80 



100 



A. 2a Peak Power Derating 



The peak allowable power is: 

p (Tj — Ta — fljA Pss) 

e,c (i) + * CA(t,/t) 

Cp is a coefficient of power as obtained from the chart. Tj is 
junction temperature in °C; T A is ambient temperature in °C; 
9ic is junction to case thermal resistance in °C/W; C a is case 
to ambient thermal resistance in °C/W; 0ja is the sum of 
0jr + »ca; ti is pulse width; t is the pulse period; (t,/t) is the 
duty cycle; Pss is a constant power dissipation and Pp is 
the additional allowable pulse power dissipation above the 
amount of Pss. 

The above equation is usable when a heat sink is used which 
has thermal capacity very much larger than the transistors 
thermal capacity. 

The chart is normalized with respect to the thermal time con- 
stant, which is on the order of 50 milliseconds for these power 
transistors. (Fig. A. 25.) 



t.- 



Mt 




„i time — ► 



EXAMPLE 

Given: 

Pss = 10W Ta = 40°C 

Pulse width (ti) = 1 msec 

Duty Cycle = 20% 

»ca = 3°C/W 

9 JC = 0.8°C/W T Jm .,= 100°C r *« 

Solution: Enter the graph at U/r = 1 msec/50msec, and 

Duty Cycle 20%. Find Cp = 5. Solve equation 
_ 100-40- (3 + 0.8) 10 

Pp - 08_+ 3 x 0.2 

5 

P P = 29 watts in addition to the steady 
10 watts resulting in 39 watts peak. 



Zi 



1000 



0.1% 



100 



10 



^0. 


\% 






— 


% DUTY 


CY( 


:l: 








































"ABSOLUlt IMUNKtCUKKtNT 






0. 


5% 
% 
























1 



















































2"/o 














































1 






















DUTY CYCLE 






















5% 




















| 1 
10% 






















* 


'1)7 


3 
















































bU% 






















1 1 
100% 























io-* io-» io-» 10- 1 1 10 

Vr, PULSE WIDTH / THERMAL TIME CONSTANT 
Fig. A.25 Normalized peak allowable power. 



211 



Transistor Circuit Analysis 

A.3 Types 2N1302, 2N1304, 2N1306, and 2N1308 
n-p-n Alloy-Junction Germanium Transistors* 





Table A 


.6 JEDEC 


registered electrical c 


naracteristics 


at 25 


C free -air tem 


perature. 








PARAMETER 


TEST 


CONDITIONS 




2N1302 


2N1304 


2N1306 


2N1308 


UNIT 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


BV CBO 


Collector-Base 
Breakdown Voltage 


l E = 100 jua, 


l E = 


25 


- 


- 


25 


- 


- 


25 


- 


- 


25 


- 


- 


V 


BV EBO 


Emitter- Bast 
Breakdown Voltage 


l E = 100 pa, 


l c =0 


25 


- 


- 


25 


- 


- 


25 


- 


- 


25 


- 


- 


V 


*V PT 


Punch Through Voltaget 


Veb<i = ' » 


25 


- 


- 


20 


- 


- 


15 


- 


- 


15 


- 


— 


V 


*'cBO 


Collector Cutoff Current 


V CB = 25v. 


l E = 


- 


3 


6 


- 


3 


6 


- 


3 


6 


- 


3 


6 


t"> 


'E80 


Emitter Cutoff Current 


V EB = 25v, 


l c = 


- 


2 


i 


- 


2 


6 


- 


2 


6 


— 


2 


6 


IM 


%E 


Static Forward Current 
Transfer Ratio 


V CE = ' ». 


l c = 10 ma 


20 


100 


- 


40 


115 


200 


60 


130 


300 


to 


160 


- 


— 


V CE = 0.35v, 


l c = 200 ma 


10 


100 


- 


15 


no 


- 


20 


125 


- 


20 


140 


— 


— 


*v K 


Base-Emitter Voltage 


1, = 0.5 ma, 


l c =z 10 ma 


0.15 


0.22 


0.40 


0.15 


0.22 


0.35 


0.15 


0.22 


0.35 


0.15 


0.22 


0.35 


V 


* V CE|wt 


Collector-Emitter 
Saturation Voltage 


l B = 0.5 ma. 


l c = 10 ma 


- 


0.07 


0.20 


- 


- 


- 


- 


- 


- 


- 


- 


— 


V 


l B = 0.25 ma, 


l c = 10 ma 


- 


- 


- 


- 


0.07' 


0.20 


- 


- 


- 


- 


- 


— 


V 


l B — 0.17 ma, 


\q = 10 ma 


- 


- 


- 


- 


- 


- 


- 


0.07 


0.20 


- 


— 


— 


V 


l B = 0.13 ma, 


l c== 10ma 


- 


- 


- 


- 


- 


- 


- 


- 


— 


— 


0.07 


0.20 


V 


"ib 


Small-Signal Common-Base 
Input Impedance 


V CB = 5v, 
f = Ike 


l E = — I ma 


- 


21 


- 


- 


20 


- 


- 


28 


- 


- 


28 


- 


ohm 


•Vb 


Small-Signal Common-Base 
Reverse Voltage 
Transfer Ratio 


V CB = 5», 
1= Ike 


l E — — 1 ma 


- 


5 

xlO" 4 


- 


- 


5 
x 10-+ 


- 


- 


5 

il0-« 


- 


- 


5 

x 10-* 


- 


- 


h ob 


Small-Signal. Common-Base 
Output Admittance 


V CB = 5«, 
f = lkt 


l E = — 1 ma 


- 


0.34 


- 


- 


0.34 


- 


— 


0.34 


— 


— 


0.34 


_ 


fimho 


K 


Small-Signal Common-Emitter 
Forward Current 
Transfer Ratio 


V CE = 5v, 
f = lkc 


l c = 1 ma 


- 


105 


- 


- 


120 


- 


- 


135 


- 


- 


170 


- 


- 


* f hfb 


Common-Base Alpha- 
Cutoff Frequency 


V CB = 5v, 


l E = — 1 ma 


3 


12 


- 


5 


14 


- 


10 


16 


- 


IS 


20 


- 


mc 


*<ob 


Common-Base Open Circuit 
Output Capacitance 


V CB =5». 

f = 1 mc 


l E = 


- 


14 


20 


- 


14 


20 


- 


14 


20 


- 


14 


20 


Pf 


c ib 


Common-Base Open-Circuit 
Input Capacitance 


»E5=5«. 
f = lmc 


i c = 


" 


13 


- 




" 


- 


- 


13 


- 


- 


13 


- 


Pi 



tV pT is determined by measuring the emitter-base floating potential V EB(| The collector-base voltage, V rl/ Is Increased until V„„ = 1 volt- this value of 
»C. = (»PT + 1 v). 





Table A 


7 JEDEC registered switching characteristics at 25°C free-air 


temperature. 








PARAMETER 


TEST CONDITIONSft 


2N1302 


2N1304 


2N1306 


2N1308 


UNIT 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


+d 


Delay Time 


l c = 10 mo, Ijjh = 1.3 ma 
!„,,= 0.7 ma, V^ (offl _ 0.8 v 
\ — 1 k fi (See Fig. 1) 


- 


0.07 


- 


- 


0.07 


- 


- 


0.06 


- 


- 


0.06 


- 


/tsec 


+r 


Rise Time 


- 


0.20 


- 


- 


0.20 


- 


- 


0.18 


- 


- 


0.15 


- 


fliW 


+. 


Storage Time 


- 


0.70 


- 


- 


0.70 


- 


- 


0.64 


- 


- 


0.64 


— 


jusec 


*f 


Fall Time 


- 


0.40 


- 


- 


0.40 


- 


- 


0.36 


- 


— 


0.34 


— 


fiiK 


Q,b 


Stored Base Charge 


'Bill = ' m °< 'c = " mo I s " Fi 9- *) 


- 


800 


- 


- 


760 


- 


- 


720 


- 


- 


680 


- 


peb 



tt/Vollage and current values shown are nominal; exact values vary slightly with device parameters. 

TABLE A. 8 JEDEC registered operating characteristics at 25°C free-air temperature. 



PARAMETER 


TEST CONDITIONS 


2N1302 


2N1304 


2N1306 


2N1308 


UNIT 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


NF Spot Noise Figure 


V CB = 5, 

l E = - 1 ma 

f = 1 kc, R s = 1 k n 


- 


4 


- 


- 


4 


- 


- 


3 


- 


- 


3 


- 


db 



'Indicates JEDEC registered data (typical values excluded). 
TEXAS INSTRUMENTS Incorporated. 



212 



Transistor Characteristics 



A. 3a Typical Characteristics 




12 3 4 5 

V CE — Collector-Emitter Voltage — v 

Fig. A. 26 2N 1302 transistor. 




12 3 4 5 

Vce — Col lector- Emitter Voltage — v 

Fig. A. 28 2N1306 transistor. 



"1.4 



I 

.21. 
o 



si- 

2 

I— 

fo. 

3 
<J 

£ 
.so. 

a 



80.2 



o 

z 



t a =: 


25° 


c 
































N 




E 


Iv 


s 


A 


£ 








F 


NP 










4 


t^ 














V v 




















V c 


= 0.35v 


















\z 


CE = 


= -0.35v 





















1 10 100 

Mc I ~ Collector Current — ma 

Fig. A. 30 Normalized static forward current 
transfer ratio vs. collector current. 



1000 



50 



E40 



t 30 

3 

u 

o 

J 20 

"o 
U 

I 10 





-. 


/J5*£- 








T A = 25°C 




o^S- 














1 \»2. 
















Jg^rn 












r 


\[= 0.20mo_ 
















.= 0.15ma 




























l«= O.lOma 












- 1 1 """ 










1 1 
l,= 0.05ma 
















T- 
l»= 















12 3 4 

V CE — Collector-Emitter Voltage - 

Fig. A.27 2N1304 transistor. 



50 



40 



t 30 
u 

| 20 

"5 
U 

1.10 







■N OS 


ma 








T A = 25°C 


WJJt^r 














\.= °^&- 
































u^J^p- 










r 




















|.= 0.1 jma 










— 




-l B = 0.05 ma 













E 




1 














f 




1.7 















12 3 4 5 

V ce — Collector- Emitter Voltage — v 

Fig. A. 29 2N 1308 transistor. 




-60 -40 -20 20 40 60 

T A — Free-Air Temperature — °C 

Fig. A. 3 1 Normalized static forward current 
transfer ratio vs. free-air temperature. 



213 



Transistor Circuit Analysis 



0.7 



0.6 



I 

£.0.5 



0.4 



0.3 



I 



0.2 



0.1 



Ta = 


25° 


C 


























o!^ 1 / 


















^ 






























-0. 
0. 


5J° . 



















































1 10 100 1000 

Nc — Collector Current — ma 

Fig. A. 32 Base-emitter voltage vs. collector current. 




-60 -40 -20 20 40 60 8C 

T A — Free -Air Temperature — °C 

Fig. A. 33 Base-emitter voltage vs. free-air temperature, 



> 0.35 



1 



0.30 



0.25 



0.20 



£ 
1 
k 0.15 



o 

U 



0.10 



0.05 



T A 


= 25 


°( 




























It 

fe 


■ J 


* 
















"-I 




V 


a. 




















Lb' 

7" 


















It 

II * 


/J 












.- C 


.a 


"*> 


Vti_«d 


\0 




P 








tr* 


§3 


m 


o ' 

















0.35 



10 



100 



1000 



ll c I —Collector Current — ma 

Fig. A. 34 Collector-emitter saturation voltage 
vs. collector current. 



o 
> 



0.30 



.2 0.25 



<* 0.20 



E 



0.15 



q 0.10 



0.05 























?* 

D «^ 


tf >^ 








\0«*^ 










\»^ 


^=J0 


ma, *c* 


200 ma 


, NPN 
















l,= -0.5ma, l c = -lOma, PNP 

1 | 1 | 


== 


- 


l t = 0.5ma, l c = lOma, NPN 

















-60 -40 -20 20 40 60 8C 

T A — Free-Air Temperature — °C 

Fig. A. 35 Collector-emitter saturation voltage 
vs. free-air temperature. 



214 



Trans is tor Character is t ics 



100 



8: 
o 

O 

o 

3 
I 



10 























































































































X 




/& 












X x.k 






















.^ .-^ 












^ 


J&<*-i 
























' /$ 












y/V 







































20 30 40 50 60 70 

Ta — Free-Air Temperature — °C 

Fig. A. 36 Collector cutoff current vs. free-air 
temperature. 



80 



I 

« 



8. 

o 
U 

i 
3 



s 



o 

E 
E 

6 



o 



28 



24 



20 



Z 16 



12 



































T»=25 ,, C 
f = 1 mc 
.1,-0 










































































































































Nt^l 


















/ 


"NP 





















































































012 34567 89 
|V C ,| — Collector-Base Voltage — v 

Fig. A. 37 Common-base open-circuit output 
capacitance vs. collector-base voltage. 



10 



0.35 
0.30 



£ 



* 0.25 



- 0.20 



£ 



o 



0.15 



0.10 



1 0.05 



V 


■25 


•c 






















fc 


' 


































4 

<0 


7/* 

Lb' 

/* 

£.« 

I 


i 












II 
II " 












>'* 


{fa 


in *' 


\0 




$' 






& 




«*>' 















10 



100 



1000 



Fig. A. 38 Collector-emitter saturation voltage 
vs. collector current. 



0.35 



J> 0.30 

"5 
> 

.2 0.25 

1 
2 
<2 0.20 

| 

I 0.15 
£ 



3 °-'° 

J. 
I 0.05 

_^ 



























tf y/ 








\0«**^ 












1,-10 


mo. *c* 


200 m° 


, NPN 
















l,= -0.5ma, l c = -I0ma, PNP 

| | | | 




' 


l,= 0.5ma, l c » lOma, NPN 



















-60 -40 -20 20 40 60 80 

T A — Free-Air Temperature — °C 

Fig. A. 39 Collector-emitter saturation voltage 
vs. free-air temperature. 



215 



Transistor Circuit Analysis 



A.4 Types 2N1 529A thru 2N1 532A, 2N1 534A thru 2N1 537A 
and 2N1529 thru 2N1538 Transistors* 

TABLE A. 9 Electrical characteristics. (At 25°C case temperature unless otherwise specified.) AQL and inspectio 
levels apply to "MEG-A-LIFE" series (2N1529A thru 2N1532A and 2N1534A thru 2N1537A) only. 
Thermal resistance, 0J(;!4 0.6°C/W typical, 0.8°C/W maximum. 



Panneter 


Symbol 




■ 1 Mia 


Mix 


Unit 


Collector-Base Cutoff Current 

(V CB = 25V) 2N1529A, 2N1534A* 
(V CB = 40V) 2N1530A, 2N1535A* 
(V CB = 55V) 2N1531A, 2N1536A* 
(V CB = 65V) 2N1532A, 2N1537A* 
(V CB = 80V) 2N1533, 2N1538 


^BOl 


■ I 


2.0 
2.0 
2.0 
2.0 
2.0 


mA 


Collector-Base Cutoff Current 

(VCB = 2V) All Types 
(V CB = 1/2 BV CES rating; All Types 
Tc = +90° C) 


ICBO 


■ 


0.2 
20 


mA 


Emitter-Base Cutoff Current 

(V EB = 12V) All Types 


lEBO 


1 


0.5 


mA 


Collector-Emitter Breakdown Voltage 
(Ic = 500 mA, V EB = 0) 

2N1529A, 2N1534A* 
2N1530A, 2N1535A* 
2N1531A, 2N1536A* 
2N1532A, 2N1537A* 
2N1533, 2N1538 


BVCES 




■ 

■■■■■■■■■■ 


- 


volts 


Collector-Emitter Leakage Current 
(V BE = IV; V CE @ rated BV C BO) 

All Types 


J CEX 


■■■■■■■■■l L^hVAVAbIbVi 


20 


mA 


Collector-Emitter Breakdown Voltage 
(I c = 500 mA, I B = 0) 

2N1529A, 2N1534A* 
2N1530A, 2N1535A* 
2N1531A, 2N1536A* 
2N1532A, 2N1537A* 
2N1533, 2N1538 


BVcEO 




■ 

■ 


- 


volts 


Collector-Base Breakdown Voltage 
(IC = 20 mA) 

2N15.29A, 2N1534A* 
2N1530A, 2N1535A* 
2N1531A, 2N1536A* 
2N1532A, 2N1537A* 
2N1533, 2N1538 


BV CB0 




■ 100 

■ 120 


- 


volts 


Current-Gain 

(V CE = 2V, I C - 3A) 

2N1529A - 2N1532A 
2N1534A - 2N1537A 
2N1529 - 2N1533 
2N1534 - 2N1538 


h FEl 




■ 
■ 
■ 


40 
70 
40 
70 




Base-Emitter Drive Voltage 
(I c = 3A, I B = 300 mA) 

2N1529A - 2N1532A 
2N1534A - 2N1537A 
2N1529 - 2N1533 
2N1534 - 2N1538 


V BE 




^^^^^^^^^B 


1.7 
1.5 
1.7 
1.5 


volts 


Collector Saturation Voltage 
(IC = 3A, I B = 300 mA) 

2N1529A - 2N1532A 
2N1534A - 2N1537A 
2N1529 - 2N1533 
2N1534 - 2N1538 


v CE(sat) 




1 


1.5 
1.2 
1.5 
1.2 


volts 


Transconductance 
(V CE = 2V, I C = 3A) 

2N1529A - 2N1532A 
2N1534A - 2N1537A 
2N1529 - 2N1533 
2N1534 - 2N1538 


SFE 




1 

■ 


- 


mhos 



* Characteristics apply also to corresponding, non-A type numbers 

** Each parameter of the "MEG-A-LIFE" series only is guaranteed to an individual AQL of 0. 

MOTOROLA Inc., Semiconductor Products Division. 



inspection level n 



216 



Transistor Characteristics 



Fig. A.40 Power-temperature derating curve. 
The maximum continuous power is related to 
maximum junction temperature, by the thermal 
resistance factor. For d-c or frequencies be- 
low 25 cps the transistor must be operated 
within the constant Pj = V c X l c hyperbolic 
curve. This curve has a value of 90 watts at 
case temperatures of 25 C and is watts at 
100 C with a linear relation between the two 
temperatures such that allowable 
p 100°- T c 

0.8 




20 40 60 80 

T c , CASE TEMPERATURE (°C) 



100 



A.4a Collector Characteristics at 25°C: Types 2N1529A 
thru2N1532A and 2N1529 thru 2N1533 Transistors 



r 3 



S 2 







500 "■ 4rm, 


^^300^--^ 
200 








100 








50 








20 














l,= 10 mA 











0.5 1 1.5 

Vce, COLLECTOR-EMITTER VOLTAGE (VOLTS) 

Fig. A. 41 Saturation region, common emitter, 
constant base current. 



2.0 




50 100 150 

V CE , % RATED MAXIMUM COLLECTOR-EMITTER VOLTAGE 

Fig. A. 42 Collector characteristics, common 
emitter. 



fc 3 



3 2 



500 / 


300/ 200 \yS 




100 
















50 














20 














1, = 10 mA 









4 


- — 150 

f 100 








ST 
a. 










LU 

ac 


. 50 








^ 2 

o 
o 






1, = 10 mA 


) 


1 


< 










s » 





f 




— ' 



0.5 1 1.5 

V CE , COLLECTOR-EMITTER VOLTAGE (VOLTS) 

Fig. A. 43 Saturation region, common emitter, 
constant base current. 



50 100 150 

V cs , % RATED MAXIMUM COLLECTOR-EMITTER VOLTAGE 

Fig. A. 44 Collector characteri sti cs, common 
emitter. 



217 



Zo =50$) 
1 i 

I j 
20 V I — i 

PULSE GENERATOR 



Transistor Circuit Analysis 



0.5 M f 



TEST TRANSISTOR 




Fig. A.45 Switching time measuring circuit. 
Also see Table A. 10. 



Table A.10 See Fig. A.45. 





Ic 
(Amps) 


V 
(Volts) 


Ion 

(mA) 


R 
(ohms) 


td+t, 
(yusec) 


t. 
(/*sec) 


t, 
(/<sec) 


2N1529A-32A 
2N1529-33 


3 


3 


300 


65 


10 


2 


5 


2N1534A-37A 
2N1S34-38 


3 


3 


200 


100 


8 


3 


5 




0.05 



0.10 0.15 0.20 

I* BASE CURRENT (AMPS) 



0.25 



0.30 



Fig. A. 46 Collector current vs. base current. 




1.0 2.0 

V«, EMITTER-BASE VOLTAGE (VOLTS) 



Fig. A.47 Collector current vs. emitter base 
voltage. 



150 



125 



: 100 



75 



V 


a = 2 


1 


































































_2N1 
2^ 


534A- 
1534 — 


2N1537 
2N1538 


* 


























2N 


>29A — 
529- 


ZN1532A 
2N1533 















1.0 



2.0 3.0 

Ic, COLLECTOR CURRENT (AMPS) 



4.0 



5.0 



Fig. A.48 D-c current gain vs. collector 
current. 




1.0 2.0 

Vb, emitter-base voltage ivoltsi 

Fig. A. 49 Base current vs. emitter base 
voltage. 



.218 



Transistor Characteristics 



100 



< 10 

E 



1.0 



- 8 0.1 



.01 





















































































V c , = V 2 BV CK 


































































































































































































































ALL TYPES 













































































































































































































































































20 40 60 80 
T c , CASE TEMPERATURE (°C) 

Fig. A. 50 1,-q vs. temperature. 



100 



140 

130 

120 

110 

100 

90 

80 

70 













1 - 


2N1529A-2N1532A 


























-•~--<2ni529-2ni533 


" lc = 3 A 


































"V« = 2 


V 






































2N1534A-2N1537A. 
2N1534-2N1538 







































































































_60 —40 _20 20 
T c> CASE TEMPERATURE (°C) 



40 



60 



80 



100 



Fig. A. 51 hpp vs. temperature. 



CJ 


140 


in 

CM 


130 


i— 


120 


UJ 




=D 


110 


<c 




>■ 


100 


o 


90 


UJ 


80 












10 







| c - 


-1ft 


























| 






V CE = 2V 
















































- 2N1529A-2N1532A 
/ 2N1529-2N1533 












































































N1534A-2N1537A 






























'N15>' 


J4-2f 

L_ 


U53 

1 


3 









_60 —40 —20 20 40 

T Cl CASE TEMPERATURE (°C) 

Fig. A. 52 gpp vs. temperature. 



60 



80 



100 



219 



Transistor Circuit Ajialysis 



A. 4b Determination of Allowable Peak Power 



When a heat sink is used for increased heat transfer and 
greater thermal capacity, the following equation can be used 
to determine the allowable pulse power dissipation, desig- 
nated as Pp. The allowable pulse power plus the steady state 
power, P gg , gives the peak allowable power dissipation. Al- 
lowable pulse power is related by the following equation : 

Tj — T A — 6] a Ps 



Pp = 



fJA r SS 



«,o(l/C P )+0 OA (Vt) 




where 

C P = Coefficient of Power (from peak power 

derating curve) , 
Tj = Junction Temperature (°C), 
T A = Ambient Temperature (°C), 
0j O = Junction-to-Case Thermal Resistance (°C/W), 
CA = Case-to-Ambient Thermal Resistance (°C/W), 

0JA = #JC + 0C A > 

(t x /t) = Duty Cycle = Pulse Width/ Pulse Period, 
P ss = Steady State Power Dissipation, and 
P P = Allowable Pulse Power Dissipation Above P ss . 
T = Thermal Time Constant « 50 msec 

The peak power derating curve is normalized with respect 
to the thermal time constant, T . The following example 
shows the application of this equation in conjunction with 
the peak power derating curve. 

EXAMPLE: 

Given : 

P ss = 10 W, T A = 40°C, tx = 1 msec, 

(ti/t) = 20%, CA = 3°C/W, 6, c = 0.8°C/W, 

T 7 max = 100°C 



Solution : 

Enter the derating graph at tj / T = 1 msec/ 50 msec, and 
duty cycle of 20% . Find C P = 5. Substitute this value and 
the given parameters into the peak pulse power equation. 
This gives P P = 29 watts. Thus the peak allowable power 
is P P + P sg , or 39 watts. 



1000 



0.1% 



100 



10 



0.5 % 






=3 

( 


-H 

%DUTY 


CY 


m 




^ 




= :: 
























"' ABSOLUTE NONRECURRENT 
























T 1 ^ 
1% 






















"".. ?%, 






















1 








































DUTY CYCLl 5% 


















10% 




















2U"}i.- 

— H-- 




















50% 




















1 1 
100% 





















10- 



10-' 



10-' 



io- : 



Vr, PULSE WIDTH / THERMAL TIME CONSTANT 



Fig. A. 53 Pulse power derating curve. Caution: In all 

cases the peak pulse power should stay within the 

Safe Operating Area. 



220 



SUMMARY CHARTS 



B 

APPENDIX 



TABLE 3.1 Conversion from hybrid to hybrid-^ parameters. 



h ie - r bb < 
hie ~ r bb' 



. _ hie ~ r bb' ;y «, 

= h -h 1 + h t' ~ h '° ~ h 
"oe "re = tl oe 

Tce ft i« -Tbb' 



[3.56] 
[3.60] 
[3.61] 
[3.63] 



fen 

'be ♦. I 

i 1!U 



(a) Common-emitter configuration. 




Hybrid 



hie 
Ke 

h„ 



Common- 
base 



ha 



l + *« 



l + A/6 

-hfb 
1 + Afb 

h b 



h,b 



1+A 



/b 



Common- 
collector 



1-h, 



-d + A/c) 



Tee- 
equivalent 





r e 


r b + 


1-a 




«•. 


(1- 


-a)r c 




a 


1 


- a 




1 



(1 - a)r c 



(c) Approximate parameter conversion formulae. 



(b) Hybrid equivalent circuit. 



hi, = 2200 fl 

/>,. = 2 x 10-' 

h,e = 290 

h oe = 30 x 10" 6 mhos 

(d) Typical values for type 2N929 transistor 
at J c =4 ma, V CE = 12v. 



Fig. 3.24 Conversion to common-emitter h- parameters. 
* For convenience in reference, the original table numbers have been retained in this Appendix. 



221 



Transistor Circuit Analysis 



v «b V cb 

1 I 1 " . 



(a) Common-base configuration. 




0>) Hybrid equivalent circuit. 



Hybrid 



Common- 
emitter 



ft,. 





1 + ftf. 


h 


.ftoe i. 


1 


+ ft/. 




ft/. 




1 + ft/. 




ftoe 



1 + A 



+ "/. 



Common- 
collector 



ft/c 
ft/c 



ftrc-1 



ft/c ftp 
ft/c 

1 + ft/c 
ft/c 

ftoc 



Tee- 
equivalent 



r. +(l-a)r 6 






(c) Approximate parameter conversion formulae. 



/>,„ = 7.57 Q 

h rb = 0.268 x 10- 4 

/>,„ = -0.996 

h ob = 0.103x10-* mhos 

(d) Typical values for type 2N929 transistor. 



Fig. 3.25 Conversion to common-base h-parameters. 



rCH 



"be 



L 



(a) Common-collector configuration. 



hie Ui+. 




(b) Hybrid equivalent circuit. 



Hybrid 



ft/c 
ftrc 



Common- 
emitter 



ft/. 

l"ftre=l 

-d+ft/e) 

ftoe 



Common- 
base 





h lb 




l + ft/6 


1- 


t h ib h ob 
1 + ft/o 




1 




l + ft/6 




ftob 



s-i 



1 + A 



/& 



Tee- 
equivalent 



r , r « 


° 1 - a 


* e 'Vi 


(l-a)r e 


-1 


1- a 


1 



(l-a)fe 



(c) Approximate parameter conversion formulae. 



h lc = 2200 Q 

h rc = 0.9999^1.0 
ft/ e = - 291 
h oc = 30 x lO" 6 mhos 
(d) Typical values for type 2N929 transistor. 



Fig. 3.26 Conversion to common-collector A-parameters. 



222 



Summary Charts 






EO ^ — f • WV — • — OC 



(a) Tee-equivalent circuit, common-base. 



tH"-** 



bo WV— f— •— WV— • — OC 

l+p 

E 
(b) Tee-equivalent circuit, common-emitter. 



Tee- 
param- 
eter 



r. 



P 



Common- 
emitter 



A/. + 1 



h,.- 



*r.(U*f.) 



Common- 
base 



- */b 



*i» -(! + *»>■?* 



Aft 
A/6 



hi 

h ob 



1 + ft/b 

(c) Approximate parameter conversion 



Common- 
collector 



1 + /. 



/c 



ftoc 



, /■,.(! -ft rc ) 

"fc + 7 

-d+A, e ) 
formulae. 



a =+0.996 
r c = 9.7 Mil 
r e = 6.667 fl 
r„ = 260 ft 

(d) Typical values for type 2N929 transistor. 



Fig. 

Table 



3.27 Conversion to tee-parameters. 
5.1 Single-stage amplifier formulae. 









•l 


A -Z> 


A-parameters 

(Second subscript 
omitted) 


r L * h - 




1 




h, 


-R L *, 




l + h R L 


*l 


[-("- j e)] 


Common-base 
tee-equivalent 

circuit 
(see Fig. 2.31) 


a*A + (i_a)^ 
' i r, ") i r, ' c '' 


a r c + r b 
r ' + r » TT 




K)* 


'c 

2-r, + r»(l-a), 
!i<KP *£ « 1 


1+ r 1 + R t 

r e 

'» + *«■ « 1 

'c 


««L r t + R t ^ , 


--(— £)' " 


Common-emitter 
tee-equivalent 

circuit 

(see Fig. 2.31) 

Note: r; = r, + R B ; 

Rg = circuit resistance 

in emitter 


1, Rl 


r „ r: n 


»-3 


A -• 


r. + r;(U/» r ' (1+ ^ 

u 

= r»+r;(l+/3), 
*L + 'I « r* 




l + r ' + " 

r * i, V'» 




*L.. 




/j + l r„(/9 + l) 


'X « r d 


r : !, «L r, /j, rl + M 


[i, * 1 


• 


r„</3+l)' r;(l + ^)V r„ ; 
<y Rt, 

'l«'i, P » 1 . *l « 'a 


r; 

^«1 


Common-collector 
tee-equivalent 

circuit 
(see Fig. 2.31) 


r , Wt+r.)(/S+l) 

= r b + (R L+ r.)(/3 + l), 
r c »(R t +r.)(/3 + l) 


R 4 +r 6 1 

r tf (l + /3) 


a + p) — l —- 
'i 

= 1 + /5, 

r. + R t « rj 


1 


i i 




• U/3' 
R, « r c 






l+/,.+_a_YL l + i»' 
\* 1 + ^R«. R L 

'» « 'c 



223 



Transistor Circuit Analysis 





Table 6.1 Type 


No. 2N930. 




Electrical 
Parameters 


Ic = 13 fia 


l c = 4 ma 


Unit 


bib 


2100 


17 


ohm 


K„' 


0.045 x 10" 6 


0.056 x lO" 6 


mho 


A/e* 


200 


370 




h,b 


1.5 x 10- 


2.3 x 10- 




u ** 


420,000 


6300 


ohm 


^oc" 


9 X 10" 6 


20.8 x lO" 6 


mho 


h lc " 


-201 


-371 




\c" 


1 


1 





• Published data 
** Derived data using conversion formulae of Chap. 3 







Table 6.: 


» Type No. 2N930. 








Electrical 


'c = 


1 ma 


/ c = 2 ma 


Ic- 


= 3 ma 




Parameters 


25° C 


100° C 


25° C i 100° C 


25°C 


100° C 


Unit 


h le 


320 


460 


340 [ 480 


360 


500 




h ib 


30 


36 


20 ] 24 


16 


20 


ohm 


K b 


0.076 x 10" 6 


0.086 x 10' 6 


0.11 x 10" 6 l 0.13 x 10" 6 


0.15 x lO" 6 


0.18 x 10" 6 


mho 


hrb 


1.8 x 10' 4 


2.5 x lO- 


2.0x10- 2.8x10- 


2.2 x 10- 


3.0 x 10- 




r c = 1/Aob 


13.2 x 10 6 


ll. 6 x 10 6 


9.1 x 10 6 j 7.7 x 10 6 


6.7 x 10 6 


5.57 x 10 6 


ohm 


h ic = h ib (1 + h te ) 


9630 


16,650 


6820 1 11,600 


5780 


10,000 


ohm 


h oc = h ob (X +h te ) 


24.4 x 10"* 


39.6 x 10" 6 


37.4 x lO" 6 | 62.5 x 10" 6 


54 x lO' 6 


90.5 x 10" 6 


mho 


h re =h ib h ob (l +h te )-h rb 


5.5 x 10- 


11.7 x 10" 4 


5.5 x 10- | 12.2 x 10- 


6.4 x 10- 


15 x 10- 




r h =/>ie - T e (l+h fe ) 


2230 


2750 


1710 j 2450 


1330 


1500 


ohm 


r e = h re /h oe 


23 

1 


30 


15 19 

I 


12 

1 


17 


ohm 



224 



Summary Charts 



TABLE 7.1 Class A amplifier design formulae. 



Item 



Formula 
(R T * 0) 



Formula 
(Rr=0) 



Vcch = p c 



Ri 



S^.x + 


2R T l Q 




2 




0.5 




Ri 


Ri 


+ 2R T 


BV 


max 


— Aj- 



2/ 



'O(opt) 



rr 
^^max 



2 

Pc 

BV max 
2 

0.5 
0.5 



BV„ 



4R, 






2P C 



V C c /g = Pc 



2/ c 



SK„ 



^cc/q = Pc 



2/r 



(7.10a) 
(7.10b) 
(7.10c) 
(7.10d) 

(7.10e) 

(7.10f) 

(7.10g) 

(7.10h) 
(7.10i) 



Transformer coupling to load assumed. 



TABLE 7.3 Measured parameters on a 2N930 transistor. 



; c, , 


T,= 


175°C 


T, = 25° C 


Tj = 175°C 


v (ma) 


hi. 


/b ^.) 


V BE (v) 


K BE (v) 


1 


460 


2.2 


0.515 


0.215 


2 


490 


4.1 


0.54 


0.24 


5 


500 


10 


0.56 


0.26 


10 


490 


20 


0.58 


0.28 


20 


425 


47 


0.61 


0.31 


30 


380 


79 


0.635 


0.335 


40 


335 


120 


0.655 


0.355 


50 


310 


161 


0.67 


0.370 


60 


290 


206 


0.68 


0.38 


70 


250 


240 


0.695 


0.395 



225 



Transistor Circuit Analysis 



TABLE 7.2 Class B push-pull amplifier, design formulae 



Item 



CE r 



Ri. 



CE r 



' cc 



cc r 



r cc 

p« 



Formula 
(R T \0) 



VccRL 



4(R 


't + Rl) 




V 2 
y cc 




n 2 Ri 


n 


RL 



4 R T + RL 



cc 



Formula 
(K T =0) 



Vcc 
4RL 



cc 



n 2 Pr 



" 2 ( RL V 

4\Rt + RL) 



^Vcc-BV^Vcc + ^PcRtV, 



cc 



- "'max °C ^T" 



V*r 



CC 



n(R T + RL) 



0.785 



"cc 
n 2 Pn 



— = 2.466 
4 



Vcc = ^ 



cc 



nRi 



For/ c=*'c max , *<; 



cc 



Rt + Rl 



kV 



cc 



*RL 
(per transistor) 

kn 
4 



k 2 V 2 



cc 



4RL 

(per transistor) 
Vcc 

RL 



(7.12a) 
(7.12b) 
(7.12c) 
(7.12d) 
(7.12e) 

(7.12f) 
(7.12g) 



(7.12h) 

(7.12i) 

(7.12J) 

(7.12k) 



226 



c 

APPENDIX 



FREQUENCY 
RESPONSE PLOTTING 



C.1 Introduction 

The frequency response of networks used in transistor 
amplifiers can be represented by the product of a constant term, and frequency 
sensitive terms of the form listed below: 

1 + jaT, 



jaT 



1 + jcoT 



a 2 T 2 +2j£coT+l, 



This limitation on the realizable form of practical transfer functions leads to a 
quick method of plotting those transfer functions. The key is to use logarithmic 
coordinates, i.e., logarithm of gain vs. logarithm of frequency. On these co- 
ordinates, the transfer functions are very accurately described by straight line 
asymptotes. Phase angle in linear coordinates is normally plotted versus the 
same log frequency as the gain function. 



C.2 The Asymptotic Plot 

The utility of logarithmic coordinates is based on the 
elementary fact that the logarithm of a product of terms is the sum of the logarithms 
of the individual terms. Thus, the logarithm of the gain of a complex transfer func- 
tion is the sum of the logarithms of the component terms. Since the variety of 
component terms is very limited, as listed in C.1, the basis for rapid sketching 
of the gain function is established. 

The logarithmic gain is conventionally expressed in db, where 

Thus, a gain of 2 corresponds to 6 db; a gain of 10 corresponds to 20 db. Attenua- 
tion is expressed as negative db. For example, an attenuation of j is expressed 

The asymptotic plotting technique is based on the surprisingly excellent cor- 
respondence between limiting asymptotes and the actual frequency response curve 

Elaboration on the actual plotting techniques is carried out by means of a 
series of problems, gradually increasing in complexity. Asymptotic gain is plotted 



227 



Transistor Circuit Analysis 



on logarithm}? coordinates, while phase shift is plotted on linear coordinates 
versus log frequency. 

Note how asymptotes are determined in the following examples, by taking the 
simplified forms of the transfer functions for extreme conditions. 



PROBLEM C.l Plot the following transfer function on logarithmic coordinates: 

10 



G(jco) = 



;<u(l + ;W10) 



Solution: At very low frequency, 

|G(;o))| - 



10 
jto 



Express gain in decibels for the low frequency region : 

10 



db = 20 log 10 



20[log 10 10-log 10 co] 



(C.l) 



20[l-log 10& )]. 



(C.2) 



Note that if db is plotted versus log 10 co, the resulting curve will be a straight 
line as in Fig. C.la (dashed line). This line crosses the zero db axis at w = 10, 
since at that point, (C.2) = 0. The line is an approximation to the actual fre- 
quency-response curve only at very low frequencies. 



20 

t 

•"> 


^ 


Slope of —20 


db/decade 

CO. — i 


3 " 
-20 


1 

1 


10N>s 


100 


-40 


1+/" 
_ Slope 


CO >\ x 

10 yS \ 

of -40 db/decade >< 



(a) 



20 




3 



—20 - 3 db down 

Exact curve 
-40 



t I 



-2 -90 
o> 

° -135 



6 db/octave or 20 db/decade 



Corner frequency 
\Q^^ 100 




10 

- r - 



12 db/octave, or 
40 db/decade 



CO- 




(b) 
Fig. C.l (a) Separate Bode components which are combined to obtain the resultant diagram of Fig. C.l (b). 
(b) Bode plot of the transfer function G(jco) = -° 



JCO 



( 1+ '?.) 



Now consider the very high frequency region where — » 1. In this region, 



|G(/«)| 



10 



(; 



"■® 



100 

2 



(C.3) 



228 



Frequency-Response Plotting 



Express gain in decibels: 

db = 20 log 10 ^ = 20 [log 10 100 - log 10 co 2 } 

CO 

= 20[2-21og 10& >] 

- 40[l-log 10 o>] . (C.4) 

This is again a straight line; i.e., db is a linear function of log 10 o>. This line 
crosses the zero db axis where log 10 a> = 1, or at o> = 10, by coincidence, at the 
same point where the low-frequency approximation curve crosses the zero db 
axis. Note that the slope (-40) of (C.4) is twice the slope (-20) of (C.2). 

Figure C.lb shows the superposition of the straight line approximations to 
the very low- and very high-frequency regions of the |G(/w)| curve, as well as 
the actual curve. As frequency reduces or increases indefinitely, the curve 
|G(;"o))| approaches the straight lines asymptotically. Hence, this type of dia- 
gram is often called an asymptotic diagram. Practically, the degree of approxima- 
tion represented by the two asymptotic portions to the left and right of their 
common intersection point, is remarkably good. The excellence of the straight 
line approximation to the actual curve is the key reason for the widespread use 
of this type of diagram. Figure C.lb also shows the plot of the phase angle plotted 
on the same frequency scale. 

PROBLEM C.2 For the transfer function of Prob. C.l with generalized gain 
and time constant, calculate the gain error at the intersection of the two asymptotes. 

Solution: Consider the mathematical expression for |G(/'<u)|. Use K and T 
instead of the numerical values of the previous example. We have 

K 



G{jco) = 

\G(jco)\ 



jcoil + ja>T)' 
K 



When coT » 1 (high frequency) or when coT « 1 (low frequency), the approxima- 
tion method applies with high accuracy. Where coT = 1, the approximation is 
poorest. Here, the asymptotic diagram indicates a value (at the intersection of 
the two asymptotes) of 20 log 10 KT. The exact value is 

KT KT KT 



\G(jco)\ 



coWl + UT) 2 Wl + 1 \ll 



KT 



db = 20 log 10 -^- = 20 log 10 KT - 20 log 10 V2 , 

approximate error 

value 



so that 



error (db) = -20 log l0 \ll = -10 log 10 2 = -10(a301) = -3.01 db. 

At this poorest point, the actual curve is very close to 3 db below the value 
indicated by the asymptotes. 

There ate other interesting points to note from the asymptotic curve of Fig. 
CVb. Qiipsive thcr slopes of the two sttafgM Uae sections: 

High-frequency atope = -40 

229 



Transistor Circuit Analysis 



Suppose we let frequency o> 2 = 2<o lt a one octave range, and determine the change 
in decibels over this octave for the two slopes. Therefore, the changes at the 
low- and high-frequency slopes are, respectively, 

-20 log I0 ^ = -20 log l0 2 = -6.02 db, 

-40 log I0 -^ = -40 log 10 2 = - 12.04 db. 

The slopes of the straight line approximations are 6 db/octave and 12db/octave, 
respectively, for the low-frequency and high-frequency regions. For a decade 
band, <u,/<u, = 10, log l0 Wj/wj = 1, and the slopes become 20 db/decade and 
40 db/decade, respectively. 
Therefore, 

6 db/octave = 20 db/decade, (c.5) 

12 db/octave = 40 db/decade . (^.6) 

Six db/octave means that gain is changed by a factor of two for a doubling of 
frequency. Twelve db/octave means that gain is changed by a factor of four for 
a doubling of frequency. 



With respect to plotting phase angle, the method is more sophisticated than 
the one for amplitude. However, it is simple enough for practical purposes. Con- 
sider the phase shift at very low frequency of the function of (C.l). The approximate 
low frequency expression is 

G(;<u) = — i 
which corresponds to a 90° phase lag. The high-frequency approximation 

Uto) 2 T 

indicates a phase lag of 180°. The phase shift versus frequency curve is plotted 
in Fig. C.lb. At extreme frequencies, actual phase shift approaches these 
asymptotic values. At aT = 1, phase shift may be found directly from the transfer 
function (C.l). Thus, 



G(jca) -: 



K KT KT 



y'«u(l + jaT) ;(1 + ;') 1/90° V2 /45° 



At aT = 1, phase lag is 135°, as shown by Fig. Clb. The phase angle can be 
estimated directly from the asymptotic gain diagram by applying the following 

When asymptotic slope is db/octave, phase angle approaches 0°. 
When asymptotic slope is i 6 db/octave, phase angle approaches i90°. 
When asymptotic slope is ± 12 db/octave, phase angle approaches 1 180°. 
When asymptotic slope is ± 6n db/octave, phase angle approaches tntr/2, 

By means of these rules, combined with an actual calculation of phase angle 
at certain critical points, phase angle curves are easily plotted. 

PROBLEM C. 3 Plot the gain and phase characteristic of where 

1 + ja>T 
K= 10. 



230 



Frequency-Response Plotting 



Solution: Refer to Fig. C.2. At low frequency, the asymptote is simply K, a 
horizontal line whose ordinate is given as 

db = 20 1og 10 K. 

At high frequency, |G(/&))| = K/oT, which intersects the low-frequency asymp- 
tote at <oT - 1, or co = 1/T. The slope at high frequency falls off at 20 db/decade, 
since the high-frequency slope has co to the first power only in the denominator. 
The low-frequency phase shift is approximately zero, approaching a 90° lag at 
very high-frequency. At <oT = 1, phase lag may be calculated from 



G(jco) = 



K 



hence, phase lag = 45°. 



20 



t £ 







4 -45 



a 
c 





-90 



db = 201og 1(> K 



1 I 

10T T 

Corner frequency) 



<0 —*■ High frequency 
asymptote 
(20 db/decade) 




Note: Negative phase angle — phase lag 

Fig. C.2 Plot on Bode coordinates. 



-20 log l0 -i- - 




Fig. C.3 Bode plot of transfer function. Note that the phase moves 
toward -90 and then returns to its asymptote. 



PROBLEM C.4 Sketch the asymptotic diagram and the approximate phase char- 
acteristic of the following transfer function: 



G(; w ) 
Solution: Refer to Fig. C.3. 



1 + jcoT 2 
1 +;'<u7", 



r t >r 2 



PROBLEM C.5 Sketch the asymptotic diagram and the approximate phase char- 
acteristic of the following transfer function: 

G (, w ) = i±i^, ri >T 2 . 
1 + j<oT 2 



231 



Transistor Circuit Analysis 



Solution: Refer to Fig. C.4. 



20io Kl0 -zr - 




t 



20 1og 10 K~j 



2*60 
•a 



01 



-60 



Asymptotes 



l/r^ i/r, i/r 3 /i/r 4 




Fig. C.4 Bode plot of transfer function. Note that the phase 
moves toward +90 and then returns to its 0° asymptote. 



Fig. C.5 Bode plot of transfer function. Note relative con 
plexity of phase diagram. 



PROBLEM C.6 Sketch the asymptotic diagram and the approximate phase char- 
acteristic of the following transfer function: 



G(jco)= K 



(1 + ja)T 2 )(l + jcoT 3 ) 



(1 + ;o)r,)(l + jcoT t ) 
Solution: Refer to Fig. C.5. 



r t >7i> T 3 >T 4 . 



PROBLEM C.7 Sketch the asymptotic diagram and the approximate phase char- 
acteristic of the following transfer function: 



G(/Vu) 
Solution: Refer to Fig. C.6. 



K 



(i + joW + /Vuz;) ' 



T X >T 2 




■ 12 db/octave 



12 db/octave 



Fig. C.6 Bode plot of transfer function. 




12 db/octave 



Fig. C.7 Bode plot of transfer function. 

PROBLEM C.8 Sketch the asymptotic diagram and the approximate phase char- 



232 



Frequency-Response Plotting 



acteristic of the following transfer function: 



(jw)(l + JcoT 2 ) 



Solution: Refer to Fig. C.7. 



C.3 More Complex 

Frequency-Response Functions 

The most general frequency- response functions en- 
countered in elementary servomechanisms may be represented by proper fractions 
of the form 



G( iu ) KMia,) 



{jo>)"B(jco) 

The A(j<o) and B(/a>) are polynomials with real coefficients which may be fac- 
tored into the product of linear and quadratic expressions of the following forms: 

Linear factors, 1 t jaT- 

Quadratic factors, -a/T 1 + 2Cja>T + 1. 

The quadratic factors have complex zeros. The values of £ and T are dependent 
on the numerical values of the parameters. In general, transfer functions consist 
of combinations of terms of these types, with the degree of the denominator 
exceeding the degree of the numerator. Typical forms taken by these functions 
are listed below: 

G(i )- 1+ i0iT% G(i )- ^ + ;&>ri) 

lUW; (I + jvTJO. + jvTJ ,W> ' i ffl (l + jcoTJ (1 + jcoT 3 ) 

G 3 0V>=— -~ 7 — ^— — — , G 4 (; W )= 1 + iaT > 



(-^T' + D + jlCcoT, -<o 2 a+jcoT 2 ) 

G 5 (/«,) = d+W , G t (jo>) = (Lb W(l + W 

[(-a> 2 r 2 + l) + ;2^ra)][l + ;6>rj (1 + jcoTJ (1 + ja>TJ 

PROBLEM C.9 Plot the Bode diagram of a quadratic function, using the 
standard expression 

G(icu) =— — — ^— -— — . (C.7) 

-co T + ICioi T + 1 • 

Solution: As before, determine asymptotes for low and high frequencies. At 
low frequency, |G(;'a>)| = 1 with zero phase shift. This corresponds to 

db = 20 log 10 1 = 0. 

The low frequency gain is thus zero db. At very high frequency, 

1 



JO(/»)| - 



with 180° phase shift. 



Converting gain at high frequency to db, 

db = -20 log.otuT 2 = -40 log I0 w T . 

This expression, plotted on suitable coordinates, is a straight line with a nega- 
tive slope of 40 db/decade (corresponding to 12 db/octave), with phase shift 



233 



Transistor Circuit Analysis 



Resonant 
peak 



-90 



o- -180 




Fig. C.8 Bode plot of quadratic function. 



approaching 180° at very high frequencies. This straight line asymptote inter- 
sects the zero db axis where -40 \o% m cjT = 0, or <oT « 1 . Thus, a quadratic ex- 
pression of the form of (C.7) has two asymptotes, the same as for a linear ex- 
pression, except that at the intersection point of the asymptotes (the corneT 
frequency), the slope of the asymptotes changes by 40 db/decade. 

Consider now the region in the vicinity of the corner frequency, where the 
asymptotic approximation is apt to be least accurate. In (C.7), let a>T = 1. Then 



G(j(o) -. 



2do)T 



1 
Hi 



(C.8) 



This expression indicates a gain of l/2£ and a phase lag of 90°. Plotting the 
high and low frequency asymptotes, the exact corner frequency point, and sketch- 
ing in phase shift, the approximate gain curve of Fig. C.8 is quickly drawn. 
The damping factor £ for the quadratic expression is exactly the same «s the oae 
for the simple second order servo whose characteristic equation is also a quad- 
ratic. A zero damping factor means infinite amplitude at the corner or "resonant" 
frequency. Heavy damping eliminates the resonant p**k. A damping factor 
greater than unity means that the quadratic expressmen »ay be factored into two 
linear expressions which can be plotted by methods previously described. Am- 
plitude and gain functions of the quadratic plotted versus dimensionless frequency 
<oT as a function of the parameter £, are shown by Pigs. C.9 and CIO, re- 
spectively. 



20 



10 



-10 



-20 



-30 



-40 

o.i 

















b> 








































\aL£=0.2 

-\V^£=0.25 

\N^\^£=0.3 






















<r=o.< 

£=o.« 


1 / 
) s 














).4 
= 0.5 
























































































/-? ( j,.\ — 


1 
































-a> 2 T 2 + 2Cj(oT+l 
1 1 1 



0.2 0.3 0.4 0.5 0.6 0.8 1.0 

(OT- 



5 6 8 10 



Fig. C.9 Magnitude of output/input versus dimensionless frequency (oT for various values of £. 



234 



lit 
• 


k 

a 
• 
-o 



-20 
-40 
-60 



a. -60 

c 



» -100 
o -120 



-140 



-160 



-180 



0.1 



0.2 



Frequency-Response Plotting 



^^1 


















--r=o.o5 


































£>--f =0.15 

-\>-r=o.2 






















r=o.4'v 








\V 




U^-i =0.2b 
^■f =0.3 






















r=o. 

f=0. 
f = 0. 

r=i. 


5 ^s 

6"0 








i 


























0-^ 
















































fel^ 




































ill 


^ 

























































































0.3 



0.4 0.5 0.6 0.8 1.0 



5 6 



8 10 



Fig. CIO Phase shift of output/input versus dimension less frequency CjT for various values of £. 



PROBLEM CIO Sketch the Bode diagram of the expression 

1 



G(;e>) = 



-o) 2 T 2 + jcoT + 1 



(C.9) 



Solution: Compare the middle term of the denominator with the standard form 
2£ja>T, 2£ = 1 or £ = -§ . Refer to the £ = \ of Fig. C.9. Note that gain is 
db at coT = 1 for this damping factor. Figure CIO shows the companion phase 
shift curve. 



Consider now the plotting of transfer functions containing linear and quad- 
ratic factors. This may be carried out in a routine manner by remembering that 
the contributions of each factor of the gain function may be added, since a multi- 
plying factor becomes an additive term when using logarithmic (decibel) units. 
Phase shifts an, of course, directly additive. 

PROBLEM CI 1 Plot the gain and phase characteristics on Bode coordinates 
of the transfer function 



G(ja) = 



K 



T t >T 2 



{1 + jaT t )(X + ioT t ) ' 
Solution: Proceeding as before to determine the gain characteristic, 

K 



(CIO) 



|G(;o>)| 

Expressed in db: 

db = 20 log, 



|i + /'<yr 1 ||i + ; jr J 



K 



= 20 (log 10 K - log l0 Jl. + ja> T t | - log 10 1 1 + jo T 2 | ) . (c. 11) 

Note that each factor in the transfer function makes its separate contribution to 



235 



Transistor Circuit Analysis 



the decibels of attenuation, and in plotting the asymptotic diagram, each term 
may be considered separately. Thus, as shown by Fig. C.lla, the separate 
asymptotic contributions of each term are drawn to provide an asymptotic or 
straight line approximation to the entire curve of Fig. C.llb. This approximation 
is at its best in regions far from the corner frequencies. Similarly, each term of 
the transfer function contributes its phase shift component, which may be added, 
as shown by Fig. C.llc. 



20 log 10 K 
t 



(a) 3 



20 1og 10 K 
t 



(b) 



-=■ o 







1 


1 
T 2 


F- 


\ ^xc 


^^ . «. / ^^. 


db/octave 

i 


^W> 6db/octav>- 
6 db/octave ^^.^ 


T-C^^^ Resultant asymptotic plot^ 

1 ^^. 1 2 


1 


/ s\ 12 db/octav 
Actual resultant ^^V. i 
curve ^v 1 

Vs. 



t 





V 

L. 

01 
V 

-o 



■- -90 
— 
o> 

c 
o 

S-180 



i/r, 


l/r, 


^^^^ Arcton 0)T l 


^"--^- Arctan fc)T 2 


^v Combined 
>«^phase angle 







Phase lag due to l/(l+;<y7\) = arctan <uT, ; 

Phase lag due to l/(l+/ft)T a ) = arctan coT 2 ; 

Over-all phase lag is sum of separate phase 

lag components. 

(c) 



Fig. C.ll (a-b) Bode plot showing how components of asymptotic diagram are added to develop ovei 
(c) Bode plot showing how separate phase lags of transfer function are added together. 



■ II di 



i a gram. 



Note in Figs. C.lla- c that corner frequencies for the resultant asymptotic 
curve occur at co = 1/T X , and co = 1/T 2 . Note further that each successive corner 
frequency marks the point where the corresponding term of the denominator starts 
to increase rapidly with frequency, resulting in a sharper slope of the asymptotic 
line following the corner point. The phase shift curve tends toward the values 
corresponding to the gain asymptote slopes; i.e., 90° for 6 db/octave, 180° for 
12 db/octave, etc. The phase shift curves tend toward these values only when 
corner frequencies are widely separated. When the corners are less than a few 
octaves apart, the limiting phase shift values constitute only a crude guide. 
A more accurate plot would require calculating the exact phase shift at a few 
well chosen points. Since the corner frequencies represent points of poorest 
approximation, it is particularly convenient to calculate phase shift at these 
corners. In practical cases, phase shift is important in limited regions where 
exact calculations may be made once the approximate phase curve is known. 



PROBLEM C.12 Plot the Bode curves for the function 

Kd + joTJ 



G(jo) 



r, > t 2 . 



jco (1 + jco T 2 ) 

Solution: Refer to Fig. C.12. At very low frequency, 

K ,„,, M K 



(C.12) 



G(;a>) = 



)<o 



\G(jco)\ 



This curve, or an extension thereof, crosses the zero db axis at co = K. At co = 1, 
db = 20 log, K. This straight line extends indefinitely to the left (toward co = 0, 



236 



Frequency-Response Plotting 



on the logarithmic scale). Phase shift at very low frequency tends toward 90° 
lagging. At co = 1/7", , the term in the numerator starts to increase substantially 
in magnitude, thereby introducing a leading phase shift component. The increase 
in <o7i starts to balance the increase in the u> of the denominator (coT 2 still much 
less than unity), so that the gain curve flattens out. The (1 + jaT^) factor in 
the numerator creates a positive slope change of 20 db/decade to balance the 
initial negative slope of 20 db/decade. At o = 1/T 2 , the second denominator 
factor introduces a second corner frequency, adding a 20 db/decade negative 
slope to the asymptotic gain curve. Phase shift tends toward the values corre- 
sponding to the different slopes between the corner frequencies. 

6 db/octave 

db/octave 

jL 



20 log 10 K 

t 

-o 
-a 

t : 



6db/oc 



12 db/octave 



T 






*» N Asymptotes 




6 db/octave 



1 l/7\ 



K 



l/T. 



l/T x 



l/T, 




-90 



Fig. C.12 Bode plot of transfer function 

PROBLEM C.13 

G(;a)) 




Plot the Bode diagram of the transfer function 

K 



Ua>ya + io>T) 



Fi g. C.13 Bode plot of transfer function. 



(C.13) 



Solution: Refer to Fig. C.13. The gain curve has a single corner frequency at 
«u = l/T. The initial slope is 12 db/octave until the comer frequency, at which 
point the curve falls at 18 db/octave. Phase shift is 180° lagging at low fre- 
quencies, approaching 270° at higher frequencies. 



PROBLEM C.14 Plot the Bode curves for 

G(/fl>) = 



K 



Uo>)(0.1;o + 1) 
Solution: Refer to Fig. C.14. This shows the Bode plots for K = 1. 



(C.14) 



20 

10 



-10 

I -20 
-30 

-40 

-50 



- 


V 


K 














3- 
O 

90 2 














-Ph 


ise cu 


rve 


o 

3 

<o 


- 




Ej 


(act 


curve- 


-»Ss; 


k 


Asym 


>tote 




-180 l_ 

s « 

<o 

5 


- 


















-270 



0.1 



10 



100 



CO- 



Fig. C.14 Bode diagram, amplitude and phase. 



237 



Transistor Circuit Analysis 



PROBLEM C. 15 Plot the Bode curves for 

K 



Giico) = 



{jo){jo + l)(j^ + l\ 
Solution: Refer to Fig. C.15. This shows the Bode plots for K = 2. 



10 



-10 

! -20 

-30 

-40 



-50, 



- 


E 


xact 


^ 














curve - 












V 












- 


Phase 




\ ^*-- Asymptotes 




- 


curve " 














- 


- 


















- 



0.1 



13 

3- 



■90 



■180 



-270 



100 



1 10 

Fig. C.15 Bode diagram, amplitude and phase. 



(C.15) 



238 



DISTORTION 
CALCULATION 



D 



APPENDIX 



D.1 Distortion 

Distortion is a measure of the degree to which a given 
periodic waveform departs from non-sinusoidality. Implicit in this definition is 
the presence of a fundamental frequency component, upon which distortion com- 
ponents <are superimposed. 

An exact analysis of the distortion in a given periodic waveform is routinely 
carried out using numerical methods based on Fourier series. By this means, it 
is possible to achieve any degree of accuracy justified by the given waveform 
data. Furthermore, specific higher harmonics may be investigated where desired. 

However, this method of harmonic analysis is very tedious, and much too 
refined for the simpler problem of determining distortion in the output of a power 
amplifier. The principal distortion components in power amplifier output are 
second and third harmonic, and frequently, even the third harmonic component 
may be neglected. 

Accordingly, simplified methods of Fourier analysis have been devised to 
give only the important low-order distortion components. These methods, taking 
no more than a few minutes to apply to a specific waveform, are summarized in 
Figs. D.l and D.2. Figure D.l applies when only second harmonic distortion is 
present, while Fig D.2 applies when the distortion includes second and third 
harmonic components. 

Individual distortion components may be designated by the ratios of their 
individual amplitudes to the fundamental amplitude. Total distortion is usually 
calculated as follows: 

where D t represents the amplitude of the i-th harmonic, while D, represents the 
fundamental amplitude. 

Using the formulae of Fig. D.2, the following expressions may be derived 
for the components denoted by y of a distorted waveform: 



7o . i [ Xl + x, + 2 (x '+*")], 
6 

,r» = ~[*, + x, -x'-x"], 

jr $ » i-[x,-x,-2x'+2x"]. 

® 



(D.la) 
(D.lb) 
(D.lc) 
(D.ld) 




X. + Xn — 2 X„ 

x„ — quiescent value of waveform 

Fig. D.l Calculation of second har- 
monic distortion component in an ap- 
proximately sinusoidal waveform. 
Higher harmonics are negligible; 
D = percent distortion. 



Xl 





1 










I 
I 


l\ 

I 




Time — 1 




| 


I 
--I 








J 










I 
I 

I 

I 

<ur 


I 
I 


I 
I 
I 

I 


1 
1 
1 
1 

O)t +77 


Di 


(%) - *' 


+ x 2 — 
-x 2 -h 


X ' — X 

x' — X 


x 100 


D, 


*1 


-x 2 - 


2(x'- 


x") 


( '° 2( 

D, =Vl 


X \ ~ x 2 


+ x'- 


*") 




f 3 + D\ 





Fig. D.2 Calculation of second and 
third harmonic distortion components 
in an approximately sinusoidal wave- 
form. Higher harmonics are negligi- 
ble; D = percent distortion. 



239 



Transistor Circuit Analysis 



PROBLEM D.l Refer to Fig. D.2. Analyze the wave described by the following 
parameters for distortion components: x, = 2, x 2 = 0, x q = 1, x' = -, x" = 1 . Also 
use (D.l). 2 2 

Solution: Using direct substitution, the following results are obtained: 

2+0- 1-4 

D 2 (%) = 1 !=0, 

2+1 - 1 

2 2 

2-0-2(1-1) 

Z) 3 (%) = ? L. = 0> 

2 (2 - + 1 + I) 

yo= I[2 + + 2(2)] = l, 
o 

yi =I[2-0 + i--l] = l, 

y 2 = l [2 + o- |-i] = o, 

y 3 = I [2 - - 3 + 1] = 0. 
6 

The wave exhibits no second or third harmonic distortion components. As a 
matter of fact, at the points defined in this problem, the wave has the parameters 
of a pure sinusoid. 

Test the formula of Fig. D.l for second harmonic distortion: 

D ' (%) =2i^) xl00 = a 

This result is of course necessary for consistency. 



240 



...U. 



LIST OF SYMBOLS 



E 



APPENDIX 



A v 

B 

BV CBO 

BV CEO 
BV CER 

BV CES 

BVEBO 
BV R 

c 
c ib 

C,c 
Cie 

C ob 

c oc 
c oe 

E 

(hfb 



( hle 

h FB 
hfb 
h FC 
"/c 

h FE 

h, e 



current gain 

small-signal average power gain 

voltage gain 

base electrode 

breakdown voltage, collector to base, 
emitter open 

breakdown voltage, collector to emit- 
ter, base open 

breakdown voltage, collector to emit- 
ter, with specified resistance be- 
tween base and emitter 

breakdown voltage, collector to emit- 
ter, with base short-circuited to 
emitter 

breakdown voltage, emitter to base, 
collector open 
breakdown voltage, reverse 
collector electrode 
input capacitance (common-base) 
input capacitance (common-collector) 
input capacitance (common-emitter) 
output capacitance (common-base) 

output capacitance 
(common-collector) 

output capacitance (common-emitter) 

emitter electrode 

small-signal short-circuit forward 
current transfer ratio cut-off fre- 
quency (common-base) 

small-signal short-circuit forward 
current transfer ratio cut-off fre- 
quency (common-collector) 

small-signal short-circuit forward 
current transfer ratio cut-off fre- 
quency (common-emitter) 

static value of the forward current 
transfer ratio (common-base) 

small-signal short-circuit forward 
current transfer ratio (common-base) 

static value of the forward current 
transfer ratio (common-collector) 

small-signal short-circuit forward 
current transfer ratio (common- 
collector) 

static value of the forward current 
transfer ratio (common-emitter) 

small-signal short-circuit forward 
current transfer ratio (common- 
emitter) 



h IB 
hib 

h ic 
h jc 

h IE 
h ie 

h OB 
h ob 
h 0C 
hoc 

h OE 



hre 

I B 

•b 

'c 

'c 
ICBO 

1 CEO 

ICER 

! CEX 
tcES 



static value of the input resistance 
(common-base) 

small-signal value of the short-cir- 
cuit input impedance (common-base) 

static value of the input resistance 
(common -collector) 

small-signal value of the short-cir- 
cuit input impedance (common- 
collector) 

static value of the input resistance 
(common-emitter) 

small-signal value of the short-cir- 
cuit input impedance (common- 
emitter) 

static value of the open-circuit out- 
put conductance (common -base) 

small-signal value of the open-cir- 
cuit output admittance (common -base) 

static value of the open-circuit out- 
put conductance (common-collector) 

small-signal value of the open-cir- 
cuit output admittance (common- 
collector) 

static value of the open-circuit out- 
put conductance (common-emitter) 

small-signal value of the open -cir- 
cuit output admittance (common- 
emitter) 

small-signal value of the open-cir- 
cuit reverse voltage transfer ratio 
(common -base) 

small-signal value of the open-cir- 
cuit reverse voltage transfer ratio 
(common -co Hector) 

small-signal value of the open-cir- 
cuit reverse voltage transfer ratio 
(c ommon-emitter) 

base current (d-c) 

base current (instantaneous) 

collector current (d-c) 

collector current (instantaneous) 

collector cut-off current (d-c), emit- 
ter open 

collector cut-off current (d-c), base 
open 

collector cut-off current (d-c), with 
specified resistance between base 
and emitter 

collector current (d-c), with speci- 
fied circuit between base and emitter 

collector cut-off current (d-c), with 
base short-circuited to emitter 



241 



Transistor Circuit Analysis 



'EBO 

If 
•f 
Ir 
•r 

I B 

n 



BE 



'CE 



Pi 

Pl 
Po 



Rb 

r b 

Re 



R e 
Rl 

T 



emitter current (d-c) 

emitter current (instantaneous) 

emitter cut-off current (d-c), collec- 
tor open 

forward current (d-c) 

forward current (instantaneous) 

reverse current (d-c) 

reverse current (instantaneous) 

saturation current 

region of a device where electrons 
are the majority carriers 

region of a device where holes are 
the majority carriers 

total power input (d-c or average) to 
the base electrode with respect to 
the emitter electrode 

collector junction dissipation 

total power input (d-c or average) to 
the collector electrode with respect 
to the base electrode 

total power input (d-c or average) to 
the collector electrode with respect 
to the emitter electrode 

total power input (d-c or average) to 
the emitter electrode with respect to 
the base electrode 

large-signal input power 

small -signal input power 

load power 

large-signal output power 

small-signal output power 

total power input (d-c or average) to 
all electrodes 

small-signal forward resistance 

external base resistance 

base resistance 

external collector resistance 
collector resistance 
external emitter resistance 
emitter resistance 
saturation resistance 
load resistance 
temperature 



T A ambient temperature 

Tq case temperature 

Tj junction temperature 

8 thermal resistance 

thermal resistance, 
ambient 



i-A 

e 

i-C 
Vbb 
Vbc 

v bc 



junction to 



thermal resistance, junction to case 

base supply voltage (d-c) 

base to collector voltage (d-c) 

base to collector voltage 
(instantaneous) 

Vbe base to emitter voltage (d-c) 

v be base to emitter voltage 

(instantaneous) 

Vcb collector to base voltage (d-c) 

v cb collector to base voltage 

(instantaneous) 

V cc collector supply voltage (d-c) 

V C e collector to emitter voltage (d-c) 

v ce collector to emitter voltage 

(instantaneous) 

^CE( sat ) collector to emitter saturation volt- 
age 

V EB emitter to base voltage (d-c) 

Veb emitter to base voltage 

(instantaneous) 

V EC emitter to collector voltage (d-c) 

v ec emitter to collector voltage 

(instantaneous) 

Vee emitter supply voltage (d-c) 

V F forward voltage (d-c) 

vp forward voltage (instantaneous) 

V CBF d -c open-circuit voltage (floating 
potential) between the collector and 
base, with the emitter biased in the 
reverse direction with respect to 
the collector. 

V ECF d-c open-circuit voltage (floating 
potential) between the emitter and 
collector, with the base biased in 
the reverse direction with respect 
to the collector 

Vr reverse voltage (d-c) 

v R reverse voltage (instantaneous) 



242 



INDEX 



Acceptor impurity, 4 
Amplifier performance: 

small-signal, 97 

common-emitter, 97 

common-base circuit, 107 

common-collector, 109 

formulae, 113 
Amplifiers: 

basic circuits, 17 

capacitor-couples, 124 

direct-coupled, 121 

emitter-follower, 54 

multi-stage, 121 

performance calculations, 52 
Approximation techniques, 92 
Audio amplifier, 97 
Avalanche effect, 161 



i 

Base spreading resistance, 17 

Bias circuits: 

constant base voltage, 71 
temperature sensitivity, 71 
general configuration, 79 
emitter bias, 83 
approximate analysis, 92 

Bias compensation, 85 

Bias drift, 149 

Bias point stability, 69 

Black box, 39 

Bode diagram, 199 

By-pass capacitor, 124, 155 



Capacitances, 22 
Capacitor coupling, 124 
Carriers: 

majority, 4, 6 

minority, 4, 6 
Characteristic curves, 24 
Collector resistance, 17 
Classes of operation, 178 

Class A push-pull, 178 

Class B push-pull, 180 
Collector-base feedback, 81 
Collector-base leakage, 67 



Common-base: 

characteristics, 25 

circuit, 107, 127 

connection, 13, 17, 173 

parameters, 47 
derivation, 48 

power gain, 14 

voltage gain, 14 
Common-collector: 

characteristics, 26 

circuit, 17, 109, 176 
Common-emitter, 17 

characteristics, 25 

circuit, 17, 97 
Complementary transistors: 

direct-coupled, 155, 156 

d-c feedback, 157 
Complex impedance, 126 
Composite characteristics, 179, 181 
Composite load-line, 181 
Constant power hyperbola, 164 
Conversion formulae, 45, 52-4 
Coupling capacitor, 124 
Covalent bonds, 2, 8 
Crossover distortion, 181 
Current feedback, 190, 194 
Current gain, 26, 32 
Cut-off, 73 

Cut-off frequency, 113 
Cut-off region, 160 



D-c bias, 67 

D-c feedback, 145, 157 

D-c models, 20 

D-c stabilization, 73 

Diffusion, 5 

Diffusion current, 6 

Diode compensation, 85, 95 

Direct coupling, 144 

stability with temperature, 148 
Distortion, 163, 174 
Donor impurity, 4 
Driving impedance, 121 
Dynamic resistance, 8 



Ebers-Moll model, 15 
Electron-hole pairs, 3, 6 



Emitter bias, 83 
Emitter-follower, 54, 95, 109, 121 

current gain, 112 

gain, 56 

voltage gain, 1 12 
Emitter resistance, 17 
Energy gap, 2 
Equilibrium, 6 
Equivalent circuit, 41 

Ebers-Moll model, 15 

d-c models, 20 

hybrid-77, 16, 21, 62, 114 

small-signal, 16 

tee-equivalent, 16, 43 
Equivalent model, 41 
Excitation level, 2 



Feedback, 36, 186 

Feedback amplifier, 190 

Feedback and distortion, 188 

Feedback and frequency response, 187 

Feedback, types, 190 

Forbidden gaps, 2 

Forward conductance, 22 

Frequency response, 124 
asymptotic diagram, 137 
effect of emitter resistors, 129 
high-frequency response, 132 
interstage coupling network, 125 
low-frequency, 124 
multiple time constants, 136 
universal curve, 126 



Gain margin, 198 
Gain stability, 201 
General bias circuit, 74, 79 
General bias equation, 74, 77 
Generator resistance, 175 

H 

h-parameters, 38 

High-frequency behavior, 22 

High-frequency circuit, 140 

High-frequency performance, 113 

Hybrid parameters, 38 

conversion to tee parameters, 43 
conversion to hybrid-77 parameters, 64 



243 



Transistor Circuit Analysis 



Hybrid-77 : 

calculations, 115 
capacitances, 114 
circuit, 114 

conversion formulae, 64 
equivalent circuit, 62 
parameters, 114 
measurement, 116 

I 

Impedance matching, 138 
Impedance variation, 108 
Impedance variation with R 6 , 101 
Impedance variation with R^ , 101 
Incremental output impedance, 33 
Input impedance, 97, 121 
Instability, 187 
Integrator, 202 

Intermediate frequency range, 136 
Interstage, coupling circuit, 130 
Intrinsic resistivity, 3 



Junction temperature, 85 
Junction transistor, 13 

K 



Kernel, 2 



Large-signal operation, 30 
Leakage, 67, 68, 90 

current, 67 

equivalent circuit representation, 68 
Load line, 27, 143 
Load line curvature, 179 
Load line of input circuit, 28 
Logarithmic plotting, 131, 137, 140 
Low-frequency response, 124 
Low-level transistor characteristics, 72 

M 

Majority carriers, 4 
Miller effect, 118 
Minority carriers, 4 
Multiplication effect, 161 
Multi-stage amplifier, 121, 197 



N 

Negative feedback, 187 

Nonlinearity : 

nonlinear behavior, 20 
nonlinear operation, 30 
nonlinear region, 30 

Nyquist criterion, 196 

Nyquist plot, 198 

Nyquist point, 196 



Open-loop, 186, 196 
Operating limits, 160 
Operating point, 26, 67 

drift, 67, 69 
Operational amplifier, 200 
Output admittance, 39 
Output impedance, 97 
Output transformer, 141 



p-n junction, 5 

Parameter definition, 39 

Positive feedback, 187 

Potential barrier, 5 

Power amplifier, 160 

Power amplifier design equations, 171 

Power dissipation, 95 

Push-pull amplifier, 178 

design formulae, 182 

equivalent circuit, 180 



Quiescent point, 26 



Recombination, 3 
Rectifier, 5 

circuit, graphical analysis, 11 

equation, 7 

po we r di s s ipat ion , 11 

static equivalent circuit, 16 
Reverse leakage, 7, 10 
Reverse voltage ratio, 39, 46 



Saturation, 36, 73 



Saturation region, 160 
Saturation resistance, 162 
Self-heating, 85 
Semiconductor crystal, 2 
Single-stage amplifier, 97 
Small-signal: 
amplifier, 97 
operation, 30, 38 
Stability, 196 
Stability factors, 73-76, 81 
Stability margin, 198 
Static characteristics, 24 
Summing circuit, 200 
Surface leakage, 10 
Switched operation, 35 
Switching circuit, 93 



Tee-equivalent circuit, 46 
Temperature effects, 68, 162, 168 
Thermal resistance, 162 
Thermal runaway, 18, 89 
Thevenin's theorem, 71, 129 
Three-stage amplifier, 148 
Transconductance, 166 
Transformer-coupled amplifier, 141, 165 
Transformer coupling, 138 

equivalent circuit, 138 

frequency response, 140 
Transistor: 

basic circuits, 17 

bias, 13 

breakdown, 19 

current gain a , 13 

current gain |3 , 14 

description, 12 

junction transistor, 12 

parameters, 25 
Two-stage amplifier, 125, 129, 133 
Two-transistor circuit, 34 

U 

Universal curve, 126 

V 

Voltage feedback, 190 
Voltage gain, 33 



244 



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