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DIGITAL EQUIPMENT CORPORATION . MAYNARD, MASSACHUSETTS 



Copyright 1964 by Digital Equipment Corporation 



FFtOCESSOFt-Q 



36-bit word length 15 index registers and/or accumulators 
FORTRAN II MACRO-6 assembler utility programming library 
Integrated hardware and software for time sharing Microtape 
Asynchronous operation, modular construction Memory overlap 
Core memories up to 262,144 words, 2 /xsec, directly addressable 
Fast memory 16 words, 0.4 microsecond 128 input-output devices 
363 instructions fast floating point multiply 14 /xsec average 
Program assignable operation codes Byte manipulation, half word 
Block transmission Seven channel priority interrupt system 
Programmed input-output transfers require no data channels 
Multiple processors Remote input-output Mass memory 



SYSTEIMI 



Programmed Data Processor-6 (PDP-6) is a general- 
purpose digital computing system designed for 
scientific data processing. The flexibility of this sys- 
tem permits the user to specify the data handling 
capacity and the exact configuration needed to meet 
his requirements. The system can be expanded with 
presently available equipment or, at a later date, 
with equipment yet to be developed. Faster mem- 
ories, for example, can be added as they become 
available. 

PDP-6 design eliminates the need for off-line con- 
version equipment. Conversion of programs from 
cards or paper tape to magnetic tape can be done 
concurrent with normal program running. Users at 
peripheral Teleprinters can simultaneously prepare 
and debug their programs on line. 

The PDP-6 system consists of processors, memories, 
and input/output devices. Since each is autonomous 
(no device is dependent upon another for its timing), 
a system configuration can include memory modules 
of different speeds, processors of different types 
sharing the same memory modules, and standard or 
unique input/output devices. 

For maximum flexibility of system configurations, 
the PDP-6 system is built around two busses: proc- 
essor-memory bus and processor-input/output bus. 
The memory bus permits each processor to directly 
address 262,144 words of core memory, automati- 
cally permits overlapping, and simplifies multiproc- 
essor operation. An input/output bus of processor 
can service up to 128 devices. 

The Operating System consists of a supervisory con- 
trol program, system programs, and system sub- 
routines. Included are a Symbolic Assembler and 
Macro Processor, a FORTRAN II Compiler, and de- 
bugging aids. A library of general utility programs 
is also provided. 



Neither the processors nor any of the standard pe- 
ripheral equipment require an air-conditioned en- 
vironment or floor reinforcement. Ordinary 115-volt 
power is sufficient for all equipment. 

PROCESSORS 

A PDP-6 system can include any number of proces- 
sors of the same or different types. The Type 166 is 
a 36-bit arithmetic processor with many powerful 
features, including 16 accumulators, 15 index regis- 
ters, built-in floating point arithmetic, and byte 
operations capability. Memory protection and re- 
location registers are included for time-sharing 
operations. 

The Type 167 1-0 Processor gives direct memory 
access to high speed devices, such as drums, discs, 
and displays. It takes over local control of data 
transfers after receiving system commands and ini- 
tial conditions from the arithmetic processor. There- 
after the two processors operate asynchronously, so 
that 1-0 transfers are carried out in parallel with 
arithmetic processing. 

Up to three controls, such as the Type 236 Drum 
Control, can be connected to the Type 167 1-0 
Processor. 



INPUT/OUTPUT 

The input/output bus consists of device selection, 
data, control, and status sense lines. A seven-chan- 
nel program-assignable priority interrupt system 
signals the processor when input/output devices 
require service. Word count and memory address 
registers are located in the processor and are avail- 
able to all devices. This reduces the cost of various 
input/output controls, and permits data block trans- 
fers between tapes, card readers, printers, displays, 
and other devices. 



MEMORY 

The PDP-6 core memory subsystem permits modular 
expansion using blocks of different sizes and speeds. 
The Types 163B and 163C core memory modules 
contain 8,192 and 16,384 words, respectively. Each 
has a word length of 36 bits, a cycle time of 2 micro- 
seconds, and an access time of 0.8 microseconds. 
The Type 162 Fast Memory Module contains 16 
words with a 0.4-microsecond cycle. Slower core 
memories, such as the 5-microsecond Type 161, can 
be used where economy is an overriding criterion. 

The memory-processor bus permits memory cycle 
overlap, gives all processors direct access to memory, 
and permits easy expansion and modification of the 
memory subsystem. In addition, the bus allows the 
processors to remain connected to memory only as 
long as needed to transfer information: That is, a 
processor can put a word on the bus and resume 
operations as soon as the memory acknowledges, 



without waiting for the memory to store the word. 
Similarly, when reading a word out of memory, the 
processor takes the information and operates on it 
immediately, without waiting for the memory to 
finish the rewrite portion of its cycle. 

Maximum system efficiency is achieved when se- 
quential memory references address alternate mem- 
ory modules. The addressed module places data on 
the bus as soon as it is available in the memory 
buffer and disconnects itself from the bus while 
rewriting, freeing the processor to store the result 
or seek the next instruction in a second memory 
module before the first one has completed rewriting. 
Utilizing such overlapping memory references, 
PDP-6 users can effectively cut in half the time re- 
quired for average random accesses. Multiple con- 
nections between the bus and each memory module 
permit module sharing on a priority basis for multi- 
processor operations. 





The programming system for PDP-6 consists of a 
supervisory control program, system programs, and 
library routines. The entire system is designed to 
run on any PDP-6 system with at least 16,384 words 
of core memory, a console Teleprinter, and a Micro- 
tape system. However, the programming system is 
modular. Parts of it can run on machines with 
smaller memory capacity. For example, programs 
can be assembled with MACRO-6 using the above- 
mentioned input-output equipment and only 8,192 
words of core memory. 

A variety of programs are provided through the 
Digital program library, and a continuous in-house 
program design effort regularly improves and ex- 
pands the library. 

THE SUPERVISORY CONTROL PROGRAM 

This is the name given to a collection of programs 
remaining permanently in memory to provide overall 
coordination and control of the total operating sys- 
tem. The segments of the program are: 

Command Control Program, which handles all com- 
mands addressed to the system from the User-Con- 
soles. These commands would include requests to 
log in or out, a request to use the edit program, 
requests to have a program placed on the run queue, 
requests to load a program, etc. 

Program Scheduler, which is called at regular inter- 
vals to decide which program in memory is to be 
run. A running program is temporarily terminated 
each time its allotted time has run out, or when it 
requires input-output operations with a device that 
is busy. A program may be terminated temporarily 
by user intervention to the scheduler, or it may sus- 
pend its own operation. Temporary termination does 
not remove the program from memory. A program 
may be dumped on backing storage and permanently 
discontinued by calling the scheduler and allocator. 



Facilities Allocator, which is called any time an I/O 
device or memory space is required. It may be called 
from a User-Console or by a running program. Under 
this program one User-Console is designated the 
operator console. As such it has special facilities 
available which are not available to other consoles, 
such as line printer assignments. Storage is perma- 
nently assigned for all resident programs, that is, 
those programs that are in memory at all times. 
Finally, "logical" tape assignments are made. Two 
Micro Tape units are designated the system library 
and the system scratch tape. Two other tapes may 
be assigned as Peripheral Input Tape, used to pre- 
pare jobs to be stacked from cards or paper tape, 
and System Input Tape, used to input a full tape. 
(Each User-Console may require a Micro Tape unless 
programs requiring files are to be run.) 

Command Decoder preprocesses commands from 
the User-Console. This program is used to convert 
parameters, etc., before the command is sent to the 
program for which the command is intended. 

I/O Control is called whenever an I/O device is to be 
used. This program assigns equipment, controls the 
I/O devices, controls data transfers between memory 
and the I/O device, and controls the buffering of 
data for the device. (Users provide the necessary 
buffering for devices which require file buffering.) 
All program I/O instructions are trapped, and the 
actual control of the I/O operation then passes to 
the I/O Control Program. 

SYSTEM PROGRAMS 

These are the programs designed to implement sys- 
tem functions which may be requested from the 
User-Console. This is in contrast to system sub- 
routines which may be called by system programs or 
other programs. System programs are normally pro- 
vided by Digital, but they may be provided by each 
installation for its users. The programs contain a 



mode by which they may be terminated to return 
the communication link to the system. Some of the 
system programs are described below. 

Ed/tor Program, which provides a means for manipu- 
lating the text of a named file on a Micro Tape or 
in the user area of the drum (corresponding to Micro 
Tape). This file may be used for the creation of text 
or for later use as data or as a program to be trans- 
lated by the FORTRAN compiler, etc. The commands 
provided for the editor allow text to be created, de- 
leted, or moved about. 

Peripheral Conversion Program, which handles all 
those jobs normally done by a separate peripheral 
processor. The priority interrupt system and multiple 
memory accumulators in the PDP-6 eliminate virtu- 
ally all loss in running time. Such processing is done 
through the arithmetic processor. 

/nter-Conso/e Message Program, which switches 
message traffic between the various User-Consoles. 
This program provides a means by which the user 
may request manual operations by the operator and 
receive acknowledgment. Such an operation would 
be the mounting/dismounting of user tapes. 

Linking Loader Program accepts programs in a form 
produced by the translators, and produces an area of 
core memory loaded with the program. Upon request, 
it may also produce a storage map of the loaded 
programs along with symbol tables. Several programs 
may be linked together in loading. The loader re- 
quests special library tapes to be loaded, and verifies 
that the program has been completely loaded. 

Translator Dispatcher is called to load the FORTRAN, 
MACRO-6, or other translators. The translators are 
rather large programs that do not reside in memory, 
but are stored on the System Library tape until they 
are called into memory by the translator. 

FORTRAN II Compiler accepts FORTRAN II input 
statements and produces relocatable binary output 
coding for later loading by the Linking Loader. Com- 
piling is done in one pass. PDP-6 FORTRAN II is an 
extension of the conventional FORTRAN II language 
to give the user more facilities and to take advantage 
of PDP-6 hardware. The ASCII character set is used. 
Subscripts may consist of statements (fixed or float- 
ing). Any number of dimensions may be used to 
specify an array. Signed integers have 36-bit values, 
but when used as subscripts are truncated to 18 bits. 

MACRO-6 Assembly Program translates MACRO-6 
input language to a relocatable binary output for the 
Linking Loader. MACRO-6 is a two-pass assembly 
program and the language provides for instruction 
definitions and usage. Literal assignments are made 



by brackets []. Numbers may be expressed as binary, 
octal, decimal, and floating point. Text may be placed 
in a binary program by the occurrence of the "text" 
data generating statement, and "byte" will cause a 
string of bytes to be assigned and packed into a 
word. The "repeat" control statement causes the 
statements following the control to be repeated "n" 
times. 

Debugging Program (DDT) is loaded with a program 
and allows all assembly language programs to be 
debugged. The program may be started or stopped, 
words in the program may be modified, and DDT 
may search the program looking for particular words. 
DDT may also be used in a "trace" or break point 
mode, and the program is run until a particular loca- 
tion (a break point) is encountered. 

The System Subroutines include: 

1. I/O Format Control which provides for the various 
format statements used in the FORTRAN II lan- 
guage. These subroutines are also available to 
other programs and may be called from the sys- 
tems library tape. 

2. Arithmetic Subroutines which include all the arith- 
metic subroutines required for FORTRAN II, such 
as, sine, cosine, log,,, log lo , exponent, tangent, 
arc-tangent, and square root. 





n^ 




8 




ARITHMETIC 

PROCESSOR 

166 



I/O 

PROCESSOR 
167 



TO 

OTHER 
PROCESSORS 

I I 

--I I 




10 




The diagram shows the three main parts of a PDP-6 
system - - memories, processors, and input-output 
equipment interconnected with busses. Memories 
and input-output devices contain their own buffer 
registers and control circuits, including decoders to 
recognize commands from the processors. The Data 
Control Type 136 is a double-buffered device which 
is used not only with magnetic tape equipment, as 
shown here, but with any high speed, block transfer 
device, such as drum or disc. 

The system shown in this diagram is a theoretical 
one of very high capacity, but it is entirely within the 
capability of PDP-6. Memory size, indicated by the 
modules on the left, can be as large as 262,144 
words per processor, and up to four processors can 
address a given memory module. Very high speed 
devices, such as drum, tape, disc, and display, can 
have direct access to the memory system through the 
1-0 Processor Type 167. The combination of the 



asynchronous nature of the system and the charac- 
teristics of the memory bus makes possible truly 
simultaneous memory references by two or more 
processors. Sequential memory references made by 
one processor can be overlapped. 

PDP-6 is also a highly effective system in a minimum 
configuration. All system programs will operate in a 
system consisting of a Type 166 Arithmetic Processor, 
a Memory Module of 16,384 words, a Microtape sys- 
tem, and a Teleprinter. Later expansion of either the 
memory or input-output system can be made with no 
change whatever in the existing system. Memory 
modules can be of any speed: A low cost system 
might call initially for slower (5-microsecond) mem- 
ories, later to be augmented by faster memories 
(down to 0. 5-microsecond). 

PDP-6 systems are thus completely adaptable to cur- 
rent and future requirements, both technical and 
budgetary. 



11 




The Type 166 Arithmetic Processor is a general pur- 
pose processor capable of performing arithmetic, 
logical and input/output operations. It uses the first 
16 locations in memory as accumulators, index reg- 
isters, or ordinary memory locations. The results of 
each operation are transmitted automatically to one 
of these registers at the end of each instruction; thus 
the accumulator resides in memory. 

Executive mode hardware is provided for time shar- 
ing. Programs to be run are placed in memory and 
relocated by the Relocation Register. Memory refer- 
ences outside of the area assigned to the user are 
detected by the Memory Protection Register, and a 
supervisory program is called to check for the cause 
of the illegal reference. In addition to this specific 
hardware, PDP-6 time-sharing capability is further 
enhanced by the processor's ability to address up to 
262,144 words of memory directly and by the uni- 
form representation of program symbols in ASCII 
code. 

The 363 operation codes include fixed and floating 



point arithmetic, logical or Boolean, memory or ac- 
cumulator modification and testing, half word, vari- 
able sized byte, block transmission, and input-output 
instructions. Instruction times vary, depending on the 
memory subsystem selected. Use of the Type 162 
Fast Memory reduces instruction times significantly. 

The table (right) shows the number and kind of in- 
structions and their speed of execution. The fast 
times are based on starting with instruction and data 
in fast memory. The slow times are based on starting 
with both instruction and data in the same core 
memory and allow for one index reference. The fast 
times are not necessarily minimum, since instruc- 
tions in the immediate mode (instruction contains 
operand) may run faster. Nor are the slow times 
maximum times, since an instruction may take con- 
siderably longer if there are several levels of indirect 
addressing. Exact times depend on the program con- 
text in which the instructions occur and on other 
factors; therefore the figures should not be used to 
calculate program running time. 







r 1 



12 



INSTRUCTIONS 





No. 


of Instructions 


Instruction 


Times 


Instructions 


















Total 








Operations 


Modes 


Instructions 


Fast 


Slow 


Full word moves 


4 


4 


16 


1.9^sec 


4.0/xsec 


Half word moves 


16 


4 


64 


1.9 


4.0 


Byte manipulation 


5 




5 


5.7 


8.0 


Block transfer 


1 




1 


1.5+0.8n 2 


.4+1.2n 


Exchange 


1 




1 


2.8 


4.0 


Fixed point add 


1 


4 


4 


2.7 


4.3 


Fixed point subtract 


1 


4 


4 


2.9 


4.5 


Fixed point multiply 


2 


4 


8 


14.5 


16.1 


Fixed point divide 


2 


4 


8 


23.4 


25.0 


Floating point add 


2 


4 


8 


5.8 


8.0 


Floating point subtract 


2 


4 


8 


6.0 


8.2 


Floating point multiply 


2,1 


4 


9 


12.4 


14.5 


Floating point divide 


2 


4 


8 


18.4 


20.5 


Boolean 


16 


4 


64 


2.7 


4.3 


Shifting (18 bits) 


6 




6 


4.7 


5.9 


Memory, AC modification and testing 


6 


8 


48 


2.6 


3.9 


Arithmetic compare 


2 


8 


16 


2.7 


4.4 


Logical compare 


16 


4 


64 


2.7 


4.4 


Jumping 


8 




8 


1.8 


3.0 


I/O 












basic 


4 




4 


3.0 


6.2 


augmented 


4 




4 


3.8 


7.0 


Push down 


4 




4 


3.1 


6.4 




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13 



Digital offers a large selection of optional equipment 
for full utilization of the extensive input/output 
capacity of the system. 

MICRO TAPE TRANSPORT TYPE 555 
A fixed address magnetic tape facility for high speed 
loading, readout, and on-line program debugging. 
Read, write, and search speed is 80 inches a second. 
Density is 375 bits an inch. Total storage is three 
million bits. Features phase recording, rather than 
amplitude recording; redundant, nonadjacent data 
tracks, and a pre-recorded timing and mark track. 

MICRO TAPE CONTROL TYPE 551 
Controls up to eight Type 555 Micro Tape Trans- 
ports. Searches in either direction for specified block 
numbers, then reads or writes data. Uses the Type 
136 Data Control to assemble data and buffer trans- 
fers to the processor. 

DATA CONTROL TYPE 136 

Provides for assembly of 6, 12, 18, or 36-bit charac- 
ters; six input/output devices can be controlled. 

TELEPRINTER AND CONTROL TYPE 626 
Permits on-line programming and debugging. Pro- 
vides hardcopy outputs. Is standard Teletype equip- 
ment, operating at ten characters a second. 

TELEPRINTER INTERFACE TYPE 630 
Automatically scans up to 64 teleprinter (TTY) lines. 
Signals a program interrupt when teleprinter needs 
service. 

CARD PUNCH CONTROL TYPE 460 
Permits on-line punching of cards in any format, in- 
cluding IBM, at 100 or 300 cards a minute. 

CARD READER AND CONTROL TYPE 461 
Provides on-line reading of standard punched cards 
at 200 or 800 cards a minute in alphanumeric or 
binary codes. 

HIGH SPEED PERFORATED TAPE PUNCH 

AND CONTROL TYPE 761 
Punches 8-hole tape at 63.3 characters a second. 



HIGH SPEED PERFORATED TAPE READER 

AND CONTROL TYPE 760 

Reads perforated paper tape photo-electrical ly at 
400 characters a second. 

MAGNETIC TAPE CONTROL TYPE 516 
Automatically controls up to eight tape transports 
Type 570 or IBM 729 series. Permits reading, writ- 
ing, forward/backward spacing, rewind and unload, 
and rewind. Uses a Type 136 Data Control to assem- 
ble data and buffer transfers to the processor. Lon- 
gitudinal and lateral parity is checked. 

MAGNETIC TAPE TRANSPORT TYPE 570 
Tape motion is controlled by pneumatic capstans 
and brakes, eliminating conventional pinch rollers, 
clamps, and mechanical arms. Tape speed is either 
75 or 112.5 inches per second. Track density, pro- 
gram-selectable, is 200, 556, and 800 bits per inch. 
Tape width is one-half inch, with six data tracks 
and one for parity. Format is compatible with IBM 
NRZI. Dual heads permit read-checking while writing. 

1-0 PROCESSOR TYPE 167 

Establishes a data transmission path between main 
memory and block transfer devices, such as drums, 
magnetic tape, disc files, or CRT displays. 

MAGNETIC DRUM AND CONTROL TYPE 236 
Drum stores 1,048,576 36-bit words organized into 
128 tracks, each with 8,192 words consisting of 64 
128-word blocks. A word is transferred in 6.4 micro- 
seconds, and the drum revolution time is 52 milli- 
seconds. 

DISPLAY CONTROL AND MONITOR TYPE 346 
Plots points, lines, vectors, and characters on a 
9%-inch-square raster of 1,024 points along each 
axis. Time between points plotted is 1.5 micro- 
seconds in the vector, increment, and character 
modes. In random point plotting, a time of about 35 
microseconds is required per point. 

DISPLAY MONITOR TYPE 343 
Provides additional cathode ray tube display for mul- 
tiple consoles. 



14 



HIGH SPEED LIGHT PEN TYPE 370 
Detects data displayed by the Types 346 and 343 
and inputs identifying signal to the computer. 

ANALOG-TO-DIGITAL CONVERTER TYPE 138 
Transforms an analog voltage to a binary number, 
selectable from six to eleven bits. Conversion time 
varies, depending on the number of bits and the ac- 
curacy required. Twenty-one combinations of switch- 
ing point accuracy and number of bits can be selected 
on the front panel. 

MULTIPLEXED ANALOG-TO-DIGITAL CONVERTER 
TYPE 138/139 

The Type 139 Multiplexer Control permits up to 64 
channels of analog information to be applied singly 
to the input of the Type 138 Analog-to-Digital Con- 
verter. Channels can be selected in sequence or by 
individual addresses. 

HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER 

TYPE 142 
Transforms an analog voltage to a signed, 10-bit 




binary number in 6 microseconds. Conversion ac- 
curacy is 0.15% 1/2 least significant bit. 

ANALOG-DIGITAL-ANALOG CONVERTER 

SYSTEM TYPE ADA-1 

Performs fast, real-time data conversion between 
digital and analog computers. Maximum sample rate 
for D/A conversion is 200 kc; for A/D and interlaced 
conversions, 100 kc. Digital word length is 10 bits. 
Actual conversion times are 5 microseconds for A/D 
and 2 microseconds for D/A. Semiautomatic features 
enable the- converter system to perform many of the 
functions that a computer normally performs for 
other converter interfaces. 

AUTOMATIC LINE PRINTER AND CONTROL 

TYPE 646C 

Prints 1000 lines a minute, 120 columns a line, any 
one of 64 characters a column. 

AUTOMATIC LINE PRINTER AND CONTROL 

TYPE 646A 

Prints 300 lines a minute, 120 columns a line, any 
one of 64 characters a column. 




15 




EQUIPMENT 
CORPORATION 

MAVNARO. MASSACHUSETTS 

Los Angeles Palo Alto Pittsburgh 
Washington. D. C. Parsippany. N J. 
Chicago -Ann Arbor, Mich.* Carleton 
Place. Ontario Munich, Germany 
Reading, England Sydney. Australia 



15017 



PRINTED IN U.S.A. 



100-9/64